Legends

Acronym Verbose Description
 *  User Assigned
 (b)  Buried macrocell
 FB#  Function Block number
 GCK#  Global Clock number
 GTS#  Global Output Enable number
 GSR  Global Set/Reset
 I  Input
 I/O  Input/Output
 Latch  Transparent latch
 LOW  Low Power Mode
 MC#  Macrocell number
 O  Output
 OD  Open Drain
 PU  Pullup
 /S  After any flop/latch type indicates initial state is Set
 STD  Standard Power Mode
 TCK  One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. Test operations of the device are synchronous to TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. An internal pull-up forces TCK to a high level if left unconnected.
 TDI  One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial input for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level if left unconnected.
 TDO  One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial output for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level when it is not driven from an external source.
 TFF  Toggle Flip-Flop
 TMS  One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It directs the device through its Test Access Port controller states. An internal pull-up forces TDI to a high level when it is not driven from an external source. TMS also provides the optional test reset signal of IEEE Std 1149 or IEEE Std 1532.