diff --git a/60hz_Divider/code/arduino_parse_test/arduino_parse_test.ino b/60hz_Divider/code/arduino_parse_test/arduino_parse_test.ino new file mode 100644 index 0000000..a641723 --- /dev/null +++ b/60hz_Divider/code/arduino_parse_test/arduino_parse_test.ino @@ -0,0 +1,96 @@ +#define HZin 4 + +uint32_t hzhigh[20]; +uint32_t hzlow[20] ; +uint8_t x = 0; + +void setup() { + // put your setup code here, to run once: + pinMode(HZin, INPUT); + Serial.begin(116200); +} + + +void loop() { + // put your main code here, to run repeatedly: + +//if (val = pulsein < 2000) then do low, then high again +//else goto end +/*if((hzhigh[x] = pulseInLong(HZin, HIGH, 1000000UL)) < 2000){ + x++ + hzlow[x] = pulseInLong( HZin, HIGH, 1000000UL); + +}*/ + + +//if pulse high don't care +//if pulse low, do stuff{ +// whilepulse low, time, +// while pulse high time, +// etc... +//if pulse high greater than 3ms, end + + +//the below is not usable +//apparently setup time is too long +if((hzlow[x] = pulseInLong(HZin,LOW, 2000000UL))){ + //while(hzhigh[x] < 2000){ + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + x++; + hzhigh[x] = pulseInLong(HZin,HIGH,2000000UL); + x++; + hzlow[x] = pulseInLong(HZin,LOW, 2000000UL); + } + + + +/* +for(x=0;hzhigh[x]<2000;x++){ + hzhigh[x] = pulseInLong( HZin, HIGH, 2000000UL); + hzlow[x] = pulseInLong( HZin, LOW, 2000000UL); + //hzhigh[x] = pulseInLong( HZin, HIGH, 2000000UL); +} +for(x=0;x<10;x++){ + hzhigh[x] = hzhigh[x]>>5; + hzlow[x] = hzlow[x]>>5; +}*/ +end: +Serial.print("\n\n\n\n"); +for(x=0;x<14;x++){ + Serial.print("hi:"); + Serial.print(x);Serial.print(" is:"); + Serial.println(hzhigh[x]); + Serial.print("low:"); + Serial.print(x);Serial.print(" is:"); + Serial.println(hzlow[x]); +} +for(x=0;x<14;x++){ + hzhigh[x] = 0; + hzlow[x] = 0; +} +delay(100); + +} diff --git a/60hz_Divider/datasheets/SiT8008B-rev1p05.pdf b/60hz_Divider/datasheets/SiT8008B-rev1p05.pdf new file mode 100644 index 0000000..c2e655c Binary files /dev/null and b/60hz_Divider/datasheets/SiT8008B-rev1p05.pdf differ diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests8_timer_6000hz.X/nbproject/private/private.xml b/Attiny_Solar_Energy_Harvest/code/mplab/tests8_timer_6000hz.X/nbproject/private/private.xml index 85e1734..6807a2b 100644 --- a/Attiny_Solar_Energy_Harvest/code/mplab/tests8_timer_6000hz.X/nbproject/private/private.xml +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests8_timer_6000hz.X/nbproject/private/private.xml @@ -2,8 +2,6 @@ - - file:/home/dev/Desktop/code/electronics/attiny10_mplab_test/tests7_timer_6000hz.X/main.c - + diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/Makefile b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/Makefile new file mode 100644 index 0000000..fca8e2c --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/Makefile @@ -0,0 +1,113 @@ +# +# There exist several targets which are by default empty and which can be +# used for execution of your targets. These targets are usually executed +# before and after some main targets. They are: +# +# .build-pre: called before 'build' target +# .build-post: called after 'build' target +# .clean-pre: called before 'clean' target +# .clean-post: called after 'clean' target +# .clobber-pre: called before 'clobber' target +# .clobber-post: called after 'clobber' target +# .all-pre: called before 'all' target +# .all-post: called after 'all' target +# .help-pre: called before 'help' target +# .help-post: called after 'help' target +# +# Targets beginning with '.' are not intended to be called on their own. +# +# Main targets can be executed directly, and they are: +# +# build build a specific configuration +# clean remove built files from a configuration +# clobber remove all built files +# all build all configurations +# help print help mesage +# +# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and +# .help-impl are implemented in nbproject/makefile-impl.mk. +# +# Available make variables: +# +# CND_BASEDIR base directory for relative paths +# CND_DISTDIR default top distribution directory (build artifacts) +# CND_BUILDDIR default top build directory (object files, ...) +# CONF name of current configuration +# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration) +# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration) +# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration) +# CND_PACKAGE_DIR_${CONF} directory of package (current configuration) +# CND_PACKAGE_NAME_${CONF} name of package (current configuration) +# CND_PACKAGE_PATH_${CONF} path to package (current configuration) +# +# NOCDDL + + +# Environment +MKDIR=mkdir +CP=cp +CCADMIN=CCadmin +RANLIB=ranlib + + +# build +build: .build-post + +.build-pre: +# Add your pre 'build' code here... + +.build-post: .build-impl +# Add your post 'build' code here... + + +# clean +clean: .clean-post + +.clean-pre: +# Add your pre 'clean' code here... +# WARNING: the IDE does not call this target since it takes a long time to +# simply run make. Instead, the IDE removes the configuration directories +# under build and dist directly without calling make. +# This target is left here so people can do a clean when running a clean +# outside the IDE. + +.clean-post: .clean-impl +# Add your post 'clean' code here... + + +# clobber +clobber: .clobber-post + +.clobber-pre: +# Add your pre 'clobber' code here... + +.clobber-post: .clobber-impl +# Add your post 'clobber' code here... + + +# all +all: .all-post + +.all-pre: +# Add your pre 'all' code here... + +.all-post: .all-impl +# Add your post 'all' code here... + + +# help +help: .help-post + +.help-pre: +# Add your pre 'help' code here... + +.help-post: .help-impl +# Add your post 'help' code here... + + + +# include project implementation makefile +include nbproject/Makefile-impl.mk + +# include project make variables +include nbproject/Makefile-variables.mk diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/build/default/production/main.o b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/build/default/production/main.o new file mode 100644 index 0000000..73063f8 Binary files /dev/null and b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/build/default/production/main.o differ diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/build/default/production/main.o.d b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/build/default/production/main.o.d new file mode 100644 index 0000000..21d6850 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/build/default/production/main.o.d @@ -0,0 +1,43 @@ +build/default/production/main.o.d build/default/production/main.o: main.c \ + /opt/microchip/xc8/v2.10/avr/lib/gcc/avr/5.4.0/include/xc.h \ + /opt/microchip/xc8/v2.10/avr/lib/gcc/avr/5.4.0/include/cci.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/io.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/sfr_defs.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/inttypes.h \ + /opt/microchip/xc8/v2.10/avr/lib/gcc/avr/5.4.0/include/stdint.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/stdint.h \ + /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/include/avr/iotn10.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/portpins.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/common.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/version.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/xmega.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/fuse.h \ + /opt/microchip/xc8/v2.10/avr/avr/include/avr/lock.h + +/opt/microchip/xc8/v2.10/avr/lib/gcc/avr/5.4.0/include/xc.h: + +/opt/microchip/xc8/v2.10/avr/lib/gcc/avr/5.4.0/include/cci.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/io.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/sfr_defs.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/inttypes.h: + +/opt/microchip/xc8/v2.10/avr/lib/gcc/avr/5.4.0/include/stdint.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/stdint.h: + +/home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/include/avr/iotn10.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/portpins.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/common.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/version.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/xmega.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/fuse.h: + +/opt/microchip/xc8/v2.10/avr/avr/include/avr/lock.h: diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/memoryfile.xml b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/memoryfile.xml new file mode 100644 index 0000000..7bfdc11 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/memoryfile.xml @@ -0,0 +1,17 @@ + + + + + bytes + 1024 + 64 + 960 + + + bytes + 32 + 0 + 32 + + + diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.elf b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.elf new file mode 100755 index 0000000..6006a46 Binary files /dev/null and b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.elf differ diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.hex b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.hex new file mode 100644 index 0000000..004a231 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.hex @@ -0,0 +1,7 @@ +:100000000AC01DC01CC01BC01AC019C018C017C030 +:1000100016C015C014C011271FBFCFE5D0E0DEBF4A +:0A002000CDBF03D000C0F894FFCF5D +:10002A0048ED4CBF52E057BF4CBF48E046BF44E0E2 +:04003A0040B9FECFFC +:02003E00E0CF11 +:00000001FF diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.map b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.map new file mode 100644 index 0000000..bd6d639 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/dist/default/production/tests9_timer_6000hz.X.production.map @@ -0,0 +1,395 @@ +Archive member included to satisfy reference by file (symbol) + +/opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o (exit) + +Discarded input sections + + .data 0x00000000 0x0 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + .bss 0x00000000 0x0 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + .text 0x00000000 0x0 build/default/production/main.o + .data 0x00000000 0x0 build/default/production/main.o + .bss 0x00000000 0x0 build/default/production/main.o + .text 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .data 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .bss 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc.mul + 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc.div + 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc.prologue + 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc.builtins + 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc.fmul + 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + .text.libgcc.fixed + 0x00000000 0x0 /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a(_exit.o) + +Memory Configuration + +Name Origin Length Attributes +text 0x00000000 0x00000400 xr +data 0x00800040 0x00000020 rw !x +config 0x00820000 0x00000001 rw !x +lock 0x00830000 0x00000002 rw !x +signature 0x00840000 0x00000004 rw !x +*default* 0x00000000 0xffffffff + +Linker script and memory map + + 0x00004000 __RODATA_PM_OFFSET__ = 0x4000 +LOAD /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + 0x00000001 __MPLAB_BUILD = 0x1 +LOAD build/default/production/main.o +START GROUP +LOAD /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrtiny/libm.a +END GROUP +START GROUP +LOAD /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/avrtiny/libgcc.a +LOAD /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrtiny/libm.a +LOAD /opt/microchip/xc8/v2.10/avr/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrtiny/libc.a +LOAD /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/libattiny10.a +END GROUP + 0x00000000 __TEXT_REGION_ORIGIN__ = DEFINED (__TEXT_REGION_ORIGIN__)?__TEXT_REGION_ORIGIN__:0x0 + [0x00800040] __DATA_REGION_ORIGIN__ = DEFINED (__DATA_REGION_ORIGIN__)?__DATA_REGION_ORIGIN__:0x800040 + [0x00000400] __TEXT_REGION_LENGTH__ = DEFINED (__TEXT_REGION_LENGTH__)?__TEXT_REGION_LENGTH__:0x1000 + [0x00000020] __DATA_REGION_LENGTH__ = DEFINED (__DATA_REGION_LENGTH__)?__DATA_REGION_LENGTH__:0x100 + [0x00000001] __FUSE_REGION_LENGTH__ = DEFINED (__FUSE_REGION_LENGTH__)?__FUSE_REGION_LENGTH__:0x2 + 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*(.lfuse) + *(.hfuse) + *(.efuse) + *(.config*) + +.stab + *(.stab) + +.stabstr + *(.stabstr) + +.stab.excl + *(.stab.excl) + +.stab.exclstr + *(.stab.exclstr) + +.stab.index + *(.stab.index) + +.stab.indexstr + *(.stab.indexstr) + +.comment 0x00000000 0x2f + *(.comment) + .comment 0x00000000 0x2f build/default/production/main.o + 0x30 (size before relaxing) + +.note.gnu.build-id + *(.note.gnu.build-id) + +.debug + *(.debug) + +.line + *(.line) + +.debug_srcinfo + *(.debug_srcinfo) + +.debug_sfnames + *(.debug_sfnames) + +.debug_aranges 0x00000000 0x20 + *(.debug_aranges) + .debug_aranges + 0x00000000 0x20 build/default/production/main.o + +.debug_pubnames + *(.debug_pubnames) + +.debug_info 0x00000000 0x53d + *(.debug_info .gnu.linkonce.wi.*) + .debug_info 0x00000000 0x305 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + .debug_info 0x00000305 0x238 build/default/production/main.o + +.debug_abbrev 0x00000000 0x324 + *(.debug_abbrev) + .debug_abbrev 0x00000000 0x2d9 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + .debug_abbrev 0x000002d9 0x4b build/default/production/main.o + +.debug_line 0x00000000 0x16d + *(.debug_line .debug_line.* .debug_line_end) + .debug_line 0x00000000 0xd9 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + .debug_line 0x000000d9 0x94 build/default/production/main.o + +.debug_frame 0x00000000 0x24 + *(.debug_frame) + .debug_frame 0x00000000 0x24 build/default/production/main.o + +.debug_str 0x00000000 0x115 + *(.debug_str) + .debug_str 0x00000000 0x115 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + .debug_str 0x00000115 0x0 build/default/production/main.o + +.debug_loc + *(.debug_loc) + +.debug_macinfo + *(.debug_macinfo) + +.debug_weaknames + *(.debug_weaknames) + +.debug_funcnames + *(.debug_funcnames) + +.debug_typenames + *(.debug_typenames) + +.debug_varnames + *(.debug_varnames) + +.debug_pubtypes + *(.debug_pubtypes) + +.debug_ranges 0x00000000 0x10 + *(.debug_ranges) + .debug_ranges 0x00000000 0x10 build/default/production/main.o + +.debug_macro + *(.debug_macro) +OUTPUT(dist/default/production/tests9_timer_6000hz.X.production.elf elf32-avr) +LOAD linker stubs +LOAD data_init + +.note.gnu.avr.deviceinfo + 0x00000000 0x3c + .note.gnu.avr.deviceinfo + 0x00000000 0x3c /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + +.text.main 0x0000002a 0x14 + .text.main 0x0000002a 0x14 build/default/production/main.o + 0x0000002a main + +.text 0x0000003e 0x2 + .text 0x0000003e 0x2 /home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10/gcc/dev/attiny10/avrtiny/crtattiny10.o + 0x0000003e __vector_1 + 0x0000003e __bad_interrupt + 0x0000003e __vector_6 + 0x0000003e __vector_3 + 0x0000003e __vector_7 + 0x0000003e __vector_5 + 0x0000003e __vector_4 + 0x0000003e __vector_9 + 0x0000003e __vector_2 + 0x0000003e __vector_8 + 0x0000003e __vector_10 diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/main.c b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/main.c new file mode 100644 index 0000000..b024f5a --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/main.c @@ -0,0 +1,305 @@ +#include +#include + +//this req'd for (and before calling) delay +//see delay.h +//compiler optimizations must also be enabled +//#define F_CPU 1536000 +//#include + +//#include +//#include +//#include +//#include + + + + + +//tests5 tested and works (at ~950hz). unplug cable to programmer to see pin 4 active. +//however... +//tests6 DEADEND +//never worked right. giving up and using delay. + +//reference: https://www.avrfreaks.net/forum/sample-project-attiny10 +//https://blog.podkalicki.com/attiny13-blinky-with-timer-compa/ +//watchdog is too slow and inaccurate to get 6000Hz + +//ISR(TIM0_COMPA_vect) +//{ +// // Toggle PB2 Hi/Low depending on current state +// PINB = 1<<2; +// TIFR0 |= 1< 256? (test) + + //520 about 950hz, 25us wide pulse + //OCR0A = 520; // with one timer, ever 166.667hz we want to count once (3000hz) + + //OCR0A = 1; //475hz + + //this goes to 475hz (pulses). doesn't make sense. +//// OCR0AH = 0xFF; // +//// OCR0AL = 0xFF; + + //attiny10 output compare broken apparently + //this still 960hz, with 100us or so pulse size (high is 100us, low is longer) + //OCR0A = 100; + + + //inline asm to load values into 16 bit register + + //; variables + //; For 1 Hz output, the timer delay has to be 1/2 second (1/2 second on / 1/2 second off) + //; delay = OCR0A * 1024 * 8 / 8000000 + //; for 1/2 second, OCR0A = 488 (0x01E8) + //.EQU OCR0AHigh = 0x01 + //.EQU OCR0ALow = 0xe8 + // in bash type: printf "%x\n" 488 + //.EQU OCR0AHigh = 0x02 + //.EQU OCR0ALow = 0x08 + + // ldi r17, OCR0AHigh //; Sets the output compare register value + //ldi r16, OCR0ALow + + //this asm doesn't work (why?) //perhaps OCR0A is really just 8 bits on attiny10...?) +////// asm volatile( +////// "ldi r17, 0x02" +////// "ldi r16, 0x08" +////// "out OCR0AH, r17" +////// "out OCR0AL, r16" +////// ); + + //this asm works +// asm volatile("nop\n\t" +//"nop\n\t" +//"nop\n\t" +//"nop\n\t" +//::); +//////// +//////// TIMSK0 |= _BV(OCIE0A); // enable Timer CTC interrupt +//////// + // PB2 change to output + // DDRB = 1<<2; +//// sei(); + + + //int x = 0; + while(1) + { + + //this goes about 60.3KHz. + //experiment FAIL + //will just buy a 6KHz oscillator. + + PINB = 1<<2; + //EDIT: disabled optimization in mplab (level 0) + //and ended up geting much slower IO + //asm("nop;"); + //for(x=0;x<10;x++){ + + //note it's _delay_us not delay_us + + //delay_us(1) is 44.3KHz + //_delay_us(8); //9 is 6.4KHz, 8 is roughly 7.2KHz + //delay_us(10) is 5.8KHz + //not much granularity there...) + //so adding the following... +//////////// if( x == 3){ +//////////// _delay_us(4);//these two are 5.98 or so KHz +//////////// x = 0; +//////////// goto jump; +//////////// } +//////////// +//////////// //NOTE: the above ends up causing an ugly looking clock. may not matter +//////////// //for fpga clocking off of rising edge, BUT, it is ugly, should remove, +//////////// //and just do single delay. Will do in part 9. +//////////// +//////////// x++; +//////////// jump: +//////////// //in combination with the jump, gives closer to 6KHz +//////////// _delay_us(8); + + + + ///below didn't work out, so using osccal + //bit convuluted anyways + /*if( x == 4){ + _delay_us(1); + //x = 0; + goto jump; + } + if( x == 8){ + _delay_us(2); + x = 0; + goto jump; + } + x++; + jump: + //in combination with the jump, gives closer to 6KHz + _delay_us(8);*/ + + + //the above idles at 5.98 - 5.99KHz. + //best so far. + //Now, calibrate oscillator with OSCCAL + + //if more accuracy desired. + //or adjust if clause above + + //tried to make my own delay in ASM, BUT + //compiler keeps optimizing it out (even w/out optimization enabled) + //... some other flag may be culprit. So instead will use delay_us. Two delay + //functions are delay_ms and delay_us. see headers at top and delay.h) + /* __asm__("mov r16, r17;" + "mov r17, r16;" + "inc r16;" + "dec r16;" + "mov r16, r17;" + "mov r17, r16;" + "inc r16;" + "dec r16;" + "clr r16;" + "clr r17;" + "clr r18;" + "clr r19;" + "clr r20;" + "clr r21;" + "clr r22;" + "clr r23;" + "mov r16, r17;" + "mov r17, r16;" + "inc r16;" + "dec r16;" + "mov r16, r17;" + "mov r17, r16;" + "clr r16;" + "clr r17;" + "clr r18;" + "clr r19;" + "clr r20;" + "clr r21;" + "clr r22;" + "clr r23;" + "mov r16, r17;" + "mov r17, r16;" + "inc r16;" + "dec r16;" + "mov r16, r17;" + "mov r17, r16;" + + + );*/ + + + + //mplab delay is: + /** \ingroup util_delay_basic + + Delay loop using an 8-bit counter \c __count, so up to 256 + iterations are possible. (The value 256 would have to be passed + as 0.) The loop executes three CPU cycles per iteration, not + including the overhead the compiler needs to setup the counter + register. + + Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds + can be achieved. +*/ +//////////void +//////////_delay_loop_1(uint8_t __count) +//////////{ +////////// __asm__ volatile ( +////////// "1: dec %0" "\n\t" +////////// "brne 1b" +////////// : "=r" (__count) +////////// : "0" (__count) +////////// ); +//////////} +////////// +////////// + //ignore below + // asm("nop;""nop;""nop;""nop;""nop;" + //"nop;""nop;"//"nop;""nop;"//"nop;""nop;" + //); + //}//just this asm block is about 121.22KHz + + } +} + diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-default.mk b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-default.mk new file mode 100644 index 0000000..c5fafb7 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-default.mk @@ -0,0 +1,158 @@ +# +# Generated Makefile - do not edit! +# +# Edit the Makefile in the project folder instead (../Makefile). Each target +# has a -pre and a -post target defined where you can add customized code. +# +# This makefile implements configuration specific macros and targets. + + +# Include project Makefile +ifeq "${IGNORE_LOCAL}" "TRUE" +# do not include local makefile. User is passing all local related variables already +else +include Makefile +# Include makefile containing local settings +ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk" +include nbproject/Makefile-local-default.mk +endif +endif + +# Environment +MKDIR=mkdir -p +RM=rm -f +MV=mv +CP=cp + +# Macros +CND_CONF=default +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +IMAGE_TYPE=debug +OUTPUT_SUFFIX=elf +DEBUGGABLE_SUFFIX=elf +FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +else +IMAGE_TYPE=production +OUTPUT_SUFFIX=hex +DEBUGGABLE_SUFFIX=elf +FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +endif + +ifeq ($(COMPARE_BUILD), true) +COMPARISON_BUILD= +else +COMPARISON_BUILD= +endif + +ifdef SUB_IMAGE_ADDRESS + +else +SUB_IMAGE_ADDRESS_COMMAND= +endif + +# Object Directory +OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE} + +# Distribution Directory +DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE} + +# Source Files Quoted if spaced +SOURCEFILES_QUOTED_IF_SPACED=main.c + +# Object Files Quoted if spaced +OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/main.o +POSSIBLE_DEPFILES=${OBJECTDIR}/main.o.d + +# Object Files +OBJECTFILES=${OBJECTDIR}/main.o + +# Source Files +SOURCEFILES=main.c + + + +CFLAGS= +ASFLAGS= +LDLIBSOPTIONS= + +############# Tool locations ########################################## +# If you copy a project from one host to another, the path where the # +# compiler is installed may be different. # +# If you open this project with MPLAB X in the new host, this # +# makefile will be regenerated and the paths will be corrected. # +####################################################################### +# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build +FIXDEPS=fixDeps + +.build-conf: ${BUILD_SUBPROJECTS} +ifneq ($(INFORMATION_MESSAGE), ) + @echo $(INFORMATION_MESSAGE) +endif + ${MAKE} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} + +MP_PROCESSOR_OPTION=ATtiny10 +# ------------------------------------------------------------------------------------ +# Rules for buildStep: compile +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +${OBJECTDIR}/main.o: main.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}" + @${RM} ${OBJECTDIR}/main.o.d + @${RM} ${OBJECTDIR}/main.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="/home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -funsigned-char -funsigned-bitfields -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -MD -MP -MF "${OBJECTDIR}/main.o.d" -MT "${OBJECTDIR}/main.o.d" -MT ${OBJECTDIR}/main.o -o ${OBJECTDIR}/main.o main.c + +else +${OBJECTDIR}/main.o: main.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}" + @${RM} ${OBJECTDIR}/main.o.d + @${RM} ${OBJECTDIR}/main.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="/home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -funsigned-char -funsigned-bitfields -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -MD -MP -MF "${OBJECTDIR}/main.o.d" -MT "${OBJECTDIR}/main.o.d" -MT ${OBJECTDIR}/main.o -o ${OBJECTDIR}/main.o main.c + +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: assemble +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +else +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: assembleWithPreprocess +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +else +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: link +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} + ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.map -D__DEBUG=1 -DXPRJ_default=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="/home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10" -gdwarf-2 -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -funsigned-char -funsigned-bitfields -Wall -gdwarf-3 $(COMPARISON_BUILD) -Wl,--memorysummary,dist/${CND_CONF}/${IMAGE_TYPE}/memoryfile.xml -o dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1 + @${RM} dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.hex + +else +dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} + ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.map -DXPRJ_default=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="/home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10" -Wl,--gc-sections -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -funsigned-char -funsigned-bitfields -Wall -gdwarf-3 $(COMPARISON_BUILD) -Wl,--memorysummary,dist/${CND_CONF}/${IMAGE_TYPE}/memoryfile.xml -o dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group + ${MP_CC_DIR}/avr-objcopy -O ihex "dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}" "dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.hex" +endif + + +# Subprojects +.build-subprojects: + + +# Subprojects +.clean-subprojects: + +# Clean Targets +.clean-conf: ${CLEAN_SUBPROJECTS} + ${RM} -r build/default + ${RM} -r dist/default + +# Enable dependency checking +.dep.inc: .depcheck-impl + +DEPFILES=$(shell "${PATH_TO_IDE_BIN}"mplabwildcard ${POSSIBLE_DEPFILES}) +ifneq (${DEPFILES},) +include ${DEPFILES} +endif diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-genesis.properties b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-genesis.properties new file mode 100644 index 0000000..e1d8cc5 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-genesis.properties @@ -0,0 +1,10 @@ +# +#Sat Aug 01 22:05:40 EDT 2020 +default.Pack.dfplocation=/home/dev/.mchp_packs/Microchip/ATtiny_DFP/2.0.10 +default.languagetoolchain.dir=/opt/microchip/xc8/v2.10/bin +configurations-xml=5e854234238a55dafe0eba84ce6d1401 +com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=6e453b0cf7f7da72a932cfdb2f655401 +default.languagetoolchain.version=2.10 +host.platform=linux +conf.ids=default +default.com-microchip-mplab-nbide-toolchainXC8-XC8LanguageToolchain.md5=23d12c447ed4f9462f01e2202bc2f36a diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-impl.mk b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-impl.mk new file mode 100644 index 0000000..c2cea6e --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-impl.mk @@ -0,0 +1,69 @@ +# +# Generated Makefile - do not edit! +# +# Edit the Makefile in the project folder instead (../Makefile). Each target +# has a pre- and a post- target defined where you can add customization code. +# +# This makefile implements macros and targets common to all configurations. +# +# NOCDDL + + +# Building and Cleaning subprojects are done by default, but can be controlled with the SUB +# macro. If SUB=no, subprojects will not be built or cleaned. The following macro +# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf +# and .clean-reqprojects-conf unless SUB has the value 'no' +SUB_no=NO +SUBPROJECTS=${SUB_${SUB}} +BUILD_SUBPROJECTS_=.build-subprojects +BUILD_SUBPROJECTS_NO= +BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}} +CLEAN_SUBPROJECTS_=.clean-subprojects +CLEAN_SUBPROJECTS_NO= +CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}} + + +# Project Name +PROJECTNAME=tests9_timer_6000hz.X + +# Active Configuration +DEFAULTCONF=default +CONF=${DEFAULTCONF} + +# All Configurations +ALLCONFS=default + + +# build +.build-impl: .build-pre + ${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf + + +# clean +.clean-impl: .clean-pre + ${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf + +# clobber +.clobber-impl: .clobber-pre .depcheck-impl + ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean + + + +# all +.all-impl: .all-pre .depcheck-impl + ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build + + + +# dependency checking support +.depcheck-impl: +# @echo "# This code depends on make tool being used" >.dep.inc +# @if [ -n "${MAKE_VERSION}" ]; then \ +# echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \ +# echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \ +# echo "include \$${DEPFILES}" >>.dep.inc; \ +# echo "endif" >>.dep.inc; \ +# else \ +# echo ".KEEP_STATE:" >>.dep.inc; \ +# echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \ +# fi diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-local-default.mk b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-local-default.mk new file mode 100644 index 0000000..62e3bb2 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-local-default.mk @@ -0,0 +1,36 @@ +# +# Generated Makefile - do not edit! +# +# +# This file contains information about the location of compilers and other tools. +# If you commmit this file into your revision control server, you will be able to +# to checkout the project and build it from the command line with make. However, +# if more than one person works on the same project, then this file might show +# conflicts since different users are bound to have compilers in different places. +# In that case you might choose to not commit this file and let MPLAB X recreate this file +# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at +# least once so the file gets created and the project can be built. Finally, you can also +# avoid using this file at all if you are only building from the command line with make. +# You can invoke make with the values of the macros: +# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ... +# +PATH_TO_IDE_BIN=/opt/microchip/mplabx/v5.25/mplab_platform/platform/../mplab_ide/modules/../../bin/ +# Adding MPLAB X bin directory to path. +PATH:=/opt/microchip/mplabx/v5.25/mplab_platform/platform/../mplab_ide/modules/../../bin/:$(PATH) +# Path to java used to run MPLAB X when this makefile was created +MP_JAVA_PATH="/opt/microchip/mplabx/v5.25/sys/java/jre1.8.0_181/bin/" +OS_CURRENT="$(shell uname -s)" +MP_CC="/opt/microchip/xc8/v2.10/bin/xc8-cc" +# MP_CPPC is not defined +# MP_BC is not defined +MP_AS="/opt/microchip/xc8/v2.10/bin/xc8-cc" +MP_LD="/opt/microchip/xc8/v2.10/bin/xc8-cc" +MP_AR="/opt/microchip/xc8/v2.10/bin/xc8-ar" +DEP_GEN=${MP_JAVA_PATH}java -jar "/opt/microchip/mplabx/v5.25/mplab_platform/platform/../mplab_ide/modules/../../bin/extractobjectdependencies.jar" +MP_CC_DIR="/opt/microchip/xc8/v2.10/bin" +# MP_CPPC_DIR is not defined +# MP_BC_DIR is not defined +MP_AS_DIR="/opt/microchip/xc8/v2.10/bin" +MP_LD_DIR="/opt/microchip/xc8/v2.10/bin" +MP_AR_DIR="/opt/microchip/xc8/v2.10/bin" +# MP_BC_DIR is not defined diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-variables.mk b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-variables.mk new file mode 100644 index 0000000..2abd4e2 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Makefile-variables.mk @@ -0,0 +1,13 @@ +# +# Generated - do not edit! +# +# NOCDDL +# +CND_BASEDIR=`pwd` +# default configuration +CND_ARTIFACT_DIR_default=dist/default/production +CND_ARTIFACT_NAME_default=tests9_timer_6000hz.X.production.hex +CND_ARTIFACT_PATH_default=dist/default/production/tests9_timer_6000hz.X.production.hex +CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package +CND_PACKAGE_NAME_default=tests9timer6000hz.x.tar +CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/tests9timer6000hz.x.tar diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Package-default.bash b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Package-default.bash new file mode 100644 index 0000000..1996a3a --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/Package-default.bash @@ -0,0 +1,73 @@ +#!/bin/bash -x + +# +# Generated - do not edit! +# + +# Macros +TOP=`pwd` +CND_CONF=default +CND_DISTDIR=dist +TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging +TMPDIRNAME=tmp-packaging +OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +OUTPUT_BASENAME=tests9_timer_6000hz.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +PACKAGE_TOP_DIR=tests9timer6000hz.x/ + +# Functions +function checkReturnCode +{ + rc=$? + if [ $rc != 0 ] + then + exit $rc + fi +} +function makeDirectory +# $1 directory path +# $2 permission (optional) +{ + mkdir -p "$1" + checkReturnCode + if [ "$2" != "" ] + then + chmod $2 "$1" + checkReturnCode + fi +} +function copyFileToTmpDir +# $1 from-file path +# $2 to-file path +# $3 permission +{ + cp "$1" "$2" + checkReturnCode + if [ "$3" != "" ] + then + chmod $3 "$2" + checkReturnCode + fi +} + +# Setup +cd "${TOP}" +mkdir -p ${CND_DISTDIR}/${CND_CONF}/package +rm -rf ${TMPDIR} +mkdir -p ${TMPDIR} + +# Copy files and create directories and links +cd "${TOP}" +makeDirectory ${TMPDIR}/tests9timer6000hz.x/bin +copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755 + + +# Generate tar file +cd "${TOP}" +rm -f ${CND_DISTDIR}/${CND_CONF}/package/tests9timer6000hz.x.tar +cd ${TMPDIR} +tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/tests9timer6000hz.x.tar * +checkReturnCode + +# Cleanup +cd "${TOP}" +rm -rf ${TMPDIR} diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/configurations.xml b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/configurations.xml new file mode 100644 index 0000000..70bc52a --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/configurations.xml @@ -0,0 +1,160 @@ + + + + + + + + + main.c + + + Makefile + + + Makefile + + + + localhost + ATtiny10 + + + + XC8 + 2.10 + 2 + + + + + + + + + + + + + false + false + + + + + + + false + + false + + false + false + false + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/private/configurations.xml b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/private/configurations.xml new file mode 100644 index 0000000..e61d739 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/private/configurations.xml @@ -0,0 +1,25 @@ + + + Makefile + 0 + + + + /opt/microchip/xc8/v2.10/bin + + place holder 1 + place holder 2 + + + + + true + 0 + 0 + 0 + + + + + + diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/private/private.xml b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/private/private.xml new file mode 100644 index 0000000..a37abb1 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/private/private.xml @@ -0,0 +1,9 @@ + + + + + + file:/home/dev/Desktop/code/electronics/attiny10_mplab_test/tests9_timer_6000hz.X/main.c + + + diff --git a/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/project.xml b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/project.xml new file mode 100644 index 0000000..586e0e1 --- /dev/null +++ b/Attiny_Solar_Energy_Harvest/code/mplab/tests9_timer_6000hz.X/nbproject/project.xml @@ -0,0 +1,37 @@ + + + com.microchip.mplab.nbide.embedded.makeproject + + + tests9_timer_6000hz + tests8_timer_6000hz + tests7_timer_6000hz + tests6_timer_6000hz + tests5_timer_6000hz + tests4_timer_6000hz + tests3 + tests2 + tests1 + test2 + test1 + 1f6b2f6c-8c6d-40dd-a737-d73d987b2bef + 0 + c + + + + ISO-8859-1 + + + + + default + 2 + + + + false + + + +