\contentsline {section}{\numberline {1}60Hz Divider}{1}% 
\contentsline {subsection}{\numberline {1.1}Overview}{1}% 
\contentsline {subsection}{\numberline {1.2}Initial Notes: Counting the Hz}{1}% 
\contentsline {subsection}{\numberline {1.3}MAX7219 8 digit 7 LED segment Display Driver}{2}% 
\contentsline {subsection}{\numberline {1.4}CPLDs}{2}% 
\contentsline {subsection}{\numberline {1.5}CPLD Programming}{3}% 
\contentsline {subsubsection}{\numberline {1.5.1}6KHz clock}{3}% 
\contentsline {subsubsection}{\numberline {1.5.2}UART output}{3}% 
\contentsline {subsection}{\numberline {1.6}Divide by N Counters}{4}% 
\contentsline {subsection}{\numberline {1.7}Attiny 6KHz Clock}{4}% 
\contentsline {subsection}{\numberline {1.8}Parsing of CPLD UART Stream}{5}% 
\contentsline {subsection}{\numberline {1.9}Max7219 8 digit 7-Segment Display via Uno}{6}% 
\contentsline {subsection}{\numberline {1.10}Project Rev A Complete}{8}% 
\contentsline {subsection}{\numberline {1.11}Related:}{9}%