\contentsline {section}{\numberline {1}60Hz Divider}{1}% 
\contentsline {subsection}{\numberline {1.1}Overview}{1}% 
\contentsline {subsection}{\numberline {1.2}Initial Notes: Counting the Hz}{2}% 
\contentsline {subsection}{\numberline {1.3}MAX7219 8 digit 7 LED segment Display Driver}{2}% 
\contentsline {subsection}{\numberline {1.4}CPLDs}{3}% 
\contentsline {subsubsection}{\numberline {1.4.1}Programming}{3}% 
\contentsline {subsubsection}{\numberline {1.4.2}6KHz clock}{4}% 
\contentsline {subsubsection}{\numberline {1.4.3}UART output}{4}% 
\contentsline {subsection}{\numberline {1.5}Divide by N Counters}{4}% 
\contentsline {subsection}{\numberline {1.6}Attiny 6KHz Clock}{5}% 
\contentsline {subsection}{\numberline {1.7}Parsing of CPLD UART Stream}{5}% 
\contentsline {subsection}{\numberline {1.8}Max7219 8 digit 7-Segment Display via Uno}{7}% 
\contentsline {subsection}{\numberline {1.9}Project Rev A Complete}{8}% 
\contentsline {subsection}{\numberline {1.10}Related:}{9}%