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3245 lines
118 KiB

3 years ago
  1. gassensor_reva.ino.elf: file format elf32-avr
  2. Disassembly of section .text:
  3. 00000000 <__vectors>:
  4. 0: 0c 94 5e 00 jmp 0xbc ; 0xbc <__ctors_end>
  5. 4: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  6. 8: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  7. c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  8. 10: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  9. 14: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  10. 18: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  11. 1c: 0c 94 ef 04 jmp 0x9de ; 0x9de <__vector_7>
  12. 20: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  13. 24: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  14. 28: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  15. 2c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  16. 30: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  17. 34: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  18. 38: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  19. 3c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  20. 40: 0c 94 a5 04 jmp 0x94a ; 0x94a <__vector_16>
  21. 44: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  22. 48: 0c 94 97 05 jmp 0xb2e ; 0xb2e <__vector_18>
  23. 4c: 0c 94 71 05 jmp 0xae2 ; 0xae2 <__vector_19>
  24. 50: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  25. 54: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  26. 58: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  27. 5c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  28. 60: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  29. 64: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
  30. 00000068 <__trampolines_end>:
  31. 68: 00 00 nop
  32. 6a: 00 08 sbc r0, r0
  33. 6c: 00 02 muls r16, r16
  34. 6e: 01 00 .word 0x0001 ; ????
  35. 70: 00 03 mulsu r16, r16
  36. 72: 04 07 cpc r16, r20
  37. ...
  38. 0000007c <_ZL21tone_pin_to_timer_PGM>:
  39. 7c: 02 .
  40. 0000007d <port_to_output_PGM>:
  41. 7d: 00 00 00 00 25 00 28 00 2b 00 ....%.(.+.
  42. 00000087 <port_to_mode_PGM>:
  43. 87: 00 00 00 00 24 00 27 00 2a 00 ....$.'.*.
  44. 00000091 <digital_pin_to_port_PGM>:
  45. 91: 04 04 04 04 04 04 04 04 02 02 02 02 02 02 03 03 ................
  46. a1: 03 03 03 03 ....
  47. 000000a5 <digital_pin_to_bit_mask_PGM>:
  48. a5: 01 02 04 08 10 20 40 80 01 02 04 08 10 20 01 02 ..... @...... ..
  49. b5: 04 08 10 20 00 ... .
  50. 000000ba <__ctors_start>:
  51. ba: 50 08 sbc r5, r0
  52. 000000bc <__ctors_end>:
  53. bc: 11 24 eor r1, r1
  54. be: 1f be out 0x3f, r1 ; 63
  55. c0: cf ef ldi r28, 0xFF ; 255
  56. c2: d8 e0 ldi r29, 0x08 ; 8
  57. c4: de bf out 0x3e, r29 ; 62
  58. c6: cd bf out 0x3d, r28 ; 61
  59. 000000c8 <__do_copy_data>:
  60. c8: 11 e0 ldi r17, 0x01 ; 1
  61. ca: a0 e0 ldi r26, 0x00 ; 0
  62. cc: b1 e0 ldi r27, 0x01 ; 1
  63. ce: e4 eb ldi r30, 0xB4 ; 180
  64. d0: f1 e1 ldi r31, 0x11 ; 17
  65. d2: 02 c0 rjmp .+4 ; 0xd8 <__do_copy_data+0x10>
  66. d4: 05 90 lpm r0, Z+
  67. d6: 0d 92 st X+, r0
  68. d8: a2 33 cpi r26, 0x32 ; 50
  69. da: b1 07 cpc r27, r17
  70. dc: d9 f7 brne .-10 ; 0xd4 <__do_copy_data+0xc>
  71. 000000de <__do_clear_bss>:
  72. de: 21 e0 ldi r18, 0x01 ; 1
  73. e0: a2 e3 ldi r26, 0x32 ; 50
  74. e2: b1 e0 ldi r27, 0x01 ; 1
  75. e4: 01 c0 rjmp .+2 ; 0xe8 <.do_clear_bss_start>
  76. 000000e6 <.do_clear_bss_loop>:
  77. e6: 1d 92 st X+, r1
  78. 000000e8 <.do_clear_bss_start>:
  79. e8: ab 3e cpi r26, 0xEB ; 235
  80. ea: b2 07 cpc r27, r18
  81. ec: e1 f7 brne .-8 ; 0xe6 <.do_clear_bss_loop>
  82. 000000ee <__do_global_ctors>:
  83. ee: 10 e0 ldi r17, 0x00 ; 0
  84. f0: ce e5 ldi r28, 0x5E ; 94
  85. f2: d0 e0 ldi r29, 0x00 ; 0
  86. f4: 04 c0 rjmp .+8 ; 0xfe <__do_global_ctors+0x10>
  87. f6: 21 97 sbiw r28, 0x01 ; 1
  88. f8: fe 01 movw r30, r28
  89. fa: 0e 94 cd 08 call 0x119a ; 0x119a <__tablejump2__>
  90. fe: cd 35 cpi r28, 0x5D ; 93
  91. 100: d1 07 cpc r29, r17
  92. 102: c9 f7 brne .-14 ; 0xf6 <__do_global_ctors+0x8>
  93. 104: 0e 94 c9 05 call 0xb92 ; 0xb92 <main>
  94. 108: 0c 94 d8 08 jmp 0x11b0 ; 0x11b0 <_exit>
  95. 0000010c <__bad_interrupt>:
  96. 10c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
  97. 00000110 <pinMode.constprop.17>:
  98. #include "wiring_private.h"
  99. #include "pins_arduino.h"
  100. void pinMode(uint8_t pin, uint8_t mode)
  101. {
  102. uint8_t bit = digitalPinToBitMask(pin);
  103. 110: 90 e0 ldi r25, 0x00 ; 0
  104. 112: fc 01 movw r30, r24
  105. 114: eb 55 subi r30, 0x5B ; 91
  106. 116: ff 4f sbci r31, 0xFF ; 255
  107. 118: 24 91 lpm r18, Z
  108. uint8_t port = digitalPinToPort(pin);
  109. 11a: fc 01 movw r30, r24
  110. 11c: ef 56 subi r30, 0x6F ; 111
  111. 11e: ff 4f sbci r31, 0xFF ; 255
  112. 120: 84 91 lpm r24, Z
  113. volatile uint8_t *reg, *out;
  114. if (port == NOT_A_PIN) return;
  115. 122: 88 23 and r24, r24
  116. 124: 99 f0 breq .+38 ; 0x14c <pinMode.constprop.17+0x3c>
  117. // JWS: can I let the optimizer do this?
  118. reg = portModeRegister(port);
  119. 126: 90 e0 ldi r25, 0x00 ; 0
  120. 128: 88 0f add r24, r24
  121. 12a: 99 1f adc r25, r25
  122. 12c: fc 01 movw r30, r24
  123. 12e: e9 57 subi r30, 0x79 ; 121
  124. 130: ff 4f sbci r31, 0xFF ; 255
  125. 132: a5 91 lpm r26, Z+
  126. 134: b4 91 lpm r27, Z
  127. out = portOutputRegister(port);
  128. 136: fc 01 movw r30, r24
  129. 138: e3 58 subi r30, 0x83 ; 131
  130. 13a: ff 4f sbci r31, 0xFF ; 255
  131. 13c: 85 91 lpm r24, Z+
  132. 13e: 94 91 lpm r25, Z
  133. cli();
  134. *reg &= ~bit;
  135. *out |= bit;
  136. SREG = oldSREG;
  137. } else {
  138. uint8_t oldSREG = SREG;
  139. 140: 8f b7 in r24, 0x3f ; 63
  140. cli();
  141. 142: f8 94 cli
  142. *reg |= bit;
  143. 144: ec 91 ld r30, X
  144. 146: e2 2b or r30, r18
  145. 148: ec 93 st X, r30
  146. SREG = oldSREG;
  147. 14a: 8f bf out 0x3f, r24 ; 63
  148. 14c: 08 95 ret
  149. 0000014e <_Z4tonehjm.constprop.15>:
  150. // frequency (in hertz) and duration (in milliseconds).
  151. void tone(uint8_t _pin, unsigned int frequency, unsigned long duration)
  152. 14e: 4f 92 push r4
  153. 150: 5f 92 push r5
  154. 152: 6f 92 push r6
  155. 154: 7f 92 push r7
  156. 156: 8f 92 push r8
  157. 158: 9f 92 push r9
  158. 15a: af 92 push r10
  159. 15c: bf 92 push r11
  160. 15e: cf 92 push r12
  161. 160: df 92 push r13
  162. 162: ef 92 push r14
  163. 164: ff 92 push r15
  164. 166: 1f 93 push r17
  165. 168: cf 93 push r28
  166. 16a: df 93 push r29
  167. 16c: ec 01 movw r28, r24
  168. {
  169. int8_t _timer = -1;
  170. // if we're already using the pin, the timer should be configured.
  171. for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
  172. if (tone_pins[i] == _pin) {
  173. 16e: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__data_start>
  174. 172: 85 30 cpi r24, 0x05 ; 5
  175. 174: 21 f0 breq .+8 ; 0x17e <_Z4tonehjm.constprop.15+0x30>
  176. }
  177. }
  178. // search for an unused timer.
  179. for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
  180. if (tone_pins[i] == 255) {
  181. 176: 8f 3f cpi r24, 0xFF ; 255
  182. 178: 09 f0 breq .+2 ; 0x17c <_Z4tonehjm.constprop.15+0x2e>
  183. 17a: 07 c2 rjmp .+1038 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  184. 17c: 04 c0 rjmp .+8 ; 0x186 <_Z4tonehjm.constprop.15+0x38>
  185. int8_t _timer = -1;
  186. // if we're already using the pin, the timer should be configured.
  187. for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
  188. if (tone_pins[i] == _pin) {
  189. return pgm_read_byte(tone_pin_to_timer_PGM + i);
  190. 17e: ec e7 ldi r30, 0x7C ; 124
  191. 180: f0 e0 ldi r31, 0x00 ; 0
  192. 182: 14 91 lpm r17, Z
  193. 184: 6e c0 rjmp .+220 ; 0x262 <_Z4tonehjm.constprop.15+0x114>
  194. }
  195. // search for an unused timer.
  196. for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
  197. if (tone_pins[i] == 255) {
  198. tone_pins[i] = _pin;
  199. 186: 85 e0 ldi r24, 0x05 ; 5
  200. 188: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__data_start>
  201. _timer = pgm_read_byte(tone_pin_to_timer_PGM + i);
  202. 18c: ec e7 ldi r30, 0x7C ; 124
  203. 18e: f0 e0 ldi r31, 0x00 ; 0
  204. 190: 14 91 lpm r17, Z
  205. break;
  206. }
  207. }
  208. if (_timer != -1)
  209. 192: 1f 3f cpi r17, 0xFF ; 255
  210. 194: 09 f4 brne .+2 ; 0x198 <_Z4tonehjm.constprop.15+0x4a>
  211. 196: f9 c1 rjmp .+1010 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  212. {
  213. // Set timer specific stuff
  214. // All timers in CTC mode
  215. // 8 bit timers will require changing prescalar values,
  216. // whereas 16 bit timers are set to either ck/1 or ck/64 prescalar
  217. switch (_timer)
  218. 198: 11 30 cpi r17, 0x01 ; 1
  219. 19a: 09 f4 brne .+2 ; 0x19e <_Z4tonehjm.constprop.15+0x50>
  220. 19c: 40 c0 rjmp .+128 ; 0x21e <_Z4tonehjm.constprop.15+0xd0>
  221. 19e: 30 f1 brcs .+76 ; 0x1ec <_Z4tonehjm.constprop.15+0x9e>
  222. 1a0: 12 30 cpi r17, 0x02 ; 2
  223. 1a2: 09 f0 breq .+2 ; 0x1a6 <_Z4tonehjm.constprop.15+0x58>
  224. 1a4: 5e c0 rjmp .+188 ; 0x262 <_Z4tonehjm.constprop.15+0x114>
  225. #endif
  226. #if defined(TCCR2A) && defined(TCCR2B)
  227. case 2:
  228. // 8 bit timer
  229. TCCR2A = 0;
  230. 1a6: 10 92 b0 00 sts 0x00B0, r1 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  231. TCCR2B = 0;
  232. 1aa: 10 92 b1 00 sts 0x00B1, r1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  233. bitWrite(TCCR2A, WGM21, 1);
  234. 1ae: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  235. 1b2: 82 60 ori r24, 0x02 ; 2
  236. 1b4: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  237. bitWrite(TCCR2B, CS20, 1);
  238. 1b8: 80 91 b1 00 lds r24, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  239. 1bc: 81 60 ori r24, 0x01 ; 1
  240. 1be: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  241. timer2_pin_port = portOutputRegister(digitalPinToPort(_pin));
  242. 1c2: e6 e9 ldi r30, 0x96 ; 150
  243. 1c4: f0 e0 ldi r31, 0x00 ; 0
  244. 1c6: e4 91 lpm r30, Z
  245. 1c8: f0 e0 ldi r31, 0x00 ; 0
  246. 1ca: ee 0f add r30, r30
  247. 1cc: ff 1f adc r31, r31
  248. 1ce: e3 58 subi r30, 0x83 ; 131
  249. 1d0: ff 4f sbci r31, 0xFF ; 255
  250. 1d2: 85 91 lpm r24, Z+
  251. 1d4: 94 91 lpm r25, Z
  252. 1d6: 90 93 dc 01 sts 0x01DC, r25 ; 0x8001dc <timer2_pin_port+0x1>
  253. 1da: 80 93 db 01 sts 0x01DB, r24 ; 0x8001db <timer2_pin_port>
  254. timer2_pin_mask = digitalPinToBitMask(_pin);
  255. 1de: ea ea ldi r30, 0xAA ; 170
  256. 1e0: f0 e0 ldi r31, 0x00 ; 0
  257. 1e2: e4 91 lpm r30, Z
  258. 1e4: e0 93 da 01 sts 0x01DA, r30 ; 0x8001da <timer2_pin_mask>
  259. 1e8: 12 e0 ldi r17, 0x02 ; 2
  260. 1ea: cb c1 rjmp .+918 ; 0x582 <__LOCK_REGION_LENGTH__+0x182>
  261. switch (_timer)
  262. {
  263. #if defined(TCCR0A) && defined(TCCR0B) && defined(WGM01)
  264. case 0:
  265. // 8 bit timer
  266. TCCR0A = 0;
  267. 1ec: 14 bc out 0x24, r1 ; 36
  268. TCCR0B = 0;
  269. 1ee: 15 bc out 0x25, r1 ; 37
  270. bitWrite(TCCR0A, WGM01, 1);
  271. 1f0: 84 b5 in r24, 0x24 ; 36
  272. 1f2: 82 60 ori r24, 0x02 ; 2
  273. 1f4: 84 bd out 0x24, r24 ; 36
  274. bitWrite(TCCR0B, CS00, 1);
  275. 1f6: 85 b5 in r24, 0x25 ; 37
  276. 1f8: 81 60 ori r24, 0x01 ; 1
  277. 1fa: 85 bd out 0x25, r24 ; 37
  278. timer0_pin_port = portOutputRegister(digitalPinToPort(_pin));
  279. 1fc: e6 e9 ldi r30, 0x96 ; 150
  280. 1fe: f0 e0 ldi r31, 0x00 ; 0
  281. 200: e4 91 lpm r30, Z
  282. 202: f0 e0 ldi r31, 0x00 ; 0
  283. 204: ee 0f add r30, r30
  284. 206: ff 1f adc r31, r31
  285. 208: e3 58 subi r30, 0x83 ; 131
  286. 20a: ff 4f sbci r31, 0xFF ; 255
  287. 20c: 85 91 lpm r24, Z+
  288. 20e: 94 91 lpm r25, Z
  289. timer0_pin_mask = digitalPinToBitMask(_pin);
  290. 210: ea ea ldi r30, 0xAA ; 170
  291. 212: f0 e0 ldi r31, 0x00 ; 0
  292. 214: e4 91 lpm r30, Z
  293. 216: e0 93 de 01 sts 0x01DE, r30 ; 0x8001de <timer0_pin_mask>
  294. 21a: 10 e0 ldi r17, 0x00 ; 0
  295. 21c: b2 c1 rjmp .+868 ; 0x582 <__LOCK_REGION_LENGTH__+0x182>
  296. #endif
  297. #if defined(TCCR1A) && defined(TCCR1B) && defined(WGM12)
  298. case 1:
  299. // 16 bit timer
  300. TCCR1A = 0;
  301. 21e: 10 92 80 00 sts 0x0080, r1 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
  302. TCCR1B = 0;
  303. 222: 10 92 81 00 sts 0x0081, r1 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  304. bitWrite(TCCR1B, WGM12, 1);
  305. 226: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  306. 22a: 88 60 ori r24, 0x08 ; 8
  307. 22c: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  308. bitWrite(TCCR1B, CS10, 1);
  309. 230: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  310. 234: 81 60 ori r24, 0x01 ; 1
  311. 236: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  312. timer1_pin_port = portOutputRegister(digitalPinToPort(_pin));
  313. 23a: e6 e9 ldi r30, 0x96 ; 150
  314. 23c: f0 e0 ldi r31, 0x00 ; 0
  315. 23e: e4 91 lpm r30, Z
  316. 240: f0 e0 ldi r31, 0x00 ; 0
  317. 242: ee 0f add r30, r30
  318. 244: ff 1f adc r31, r31
  319. 246: e3 58 subi r30, 0x83 ; 131
  320. 248: ff 4f sbci r31, 0xFF ; 255
  321. 24a: 85 91 lpm r24, Z+
  322. 24c: 94 91 lpm r25, Z
  323. timer1_pin_mask = digitalPinToBitMask(_pin);
  324. 24e: ea ea ldi r30, 0xAA ; 170
  325. 250: f0 e0 ldi r31, 0x00 ; 0
  326. 252: e4 91 lpm r30, Z
  327. 254: e0 93 dd 01 sts 0x01DD, r30 ; 0x8001dd <timer1_pin_mask>
  328. _timer = toneBegin(_pin);
  329. if (_timer >= 0)
  330. {
  331. // Set the pinMode as OUTPUT
  332. pinMode(_pin, OUTPUT);
  333. 258: 85 e0 ldi r24, 0x05 ; 5
  334. 25a: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  335. 25e: 11 e0 ldi r17, 0x01 ; 1
  336. 260: b0 c0 rjmp .+352 ; 0x3c2 <_Z4tonehjm.constprop.15+0x274>
  337. uint32_t ocr = 0;
  338. int8_t _timer;
  339. _timer = toneBegin(_pin);
  340. if (_timer >= 0)
  341. 262: 17 fd sbrc r17, 7
  342. 264: 92 c1 rjmp .+804 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  343. {
  344. // Set the pinMode as OUTPUT
  345. pinMode(_pin, OUTPUT);
  346. 266: 85 e0 ldi r24, 0x05 ; 5
  347. 268: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  348. // if we are using an 8 bit timer, scan through prescalars to find the best fit
  349. if (_timer == 0 || _timer == 2)
  350. 26c: 81 2f mov r24, r17
  351. 26e: 8d 7f andi r24, 0xFD ; 253
  352. 270: 09 f0 breq .+2 ; 0x274 <_Z4tonehjm.constprop.15+0x126>
  353. 272: a7 c0 rjmp .+334 ; 0x3c2 <_Z4tonehjm.constprop.15+0x274>
  354. {
  355. ocr = F_CPU / frequency / 2 - 1;
  356. 274: 4e 01 movw r8, r28
  357. 276: a1 2c mov r10, r1
  358. 278: b1 2c mov r11, r1
  359. 27a: 60 e0 ldi r22, 0x00 ; 0
  360. 27c: 72 e1 ldi r23, 0x12 ; 18
  361. 27e: 8a e7 ldi r24, 0x7A ; 122
  362. 280: 90 e0 ldi r25, 0x00 ; 0
  363. 282: a5 01 movw r20, r10
  364. 284: 94 01 movw r18, r8
  365. 286: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  366. 28a: 29 01 movw r4, r18
  367. 28c: 3a 01 movw r6, r20
  368. 28e: 69 01 movw r12, r18
  369. 290: 7a 01 movw r14, r20
  370. 292: 21 e0 ldi r18, 0x01 ; 1
  371. 294: c2 1a sub r12, r18
  372. 296: d1 08 sbc r13, r1
  373. 298: e1 08 sbc r14, r1
  374. 29a: f1 08 sbc r15, r1
  375. prescalarbits = 0b001; // ck/1: same for both timers
  376. if (ocr > 255)
  377. 29c: 8f ef ldi r24, 0xFF ; 255
  378. 29e: c8 16 cp r12, r24
  379. 2a0: d1 04 cpc r13, r1
  380. 2a2: e1 04 cpc r14, r1
  381. 2a4: f1 04 cpc r15, r1
  382. 2a6: 09 f0 breq .+2 ; 0x2aa <_Z4tonehjm.constprop.15+0x15c>
  383. 2a8: 08 f4 brcc .+2 ; 0x2ac <_Z4tonehjm.constprop.15+0x15e>
  384. 2aa: 4b c0 rjmp .+150 ; 0x342 <_Z4tonehjm.constprop.15+0x1f4>
  385. {
  386. ocr = F_CPU / frequency / 2 / 8 - 1;
  387. 2ac: 60 e4 ldi r22, 0x40 ; 64
  388. 2ae: 72 e4 ldi r23, 0x42 ; 66
  389. 2b0: 8f e0 ldi r24, 0x0F ; 15
  390. 2b2: 90 e0 ldi r25, 0x00 ; 0
  391. 2b4: a5 01 movw r20, r10
  392. 2b6: 94 01 movw r18, r8
  393. 2b8: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  394. 2bc: 69 01 movw r12, r18
  395. 2be: 7a 01 movw r14, r20
  396. 2c0: 81 e0 ldi r24, 0x01 ; 1
  397. 2c2: c8 1a sub r12, r24
  398. 2c4: d1 08 sbc r13, r1
  399. 2c6: e1 08 sbc r14, r1
  400. 2c8: f1 08 sbc r15, r1
  401. prescalarbits = 0b010; // ck/8: same for both timers
  402. if (_timer == 2 && ocr > 255)
  403. 2ca: 12 30 cpi r17, 0x02 ; 2
  404. 2cc: 01 f5 brne .+64 ; 0x30e <_Z4tonehjm.constprop.15+0x1c0>
  405. 2ce: 2f ef ldi r18, 0xFF ; 255
  406. 2d0: c2 16 cp r12, r18
  407. 2d2: d1 04 cpc r13, r1
  408. 2d4: e1 04 cpc r14, r1
  409. 2d6: f1 04 cpc r15, r1
  410. 2d8: 09 f0 breq .+2 ; 0x2dc <_Z4tonehjm.constprop.15+0x18e>
  411. 2da: 08 f4 brcc .+2 ; 0x2de <_Z4tonehjm.constprop.15+0x190>
  412. 2dc: ea c0 rjmp .+468 ; 0x4b2 <__LOCK_REGION_LENGTH__+0xb2>
  413. {
  414. ocr = F_CPU / frequency / 2 / 32 - 1;
  415. 2de: 60 e9 ldi r22, 0x90 ; 144
  416. 2e0: 70 ed ldi r23, 0xD0 ; 208
  417. 2e2: 83 e0 ldi r24, 0x03 ; 3
  418. 2e4: 90 e0 ldi r25, 0x00 ; 0
  419. 2e6: a5 01 movw r20, r10
  420. 2e8: 94 01 movw r18, r8
  421. 2ea: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  422. 2ee: 69 01 movw r12, r18
  423. 2f0: 7a 01 movw r14, r20
  424. 2f2: 81 e0 ldi r24, 0x01 ; 1
  425. 2f4: c8 1a sub r12, r24
  426. 2f6: d1 08 sbc r13, r1
  427. 2f8: e1 08 sbc r14, r1
  428. 2fa: f1 08 sbc r15, r1
  429. prescalarbits = 0b011;
  430. }
  431. if (ocr > 255)
  432. 2fc: 2f ef ldi r18, 0xFF ; 255
  433. 2fe: c2 16 cp r12, r18
  434. 300: d1 04 cpc r13, r1
  435. 302: e1 04 cpc r14, r1
  436. 304: f1 04 cpc r15, r1
  437. 306: 09 f0 breq .+2 ; 0x30a <_Z4tonehjm.constprop.15+0x1bc>
  438. 308: 30 f5 brcc .+76 ; 0x356 <_Z4tonehjm.constprop.15+0x208>
  439. prescalarbits = 0b010; // ck/8: same for both timers
  440. if (_timer == 2 && ocr > 255)
  441. {
  442. ocr = F_CPU / frequency / 2 / 32 - 1;
  443. prescalarbits = 0b011;
  444. 30a: 83 e0 ldi r24, 0x03 ; 3
  445. 30c: 53 c0 rjmp .+166 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
  446. }
  447. if (ocr > 255)
  448. 30e: 8f ef ldi r24, 0xFF ; 255
  449. 310: c8 16 cp r12, r24
  450. 312: d1 04 cpc r13, r1
  451. 314: e1 04 cpc r14, r1
  452. 316: f1 04 cpc r15, r1
  453. 318: b1 f0 breq .+44 ; 0x346 <_Z4tonehjm.constprop.15+0x1f8>
  454. 31a: a8 f0 brcs .+42 ; 0x346 <_Z4tonehjm.constprop.15+0x1f8>
  455. {
  456. ocr = F_CPU / frequency / 2 / 64 - 1;
  457. 31c: 68 e4 ldi r22, 0x48 ; 72
  458. 31e: 78 ee ldi r23, 0xE8 ; 232
  459. 320: 81 e0 ldi r24, 0x01 ; 1
  460. 322: 90 e0 ldi r25, 0x00 ; 0
  461. 324: a5 01 movw r20, r10
  462. 326: 94 01 movw r18, r8
  463. 328: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  464. 32c: 69 01 movw r12, r18
  465. 32e: 7a 01 movw r14, r20
  466. 330: 81 e0 ldi r24, 0x01 ; 1
  467. 332: c8 1a sub r12, r24
  468. 334: d1 08 sbc r13, r1
  469. 336: e1 08 sbc r14, r1
  470. 338: f1 08 sbc r15, r1
  471. prescalarbits = _timer == 0 ? 0b011 : 0b100;
  472. 33a: 11 23 and r17, r17
  473. 33c: 09 f4 brne .+2 ; 0x340 <_Z4tonehjm.constprop.15+0x1f2>
  474. 33e: ee c0 rjmp .+476 ; 0x51c <__LOCK_REGION_LENGTH__+0x11c>
  475. 340: e4 c0 rjmp .+456 ; 0x50a <__LOCK_REGION_LENGTH__+0x10a>
  476. // if we are using an 8 bit timer, scan through prescalars to find the best fit
  477. if (_timer == 0 || _timer == 2)
  478. {
  479. ocr = F_CPU / frequency / 2 - 1;
  480. prescalarbits = 0b001; // ck/1: same for both timers
  481. 342: 81 e0 ldi r24, 0x01 ; 1
  482. 344: 01 c0 rjmp .+2 ; 0x348 <_Z4tonehjm.constprop.15+0x1fa>
  483. if (ocr > 255)
  484. {
  485. ocr = F_CPU / frequency / 2 / 8 - 1;
  486. prescalarbits = 0b010; // ck/8: same for both timers
  487. 346: 82 e0 ldi r24, 0x02 ; 2
  488. }
  489. }
  490. }
  491. #if defined(TCCR0B)
  492. if (_timer == 0)
  493. 348: 11 11 cpse r17, r1
  494. 34a: 34 c0 rjmp .+104 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
  495. {
  496. TCCR0B = (TCCR0B & 0b11111000) | prescalarbits;
  497. 34c: 95 b5 in r25, 0x25 ; 37
  498. 34e: 98 7f andi r25, 0xF8 ; 248
  499. 350: 89 2b or r24, r25
  500. 352: 85 bd out 0x25, r24 ; 37
  501. 354: 68 c0 rjmp .+208 ; 0x426 <__LOCK_REGION_LENGTH__+0x26>
  502. prescalarbits = 0b011;
  503. }
  504. if (ocr > 255)
  505. {
  506. ocr = F_CPU / frequency / 2 / 64 - 1;
  507. 356: 68 e4 ldi r22, 0x48 ; 72
  508. 358: 78 ee ldi r23, 0xE8 ; 232
  509. 35a: 81 e0 ldi r24, 0x01 ; 1
  510. 35c: 90 e0 ldi r25, 0x00 ; 0
  511. 35e: a5 01 movw r20, r10
  512. 360: 94 01 movw r18, r8
  513. 362: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  514. 366: 69 01 movw r12, r18
  515. 368: 7a 01 movw r14, r20
  516. 36a: 81 e0 ldi r24, 0x01 ; 1
  517. 36c: c8 1a sub r12, r24
  518. 36e: d1 08 sbc r13, r1
  519. 370: e1 08 sbc r14, r1
  520. 372: f1 08 sbc r15, r1
  521. prescalarbits = _timer == 0 ? 0b011 : 0b100;
  522. if (_timer == 2 && ocr > 255)
  523. 374: 2f ef ldi r18, 0xFF ; 255
  524. 376: c2 16 cp r12, r18
  525. 378: d1 04 cpc r13, r1
  526. 37a: e1 04 cpc r14, r1
  527. 37c: f1 04 cpc r15, r1
  528. 37e: 09 f0 breq .+2 ; 0x382 <_Z4tonehjm.constprop.15+0x234>
  529. 380: 08 f4 brcc .+2 ; 0x384 <_Z4tonehjm.constprop.15+0x236>
  530. 382: 95 c0 rjmp .+298 ; 0x4ae <__LOCK_REGION_LENGTH__+0xae>
  531. {
  532. ocr = F_CPU / frequency / 2 / 128 - 1;
  533. 384: 64 e2 ldi r22, 0x24 ; 36
  534. 386: 74 ef ldi r23, 0xF4 ; 244
  535. 388: 80 e0 ldi r24, 0x00 ; 0
  536. 38a: 90 e0 ldi r25, 0x00 ; 0
  537. 38c: a5 01 movw r20, r10
  538. 38e: 94 01 movw r18, r8
  539. 390: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  540. 394: 69 01 movw r12, r18
  541. 396: 7a 01 movw r14, r20
  542. 398: 81 e0 ldi r24, 0x01 ; 1
  543. 39a: c8 1a sub r12, r24
  544. 39c: d1 08 sbc r13, r1
  545. 39e: e1 08 sbc r14, r1
  546. 3a0: f1 08 sbc r15, r1
  547. prescalarbits = 0b101;
  548. }
  549. if (ocr > 255)
  550. 3a2: 2f ef ldi r18, 0xFF ; 255
  551. 3a4: c2 16 cp r12, r18
  552. 3a6: d1 04 cpc r13, r1
  553. 3a8: e1 04 cpc r14, r1
  554. 3aa: f1 04 cpc r15, r1
  555. 3ac: 11 f0 breq .+4 ; 0x3b2 <_Z4tonehjm.constprop.15+0x264>
  556. 3ae: 08 f0 brcs .+2 ; 0x3b2 <_Z4tonehjm.constprop.15+0x264>
  557. 3b0: 82 c0 rjmp .+260 ; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6>
  558. prescalarbits = _timer == 0 ? 0b011 : 0b100;
  559. if (_timer == 2 && ocr > 255)
  560. {
  561. ocr = F_CPU / frequency / 2 / 128 - 1;
  562. prescalarbits = 0b101;
  563. 3b2: 85 e0 ldi r24, 0x05 ; 5
  564. }
  565. else
  566. #endif
  567. #if defined(TCCR2B)
  568. {
  569. TCCR2B = (TCCR2B & 0b11111000) | prescalarbits;
  570. 3b4: 90 91 b1 00 lds r25, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  571. 3b8: 98 7f andi r25, 0xF8 ; 248
  572. 3ba: 89 2b or r24, r25
  573. 3bc: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  574. 3c0: 32 c0 rjmp .+100 ; 0x426 <__LOCK_REGION_LENGTH__+0x26>
  575. #endif
  576. }
  577. else
  578. {
  579. // two choices for the 16 bit timers: ck/1 or ck/64
  580. ocr = F_CPU / frequency / 2 - 1;
  581. 3c2: 4e 01 movw r8, r28
  582. 3c4: a1 2c mov r10, r1
  583. 3c6: b1 2c mov r11, r1
  584. 3c8: 60 e0 ldi r22, 0x00 ; 0
  585. 3ca: 72 e1 ldi r23, 0x12 ; 18
  586. 3cc: 8a e7 ldi r24, 0x7A ; 122
  587. 3ce: 90 e0 ldi r25, 0x00 ; 0
  588. 3d0: a5 01 movw r20, r10
  589. 3d2: 94 01 movw r18, r8
  590. 3d4: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  591. 3d8: 69 01 movw r12, r18
  592. 3da: 7a 01 movw r14, r20
  593. 3dc: 81 e0 ldi r24, 0x01 ; 1
  594. 3de: c8 1a sub r12, r24
  595. 3e0: d1 08 sbc r13, r1
  596. 3e2: e1 08 sbc r14, r1
  597. 3e4: f1 08 sbc r15, r1
  598. prescalarbits = 0b001;
  599. if (ocr > 0xffff)
  600. 3e6: c1 14 cp r12, r1
  601. 3e8: d1 04 cpc r13, r1
  602. 3ea: 21 e0 ldi r18, 0x01 ; 1
  603. 3ec: e2 06 cpc r14, r18
  604. 3ee: f1 04 cpc r15, r1
  605. 3f0: 88 f0 brcs .+34 ; 0x414 <__LOCK_REGION_LENGTH__+0x14>
  606. {
  607. ocr = F_CPU / frequency / 2 / 64 - 1;
  608. 3f2: 68 e4 ldi r22, 0x48 ; 72
  609. 3f4: 78 ee ldi r23, 0xE8 ; 232
  610. 3f6: 81 e0 ldi r24, 0x01 ; 1
  611. 3f8: 90 e0 ldi r25, 0x00 ; 0
  612. 3fa: a5 01 movw r20, r10
  613. 3fc: 94 01 movw r18, r8
  614. 3fe: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  615. 402: 69 01 movw r12, r18
  616. 404: 7a 01 movw r14, r20
  617. 406: 81 e0 ldi r24, 0x01 ; 1
  618. 408: c8 1a sub r12, r24
  619. 40a: d1 08 sbc r13, r1
  620. 40c: e1 08 sbc r14, r1
  621. 40e: f1 08 sbc r15, r1
  622. prescalarbits = 0b011;
  623. 410: 83 e0 ldi r24, 0x03 ; 3
  624. 412: 01 c0 rjmp .+2 ; 0x416 <__LOCK_REGION_LENGTH__+0x16>
  625. else
  626. {
  627. // two choices for the 16 bit timers: ck/1 or ck/64
  628. ocr = F_CPU / frequency / 2 - 1;
  629. prescalarbits = 0b001;
  630. 414: 81 e0 ldi r24, 0x01 ; 1
  631. {
  632. ocr = F_CPU / frequency / 2 / 64 - 1;
  633. prescalarbits = 0b011;
  634. }
  635. if (_timer == 1)
  636. 416: 11 30 cpi r17, 0x01 ; 1
  637. 418: 31 f4 brne .+12 ; 0x426 <__LOCK_REGION_LENGTH__+0x26>
  638. {
  639. #if defined(TCCR1B)
  640. TCCR1B = (TCCR1B & 0b11111000) | prescalarbits;
  641. 41a: 90 91 81 00 lds r25, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  642. 41e: 98 7f andi r25, 0xF8 ; 248
  643. 420: 89 2b or r24, r25
  644. 422: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  645. // Calculate the toggle count
  646. if (duration > 0)
  647. {
  648. toggle_count = 2 * frequency * duration / 1000;
  649. 426: 9e 01 movw r18, r28
  650. 428: 22 0f add r18, r18
  651. 42a: 33 1f adc r19, r19
  652. 42c: a4 e6 ldi r26, 0x64 ; 100
  653. 42e: b0 e0 ldi r27, 0x00 ; 0
  654. 430: 0e 94 be 08 call 0x117c ; 0x117c <__umulhisi3>
  655. 434: 28 ee ldi r18, 0xE8 ; 232
  656. 436: 33 e0 ldi r19, 0x03 ; 3
  657. 438: 40 e0 ldi r20, 0x00 ; 0
  658. 43a: 50 e0 ldi r21, 0x00 ; 0
  659. 43c: 0e 94 7d 08 call 0x10fa ; 0x10fa <__udivmodsi4>
  660. }
  661. // Set the OCR for the given timer,
  662. // set the toggle count,
  663. // then turn on the interrupts
  664. switch (_timer)
  665. 440: 11 30 cpi r17, 0x01 ; 1
  666. 442: 99 f0 breq .+38 ; 0x46a <__LOCK_REGION_LENGTH__+0x6a>
  667. 444: 12 30 cpi r17, 0x02 ; 2
  668. 446: 19 f1 breq .+70 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e>
  669. 448: 11 11 cpse r17, r1
  670. 44a: 9f c0 rjmp .+318 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  671. {
  672. #if defined(OCR0A) && defined(TIMSK0) && defined(OCIE0A)
  673. case 0:
  674. OCR0A = ocr;
  675. 44c: c7 bc out 0x27, r12 ; 39
  676. timer0_toggle_count = toggle_count;
  677. 44e: 20 93 e7 01 sts 0x01E7, r18 ; 0x8001e7 <timer0_toggle_count>
  678. 452: 30 93 e8 01 sts 0x01E8, r19 ; 0x8001e8 <timer0_toggle_count+0x1>
  679. 456: 40 93 e9 01 sts 0x01E9, r20 ; 0x8001e9 <timer0_toggle_count+0x2>
  680. 45a: 50 93 ea 01 sts 0x01EA, r21 ; 0x8001ea <timer0_toggle_count+0x3>
  681. bitWrite(TIMSK0, OCIE0A, 1);
  682. 45e: 80 91 6e 00 lds r24, 0x006E ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  683. 462: 82 60 ori r24, 0x02 ; 2
  684. 464: 80 93 6e 00 sts 0x006E, r24 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  685. 468: 90 c0 rjmp .+288 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  686. break;
  687. #endif
  688. case 1:
  689. #if defined(OCR1A) && defined(TIMSK1) && defined(OCIE1A)
  690. OCR1A = ocr;
  691. 46a: d0 92 89 00 sts 0x0089, r13 ; 0x800089 <__TEXT_REGION_LENGTH__+0x7e0089>
  692. 46e: c0 92 88 00 sts 0x0088, r12 ; 0x800088 <__TEXT_REGION_LENGTH__+0x7e0088>
  693. timer1_toggle_count = toggle_count;
  694. 472: 20 93 e3 01 sts 0x01E3, r18 ; 0x8001e3 <timer1_toggle_count>
  695. 476: 30 93 e4 01 sts 0x01E4, r19 ; 0x8001e4 <timer1_toggle_count+0x1>
  696. 47a: 40 93 e5 01 sts 0x01E5, r20 ; 0x8001e5 <timer1_toggle_count+0x2>
  697. 47e: 50 93 e6 01 sts 0x01E6, r21 ; 0x8001e6 <timer1_toggle_count+0x3>
  698. bitWrite(TIMSK1, OCIE1A, 1);
  699. 482: 80 91 6f 00 lds r24, 0x006F ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
  700. 486: 82 60 ori r24, 0x02 ; 2
  701. 488: 80 93 6f 00 sts 0x006F, r24 ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
  702. 48c: 7e c0 rjmp .+252 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  703. #endif
  704. break;
  705. #if defined(OCR2A) && defined(TIMSK2) && defined(OCIE2A)
  706. case 2:
  707. OCR2A = ocr;
  708. 48e: c0 92 b3 00 sts 0x00B3, r12 ; 0x8000b3 <__TEXT_REGION_LENGTH__+0x7e00b3>
  709. timer2_toggle_count = toggle_count;
  710. 492: 20 93 df 01 sts 0x01DF, r18 ; 0x8001df <timer2_toggle_count>
  711. 496: 30 93 e0 01 sts 0x01E0, r19 ; 0x8001e0 <timer2_toggle_count+0x1>
  712. 49a: 40 93 e1 01 sts 0x01E1, r20 ; 0x8001e1 <timer2_toggle_count+0x2>
  713. 49e: 50 93 e2 01 sts 0x01E2, r21 ; 0x8001e2 <timer2_toggle_count+0x3>
  714. bitWrite(TIMSK2, OCIE2A, 1);
  715. 4a2: 80 91 70 00 lds r24, 0x0070 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
  716. 4a6: 82 60 ori r24, 0x02 ; 2
  717. 4a8: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
  718. 4ac: 6e c0 rjmp .+220 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
  719. }
  720. if (ocr > 255)
  721. {
  722. ocr = F_CPU / frequency / 2 / 64 - 1;
  723. prescalarbits = _timer == 0 ? 0b011 : 0b100;
  724. 4ae: 84 e0 ldi r24, 0x04 ; 4
  725. 4b0: 81 cf rjmp .-254 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
  726. ocr = F_CPU / frequency / 2 - 1;
  727. prescalarbits = 0b001; // ck/1: same for both timers
  728. if (ocr > 255)
  729. {
  730. ocr = F_CPU / frequency / 2 / 8 - 1;
  731. prescalarbits = 0b010; // ck/8: same for both timers
  732. 4b2: 82 e0 ldi r24, 0x02 ; 2
  733. 4b4: 7f cf rjmp .-258 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
  734. prescalarbits = 0b101;
  735. }
  736. if (ocr > 255)
  737. {
  738. ocr = F_CPU / frequency / 2 / 256 - 1;
  739. 4b6: 62 e1 ldi r22, 0x12 ; 18
  740. 4b8: 7a e7 ldi r23, 0x7A ; 122
  741. 4ba: 80 e0 ldi r24, 0x00 ; 0
  742. 4bc: 90 e0 ldi r25, 0x00 ; 0
  743. 4be: a5 01 movw r20, r10
  744. 4c0: 94 01 movw r18, r8
  745. 4c2: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  746. 4c6: 69 01 movw r12, r18
  747. 4c8: 7a 01 movw r14, r20
  748. 4ca: 81 e0 ldi r24, 0x01 ; 1
  749. 4cc: c8 1a sub r12, r24
  750. 4ce: d1 08 sbc r13, r1
  751. 4d0: e1 08 sbc r14, r1
  752. 4d2: f1 08 sbc r15, r1
  753. prescalarbits = _timer == 0 ? 0b100 : 0b110;
  754. if (ocr > 255)
  755. 4d4: 8f ef ldi r24, 0xFF ; 255
  756. 4d6: c8 16 cp r12, r24
  757. 4d8: d1 04 cpc r13, r1
  758. 4da: e1 04 cpc r14, r1
  759. 4dc: f1 04 cpc r15, r1
  760. 4de: 99 f0 breq .+38 ; 0x506 <__LOCK_REGION_LENGTH__+0x106>
  761. 4e0: 90 f0 brcs .+36 ; 0x506 <__LOCK_REGION_LENGTH__+0x106>
  762. {
  763. // can't do any better than /1024
  764. ocr = F_CPU / frequency / 2 / 1024 - 1;
  765. 4e2: d3 01 movw r26, r6
  766. 4e4: c2 01 movw r24, r4
  767. 4e6: 2a e0 ldi r18, 0x0A ; 10
  768. 4e8: b5 95 asr r27
  769. 4ea: a7 95 ror r26
  770. 4ec: 97 95 ror r25
  771. 4ee: 87 95 ror r24
  772. 4f0: 2a 95 dec r18
  773. 4f2: d1 f7 brne .-12 ; 0x4e8 <__LOCK_REGION_LENGTH__+0xe8>
  774. 4f4: 6c 01 movw r12, r24
  775. 4f6: 7d 01 movw r14, r26
  776. 4f8: 21 e0 ldi r18, 0x01 ; 1
  777. 4fa: c2 1a sub r12, r18
  778. 4fc: d1 08 sbc r13, r1
  779. 4fe: e1 08 sbc r14, r1
  780. 500: f1 08 sbc r15, r1
  781. prescalarbits = _timer == 0 ? 0b101 : 0b111;
  782. 502: 87 e0 ldi r24, 0x07 ; 7
  783. 504: 57 cf rjmp .-338 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
  784. }
  785. if (ocr > 255)
  786. {
  787. ocr = F_CPU / frequency / 2 / 256 - 1;
  788. prescalarbits = _timer == 0 ? 0b100 : 0b110;
  789. 506: 86 e0 ldi r24, 0x06 ; 6
  790. 508: 55 cf rjmp .-342 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
  791. {
  792. ocr = F_CPU / frequency / 2 / 128 - 1;
  793. prescalarbits = 0b101;
  794. }
  795. if (ocr > 255)
  796. 50a: 2f ef ldi r18, 0xFF ; 255
  797. 50c: c2 16 cp r12, r18
  798. 50e: d1 04 cpc r13, r1
  799. 510: e1 04 cpc r14, r1
  800. 512: f1 04 cpc r15, r1
  801. 514: 09 f0 breq .+2 ; 0x518 <__LOCK_REGION_LENGTH__+0x118>
  802. 516: 78 f6 brcc .-98 ; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6>
  803. }
  804. if (ocr > 255)
  805. {
  806. ocr = F_CPU / frequency / 2 / 64 - 1;
  807. prescalarbits = _timer == 0 ? 0b011 : 0b100;
  808. 518: 84 e0 ldi r24, 0x04 ; 4
  809. 51a: 16 cf rjmp .-468 ; 0x348 <_Z4tonehjm.constprop.15+0x1fa>
  810. {
  811. ocr = F_CPU / frequency / 2 / 128 - 1;
  812. prescalarbits = 0b101;
  813. }
  814. if (ocr > 255)
  815. 51c: 8f ef ldi r24, 0xFF ; 255
  816. 51e: c8 16 cp r12, r24
  817. 520: d1 04 cpc r13, r1
  818. 522: e1 04 cpc r14, r1
  819. 524: f1 04 cpc r15, r1
  820. 526: 59 f1 breq .+86 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e>
  821. 528: 50 f1 brcs .+84 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e>
  822. {
  823. ocr = F_CPU / frequency / 2 / 256 - 1;
  824. 52a: 62 e1 ldi r22, 0x12 ; 18
  825. 52c: 7a e7 ldi r23, 0x7A ; 122
  826. 52e: 80 e0 ldi r24, 0x00 ; 0
  827. 530: 90 e0 ldi r25, 0x00 ; 0
  828. 532: a5 01 movw r20, r10
  829. 534: 94 01 movw r18, r8
  830. 536: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
  831. 53a: 69 01 movw r12, r18
  832. 53c: 7a 01 movw r14, r20
  833. 53e: 81 e0 ldi r24, 0x01 ; 1
  834. 540: c8 1a sub r12, r24
  835. 542: d1 08 sbc r13, r1
  836. 544: e1 08 sbc r14, r1
  837. 546: f1 08 sbc r15, r1
  838. prescalarbits = _timer == 0 ? 0b100 : 0b110;
  839. if (ocr > 255)
  840. 548: 2f ef ldi r18, 0xFF ; 255
  841. 54a: c2 16 cp r12, r18
  842. 54c: d1 04 cpc r13, r1
  843. 54e: e1 04 cpc r14, r1
  844. 550: f1 04 cpc r15, r1
  845. 552: 99 f0 breq .+38 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a>
  846. 554: 90 f0 brcs .+36 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a>
  847. {
  848. // can't do any better than /1024
  849. ocr = F_CPU / frequency / 2 / 1024 - 1;
  850. 556: d3 01 movw r26, r6
  851. 558: c2 01 movw r24, r4
  852. 55a: 3a e0 ldi r19, 0x0A ; 10
  853. 55c: b5 95 asr r27
  854. 55e: a7 95 ror r26
  855. 560: 97 95 ror r25
  856. 562: 87 95 ror r24
  857. 564: 3a 95 dec r19
  858. 566: d1 f7 brne .-12 ; 0x55c <__LOCK_REGION_LENGTH__+0x15c>
  859. 568: 6c 01 movw r12, r24
  860. 56a: 7d 01 movw r14, r26
  861. 56c: 21 e0 ldi r18, 0x01 ; 1
  862. 56e: c2 1a sub r12, r18
  863. 570: d1 08 sbc r13, r1
  864. 572: e1 08 sbc r14, r1
  865. 574: f1 08 sbc r15, r1
  866. prescalarbits = _timer == 0 ? 0b101 : 0b111;
  867. 576: 85 e0 ldi r24, 0x05 ; 5
  868. 578: e9 ce rjmp .-558 ; 0x34c <_Z4tonehjm.constprop.15+0x1fe>
  869. }
  870. if (ocr > 255)
  871. {
  872. ocr = F_CPU / frequency / 2 / 256 - 1;
  873. prescalarbits = _timer == 0 ? 0b100 : 0b110;
  874. 57a: 84 e0 ldi r24, 0x04 ; 4
  875. 57c: e7 ce rjmp .-562 ; 0x34c <_Z4tonehjm.constprop.15+0x1fe>
  876. }
  877. if (ocr > 255)
  878. {
  879. ocr = F_CPU / frequency / 2 / 64 - 1;
  880. prescalarbits = _timer == 0 ? 0b011 : 0b100;
  881. 57e: 83 e0 ldi r24, 0x03 ; 3
  882. 580: e5 ce rjmp .-566 ; 0x34c <_Z4tonehjm.constprop.15+0x1fe>
  883. _timer = toneBegin(_pin);
  884. if (_timer >= 0)
  885. {
  886. // Set the pinMode as OUTPUT
  887. pinMode(_pin, OUTPUT);
  888. 582: 85 e0 ldi r24, 0x05 ; 5
  889. 584: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  890. 588: 75 ce rjmp .-790 ; 0x274 <_Z4tonehjm.constprop.15+0x126>
  891. break;
  892. #endif
  893. }
  894. }
  895. }
  896. 58a: df 91 pop r29
  897. 58c: cf 91 pop r28
  898. 58e: 1f 91 pop r17
  899. 590: ff 90 pop r15
  900. 592: ef 90 pop r14
  901. 594: df 90 pop r13
  902. 596: cf 90 pop r12
  903. 598: bf 90 pop r11
  904. 59a: af 90 pop r10
  905. 59c: 9f 90 pop r9
  906. 59e: 8f 90 pop r8
  907. 5a0: 7f 90 pop r7
  908. 5a2: 6f 90 pop r6
  909. 5a4: 5f 90 pop r5
  910. 5a6: 4f 90 pop r4
  911. 5a8: 08 95 ret
  912. 000005aa <digitalWrite>:
  913. }
  914. }
  915. void digitalWrite(uint8_t pin, uint8_t val)
  916. {
  917. uint8_t timer = digitalPinToTimer(pin);
  918. 5aa: 90 e0 ldi r25, 0x00 ; 0
  919. 5ac: fc 01 movw r30, r24
  920. 5ae: e8 59 subi r30, 0x98 ; 152
  921. 5b0: ff 4f sbci r31, 0xFF ; 255
  922. 5b2: 24 91 lpm r18, Z
  923. uint8_t bit = digitalPinToBitMask(pin);
  924. 5b4: fc 01 movw r30, r24
  925. 5b6: eb 55 subi r30, 0x5B ; 91
  926. 5b8: ff 4f sbci r31, 0xFF ; 255
  927. 5ba: 34 91 lpm r19, Z
  928. uint8_t port = digitalPinToPort(pin);
  929. 5bc: fc 01 movw r30, r24
  930. 5be: ef 56 subi r30, 0x6F ; 111
  931. 5c0: ff 4f sbci r31, 0xFF ; 255
  932. 5c2: e4 91 lpm r30, Z
  933. volatile uint8_t *out;
  934. if (port == NOT_A_PIN) return;
  935. 5c4: ee 23 and r30, r30
  936. 5c6: 09 f4 brne .+2 ; 0x5ca <digitalWrite+0x20>
  937. 5c8: 3c c0 rjmp .+120 ; 0x642 <digitalWrite+0x98>
  938. // If the pin that support PWM output, we need to turn it off
  939. // before doing a digital write.
  940. if (timer != NOT_ON_TIMER) turnOffPWM(timer);
  941. 5ca: 22 23 and r18, r18
  942. 5cc: 39 f1 breq .+78 ; 0x61c <digitalWrite+0x72>
  943. //
  944. //static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline));
  945. //static inline void turnOffPWM(uint8_t timer)
  946. static void turnOffPWM(uint8_t timer)
  947. {
  948. switch (timer)
  949. 5ce: 23 30 cpi r18, 0x03 ; 3
  950. 5d0: 91 f0 breq .+36 ; 0x5f6 <digitalWrite+0x4c>
  951. 5d2: 38 f4 brcc .+14 ; 0x5e2 <digitalWrite+0x38>
  952. 5d4: 21 30 cpi r18, 0x01 ; 1
  953. 5d6: a9 f0 breq .+42 ; 0x602 <digitalWrite+0x58>
  954. 5d8: 22 30 cpi r18, 0x02 ; 2
  955. 5da: 01 f5 brne .+64 ; 0x61c <digitalWrite+0x72>
  956. #if defined(TCCR0A) && defined(COM0A1)
  957. case TIMER0A: cbi(TCCR0A, COM0A1); break;
  958. #endif
  959. #if defined(TCCR0A) && defined(COM0B1)
  960. case TIMER0B: cbi(TCCR0A, COM0B1); break;
  961. 5dc: 84 b5 in r24, 0x24 ; 36
  962. 5de: 8f 7d andi r24, 0xDF ; 223
  963. 5e0: 12 c0 rjmp .+36 ; 0x606 <digitalWrite+0x5c>
  964. //
  965. //static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline));
  966. //static inline void turnOffPWM(uint8_t timer)
  967. static void turnOffPWM(uint8_t timer)
  968. {
  969. switch (timer)
  970. 5e2: 27 30 cpi r18, 0x07 ; 7
  971. 5e4: 91 f0 breq .+36 ; 0x60a <digitalWrite+0x60>
  972. 5e6: 28 30 cpi r18, 0x08 ; 8
  973. 5e8: a1 f0 breq .+40 ; 0x612 <digitalWrite+0x68>
  974. 5ea: 24 30 cpi r18, 0x04 ; 4
  975. 5ec: b9 f4 brne .+46 ; 0x61c <digitalWrite+0x72>
  976. {
  977. #if defined(TCCR1A) && defined(COM1A1)
  978. case TIMER1A: cbi(TCCR1A, COM1A1); break;
  979. #endif
  980. #if defined(TCCR1A) && defined(COM1B1)
  981. case TIMER1B: cbi(TCCR1A, COM1B1); break;
  982. 5ee: 80 91 80 00 lds r24, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
  983. 5f2: 8f 7d andi r24, 0xDF ; 223
  984. 5f4: 03 c0 rjmp .+6 ; 0x5fc <digitalWrite+0x52>
  985. static void turnOffPWM(uint8_t timer)
  986. {
  987. switch (timer)
  988. {
  989. #if defined(TCCR1A) && defined(COM1A1)
  990. case TIMER1A: cbi(TCCR1A, COM1A1); break;
  991. 5f6: 80 91 80 00 lds r24, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
  992. 5fa: 8f 77 andi r24, 0x7F ; 127
  993. #endif
  994. #if defined(TCCR1A) && defined(COM1B1)
  995. case TIMER1B: cbi(TCCR1A, COM1B1); break;
  996. 5fc: 80 93 80 00 sts 0x0080, r24 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
  997. 600: 0d c0 rjmp .+26 ; 0x61c <digitalWrite+0x72>
  998. #if defined(TCCR2) && defined(COM21)
  999. case TIMER2: cbi(TCCR2, COM21); break;
  1000. #endif
  1001. #if defined(TCCR0A) && defined(COM0A1)
  1002. case TIMER0A: cbi(TCCR0A, COM0A1); break;
  1003. 602: 84 b5 in r24, 0x24 ; 36
  1004. 604: 8f 77 andi r24, 0x7F ; 127
  1005. #endif
  1006. #if defined(TCCR0A) && defined(COM0B1)
  1007. case TIMER0B: cbi(TCCR0A, COM0B1); break;
  1008. 606: 84 bd out 0x24, r24 ; 36
  1009. 608: 09 c0 rjmp .+18 ; 0x61c <digitalWrite+0x72>
  1010. #endif
  1011. #if defined(TCCR2A) && defined(COM2A1)
  1012. case TIMER2A: cbi(TCCR2A, COM2A1); break;
  1013. 60a: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  1014. 60e: 8f 77 andi r24, 0x7F ; 127
  1015. 610: 03 c0 rjmp .+6 ; 0x618 <digitalWrite+0x6e>
  1016. #endif
  1017. #if defined(TCCR2A) && defined(COM2B1)
  1018. case TIMER2B: cbi(TCCR2A, COM2B1); break;
  1019. 612: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  1020. 616: 8f 7d andi r24, 0xDF ; 223
  1021. 618: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  1022. // If the pin that support PWM output, we need to turn it off
  1023. // before doing a digital write.
  1024. if (timer != NOT_ON_TIMER) turnOffPWM(timer);
  1025. out = portOutputRegister(port);
  1026. 61c: f0 e0 ldi r31, 0x00 ; 0
  1027. 61e: ee 0f add r30, r30
  1028. 620: ff 1f adc r31, r31
  1029. 622: e3 58 subi r30, 0x83 ; 131
  1030. 624: ff 4f sbci r31, 0xFF ; 255
  1031. 626: a5 91 lpm r26, Z+
  1032. 628: b4 91 lpm r27, Z
  1033. uint8_t oldSREG = SREG;
  1034. 62a: 9f b7 in r25, 0x3f ; 63
  1035. cli();
  1036. 62c: f8 94 cli
  1037. if (val == LOW) {
  1038. 62e: 61 11 cpse r22, r1
  1039. 630: 04 c0 rjmp .+8 ; 0x63a <digitalWrite+0x90>
  1040. *out &= ~bit;
  1041. 632: 8c 91 ld r24, X
  1042. 634: 30 95 com r19
  1043. 636: 38 23 and r19, r24
  1044. 638: 02 c0 rjmp .+4 ; 0x63e <digitalWrite+0x94>
  1045. } else {
  1046. *out |= bit;
  1047. 63a: ec 91 ld r30, X
  1048. 63c: 3e 2b or r19, r30
  1049. 63e: 3c 93 st X, r19
  1050. }
  1051. SREG = oldSREG;
  1052. 640: 9f bf out 0x3f, r25 ; 63
  1053. 642: 08 95 ret
  1054. 00000644 <micros>:
  1055. return m;
  1056. }
  1057. unsigned long micros() {
  1058. unsigned long m;
  1059. uint8_t oldSREG = SREG, t;
  1060. 644: 3f b7 in r19, 0x3f ; 63
  1061. cli();
  1062. 646: f8 94 cli
  1063. m = timer0_overflow_count;
  1064. 648: 80 91 39 01 lds r24, 0x0139 ; 0x800139 <timer0_overflow_count>
  1065. 64c: 90 91 3a 01 lds r25, 0x013A ; 0x80013a <timer0_overflow_count+0x1>
  1066. 650: a0 91 3b 01 lds r26, 0x013B ; 0x80013b <timer0_overflow_count+0x2>
  1067. 654: b0 91 3c 01 lds r27, 0x013C ; 0x80013c <timer0_overflow_count+0x3>
  1068. #if defined(TCNT0)
  1069. t = TCNT0;
  1070. 658: 26 b5 in r18, 0x26 ; 38
  1071. #else
  1072. #error TIMER 0 not defined
  1073. #endif
  1074. #ifdef TIFR0
  1075. if ((TIFR0 & _BV(TOV0)) && (t < 255))
  1076. 65a: a8 9b sbis 0x15, 0 ; 21
  1077. 65c: 05 c0 rjmp .+10 ; 0x668 <micros+0x24>
  1078. 65e: 2f 3f cpi r18, 0xFF ; 255
  1079. 660: 19 f0 breq .+6 ; 0x668 <micros+0x24>
  1080. m++;
  1081. 662: 01 96 adiw r24, 0x01 ; 1
  1082. 664: a1 1d adc r26, r1
  1083. 666: b1 1d adc r27, r1
  1084. #else
  1085. if ((TIFR & _BV(TOV0)) && (t < 255))
  1086. m++;
  1087. #endif
  1088. SREG = oldSREG;
  1089. 668: 3f bf out 0x3f, r19 ; 63
  1090. return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
  1091. 66a: ba 2f mov r27, r26
  1092. 66c: a9 2f mov r26, r25
  1093. 66e: 98 2f mov r25, r24
  1094. 670: 88 27 eor r24, r24
  1095. 672: 82 0f add r24, r18
  1096. 674: 91 1d adc r25, r1
  1097. 676: a1 1d adc r26, r1
  1098. 678: b1 1d adc r27, r1
  1099. 67a: bc 01 movw r22, r24
  1100. 67c: cd 01 movw r24, r26
  1101. 67e: 42 e0 ldi r20, 0x02 ; 2
  1102. 680: 66 0f add r22, r22
  1103. 682: 77 1f adc r23, r23
  1104. 684: 88 1f adc r24, r24
  1105. 686: 99 1f adc r25, r25
  1106. 688: 4a 95 dec r20
  1107. 68a: d1 f7 brne .-12 ; 0x680 <micros+0x3c>
  1108. }
  1109. 68c: 08 95 ret
  1110. 0000068e <delay>:
  1111. void delay(unsigned long ms)
  1112. {
  1113. 68e: 8f 92 push r8
  1114. 690: 9f 92 push r9
  1115. 692: af 92 push r10
  1116. 694: bf 92 push r11
  1117. 696: cf 92 push r12
  1118. 698: df 92 push r13
  1119. 69a: ef 92 push r14
  1120. 69c: ff 92 push r15
  1121. 69e: 6b 01 movw r12, r22
  1122. 6a0: 7c 01 movw r14, r24
  1123. uint32_t start = micros();
  1124. 6a2: 0e 94 22 03 call 0x644 ; 0x644 <micros>
  1125. 6a6: 4b 01 movw r8, r22
  1126. 6a8: 5c 01 movw r10, r24
  1127. while (ms > 0) {
  1128. 6aa: c1 14 cp r12, r1
  1129. 6ac: d1 04 cpc r13, r1
  1130. 6ae: e1 04 cpc r14, r1
  1131. 6b0: f1 04 cpc r15, r1
  1132. 6b2: f1 f0 breq .+60 ; 0x6f0 <delay+0x62>
  1133. yield();
  1134. while ( ms > 0 && (micros() - start) >= 1000) {
  1135. 6b4: 0e 94 22 03 call 0x644 ; 0x644 <micros>
  1136. 6b8: dc 01 movw r26, r24
  1137. 6ba: cb 01 movw r24, r22
  1138. 6bc: 88 19 sub r24, r8
  1139. 6be: 99 09 sbc r25, r9
  1140. 6c0: aa 09 sbc r26, r10
  1141. 6c2: bb 09 sbc r27, r11
  1142. 6c4: 88 3e cpi r24, 0xE8 ; 232
  1143. 6c6: 93 40 sbci r25, 0x03 ; 3
  1144. 6c8: a1 05 cpc r26, r1
  1145. 6ca: b1 05 cpc r27, r1
  1146. 6cc: 70 f3 brcs .-36 ; 0x6aa <delay+0x1c>
  1147. ms--;
  1148. 6ce: 21 e0 ldi r18, 0x01 ; 1
  1149. 6d0: c2 1a sub r12, r18
  1150. 6d2: d1 08 sbc r13, r1
  1151. 6d4: e1 08 sbc r14, r1
  1152. 6d6: f1 08 sbc r15, r1
  1153. start += 1000;
  1154. 6d8: 88 ee ldi r24, 0xE8 ; 232
  1155. 6da: 88 0e add r8, r24
  1156. 6dc: 83 e0 ldi r24, 0x03 ; 3
  1157. 6de: 98 1e adc r9, r24
  1158. 6e0: a1 1c adc r10, r1
  1159. 6e2: b1 1c adc r11, r1
  1160. {
  1161. uint32_t start = micros();
  1162. while (ms > 0) {
  1163. yield();
  1164. while ( ms > 0 && (micros() - start) >= 1000) {
  1165. 6e4: c1 14 cp r12, r1
  1166. 6e6: d1 04 cpc r13, r1
  1167. 6e8: e1 04 cpc r14, r1
  1168. 6ea: f1 04 cpc r15, r1
  1169. 6ec: 19 f7 brne .-58 ; 0x6b4 <delay+0x26>
  1170. 6ee: dd cf rjmp .-70 ; 0x6aa <delay+0x1c>
  1171. ms--;
  1172. start += 1000;
  1173. }
  1174. }
  1175. }
  1176. 6f0: ff 90 pop r15
  1177. 6f2: ef 90 pop r14
  1178. 6f4: df 90 pop r13
  1179. 6f6: cf 90 pop r12
  1180. 6f8: bf 90 pop r11
  1181. 6fa: af 90 pop r10
  1182. 6fc: 9f 90 pop r9
  1183. 6fe: 8f 90 pop r8
  1184. 700: 08 95 ret
  1185. 00000702 <_ZN5Print5writeEPKhj>:
  1186. // Public Methods //////////////////////////////////////////////////////////////
  1187. /* default implementation: may be overridden */
  1188. size_t Print::write(const uint8_t *buffer, size_t size)
  1189. {
  1190. 702: cf 92 push r12
  1191. 704: df 92 push r13
  1192. 706: ef 92 push r14
  1193. 708: ff 92 push r15
  1194. 70a: 0f 93 push r16
  1195. 70c: 1f 93 push r17
  1196. 70e: cf 93 push r28
  1197. 710: df 93 push r29
  1198. 712: 6c 01 movw r12, r24
  1199. 714: 7a 01 movw r14, r20
  1200. 716: 8b 01 movw r16, r22
  1201. size_t n = 0;
  1202. 718: c0 e0 ldi r28, 0x00 ; 0
  1203. 71a: d0 e0 ldi r29, 0x00 ; 0
  1204. while (size--) {
  1205. 71c: ce 15 cp r28, r14
  1206. 71e: df 05 cpc r29, r15
  1207. 720: 81 f0 breq .+32 ; 0x742 <_ZN5Print5writeEPKhj+0x40>
  1208. if (write(*buffer++)) n++;
  1209. 722: d8 01 movw r26, r16
  1210. 724: 6d 91 ld r22, X+
  1211. 726: 8d 01 movw r16, r26
  1212. 728: d6 01 movw r26, r12
  1213. 72a: ed 91 ld r30, X+
  1214. 72c: fc 91 ld r31, X
  1215. 72e: 01 90 ld r0, Z+
  1216. 730: f0 81 ld r31, Z
  1217. 732: e0 2d mov r30, r0
  1218. 734: c6 01 movw r24, r12
  1219. 736: 09 95 icall
  1220. 738: 89 2b or r24, r25
  1221. 73a: 11 f0 breq .+4 ; 0x740 <_ZN5Print5writeEPKhj+0x3e>
  1222. 73c: 21 96 adiw r28, 0x01 ; 1
  1223. 73e: ee cf rjmp .-36 ; 0x71c <_ZN5Print5writeEPKhj+0x1a>
  1224. 740: 7e 01 movw r14, r28
  1225. else break;
  1226. }
  1227. return n;
  1228. }
  1229. 742: c7 01 movw r24, r14
  1230. 744: df 91 pop r29
  1231. 746: cf 91 pop r28
  1232. 748: 1f 91 pop r17
  1233. 74a: 0f 91 pop r16
  1234. 74c: ff 90 pop r15
  1235. 74e: ef 90 pop r14
  1236. 750: df 90 pop r13
  1237. 752: cf 90 pop r12
  1238. 754: 08 95 ret
  1239. 00000756 <_ZN5Print5flushEv>:
  1240. size_t println(unsigned long, int = DEC);
  1241. size_t println(double, int = 2);
  1242. size_t println(const Printable&);
  1243. size_t println(void);
  1244. virtual void flush() { /* Empty implementation for backward compatibility */ }
  1245. 756: 08 95 ret
  1246. 00000758 <_ZN5Print17availableForWriteEv>:
  1247. return write((const uint8_t *)buffer, size);
  1248. }
  1249. // default to zero, meaning "a single write may block"
  1250. // should be overriden by subclasses with buffering
  1251. virtual int availableForWrite() { return 0; }
  1252. 758: 80 e0 ldi r24, 0x00 ; 0
  1253. 75a: 90 e0 ldi r25, 0x00 ; 0
  1254. 75c: 08 95 ret
  1255. 0000075e <_ZN14HardwareSerial17availableForWriteEv>:
  1256. {
  1257. tx_buffer_index_t head;
  1258. tx_buffer_index_t tail;
  1259. TX_BUFFER_ATOMIC {
  1260. head = _tx_buffer_head;
  1261. 75e: fc 01 movw r30, r24
  1262. 760: 53 8d ldd r21, Z+27 ; 0x1b
  1263. tail = _tx_buffer_tail;
  1264. 762: 44 8d ldd r20, Z+28 ; 0x1c
  1265. 764: 25 2f mov r18, r21
  1266. 766: 30 e0 ldi r19, 0x00 ; 0
  1267. 768: 84 2f mov r24, r20
  1268. 76a: 90 e0 ldi r25, 0x00 ; 0
  1269. }
  1270. if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
  1271. 76c: 82 1b sub r24, r18
  1272. 76e: 93 0b sbc r25, r19
  1273. 770: 54 17 cp r21, r20
  1274. 772: 10 f0 brcs .+4 ; 0x778 <_ZN14HardwareSerial17availableForWriteEv+0x1a>
  1275. 774: cf 96 adiw r24, 0x3f ; 63
  1276. 776: 08 95 ret
  1277. return tail - head - 1;
  1278. 778: 01 97 sbiw r24, 0x01 ; 1
  1279. }
  1280. 77a: 08 95 ret
  1281. 0000077c <_ZN14HardwareSerial4readEv>:
  1282. return _rx_buffer[_rx_buffer_tail];
  1283. }
  1284. }
  1285. int HardwareSerial::read(void)
  1286. {
  1287. 77c: fc 01 movw r30, r24
  1288. // if the head isn't ahead of the tail, we don't have any characters
  1289. if (_rx_buffer_head == _rx_buffer_tail) {
  1290. 77e: 91 8d ldd r25, Z+25 ; 0x19
  1291. 780: 82 8d ldd r24, Z+26 ; 0x1a
  1292. 782: 98 17 cp r25, r24
  1293. 784: 61 f0 breq .+24 ; 0x79e <_ZN14HardwareSerial4readEv+0x22>
  1294. return -1;
  1295. } else {
  1296. unsigned char c = _rx_buffer[_rx_buffer_tail];
  1297. 786: 82 8d ldd r24, Z+26 ; 0x1a
  1298. 788: df 01 movw r26, r30
  1299. 78a: a8 0f add r26, r24
  1300. 78c: b1 1d adc r27, r1
  1301. 78e: 5d 96 adiw r26, 0x1d ; 29
  1302. 790: 8c 91 ld r24, X
  1303. _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
  1304. 792: 92 8d ldd r25, Z+26 ; 0x1a
  1305. 794: 9f 5f subi r25, 0xFF ; 255
  1306. 796: 9f 73 andi r25, 0x3F ; 63
  1307. 798: 92 8f std Z+26, r25 ; 0x1a
  1308. return c;
  1309. 79a: 90 e0 ldi r25, 0x00 ; 0
  1310. 79c: 08 95 ret
  1311. int HardwareSerial::read(void)
  1312. {
  1313. // if the head isn't ahead of the tail, we don't have any characters
  1314. if (_rx_buffer_head == _rx_buffer_tail) {
  1315. return -1;
  1316. 79e: 8f ef ldi r24, 0xFF ; 255
  1317. 7a0: 9f ef ldi r25, 0xFF ; 255
  1318. } else {
  1319. unsigned char c = _rx_buffer[_rx_buffer_tail];
  1320. _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
  1321. return c;
  1322. }
  1323. }
  1324. 7a2: 08 95 ret
  1325. 000007a4 <_ZN14HardwareSerial4peekEv>:
  1326. {
  1327. return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
  1328. }
  1329. int HardwareSerial::peek(void)
  1330. {
  1331. 7a4: fc 01 movw r30, r24
  1332. if (_rx_buffer_head == _rx_buffer_tail) {
  1333. 7a6: 91 8d ldd r25, Z+25 ; 0x19
  1334. 7a8: 82 8d ldd r24, Z+26 ; 0x1a
  1335. 7aa: 98 17 cp r25, r24
  1336. 7ac: 31 f0 breq .+12 ; 0x7ba <_ZN14HardwareSerial4peekEv+0x16>
  1337. return -1;
  1338. } else {
  1339. return _rx_buffer[_rx_buffer_tail];
  1340. 7ae: 82 8d ldd r24, Z+26 ; 0x1a
  1341. 7b0: e8 0f add r30, r24
  1342. 7b2: f1 1d adc r31, r1
  1343. 7b4: 85 8d ldd r24, Z+29 ; 0x1d
  1344. 7b6: 90 e0 ldi r25, 0x00 ; 0
  1345. 7b8: 08 95 ret
  1346. }
  1347. int HardwareSerial::peek(void)
  1348. {
  1349. if (_rx_buffer_head == _rx_buffer_tail) {
  1350. return -1;
  1351. 7ba: 8f ef ldi r24, 0xFF ; 255
  1352. 7bc: 9f ef ldi r25, 0xFF ; 255
  1353. } else {
  1354. return _rx_buffer[_rx_buffer_tail];
  1355. }
  1356. }
  1357. 7be: 08 95 ret
  1358. 000007c0 <_ZN14HardwareSerial9availableEv>:
  1359. // clear any received data
  1360. _rx_buffer_head = _rx_buffer_tail;
  1361. }
  1362. int HardwareSerial::available(void)
  1363. {
  1364. 7c0: fc 01 movw r30, r24
  1365. return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
  1366. 7c2: 91 8d ldd r25, Z+25 ; 0x19
  1367. 7c4: 22 8d ldd r18, Z+26 ; 0x1a
  1368. 7c6: 89 2f mov r24, r25
  1369. 7c8: 90 e0 ldi r25, 0x00 ; 0
  1370. 7ca: 80 5c subi r24, 0xC0 ; 192
  1371. 7cc: 9f 4f sbci r25, 0xFF ; 255
  1372. 7ce: 82 1b sub r24, r18
  1373. 7d0: 91 09 sbc r25, r1
  1374. }
  1375. 7d2: 8f 73 andi r24, 0x3F ; 63
  1376. 7d4: 99 27 eor r25, r25
  1377. 7d6: 08 95 ret
  1378. 000007d8 <_Z17Serial0_availablev>:
  1379. #endif
  1380. // Function that can be weakly referenced by serialEventRun to prevent
  1381. // pulling in this file if it's not otherwise used.
  1382. bool Serial0_available() {
  1383. return Serial.available();
  1384. 7d8: 8d e3 ldi r24, 0x3D ; 61
  1385. 7da: 91 e0 ldi r25, 0x01 ; 1
  1386. 7dc: 0e 94 e0 03 call 0x7c0 ; 0x7c0 <_ZN14HardwareSerial9availableEv>
  1387. 7e0: 21 e0 ldi r18, 0x01 ; 1
  1388. 7e2: 89 2b or r24, r25
  1389. 7e4: 09 f4 brne .+2 ; 0x7e8 <_Z17Serial0_availablev+0x10>
  1390. 7e6: 20 e0 ldi r18, 0x00 ; 0
  1391. }
  1392. 7e8: 82 2f mov r24, r18
  1393. 7ea: 08 95 ret
  1394. 000007ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>:
  1395. #endif
  1396. // Actual interrupt handlers //////////////////////////////////////////////////////////////
  1397. void HardwareSerial::_tx_udr_empty_irq(void)
  1398. {
  1399. 7ec: fc 01 movw r30, r24
  1400. // If interrupts are enabled, there must be more data in the output
  1401. // buffer. Send the next byte
  1402. unsigned char c = _tx_buffer[_tx_buffer_tail];
  1403. 7ee: 84 8d ldd r24, Z+28 ; 0x1c
  1404. 7f0: df 01 movw r26, r30
  1405. 7f2: a8 0f add r26, r24
  1406. 7f4: b1 1d adc r27, r1
  1407. 7f6: a3 5a subi r26, 0xA3 ; 163
  1408. 7f8: bf 4f sbci r27, 0xFF ; 255
  1409. 7fa: 2c 91 ld r18, X
  1410. _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
  1411. 7fc: 84 8d ldd r24, Z+28 ; 0x1c
  1412. 7fe: 90 e0 ldi r25, 0x00 ; 0
  1413. 800: 01 96 adiw r24, 0x01 ; 1
  1414. 802: 8f 73 andi r24, 0x3F ; 63
  1415. 804: 99 27 eor r25, r25
  1416. 806: 84 8f std Z+28, r24 ; 0x1c
  1417. *_udr = c;
  1418. 808: a6 89 ldd r26, Z+22 ; 0x16
  1419. 80a: b7 89 ldd r27, Z+23 ; 0x17
  1420. 80c: 2c 93 st X, r18
  1421. // location". This makes sure flush() won't return until the bytes
  1422. // actually got written. Other r/w bits are preserved, and zeroes
  1423. // written to the rest.
  1424. #ifdef MPCM0
  1425. *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
  1426. 80e: a0 89 ldd r26, Z+16 ; 0x10
  1427. 810: b1 89 ldd r27, Z+17 ; 0x11
  1428. 812: 8c 91 ld r24, X
  1429. 814: 83 70 andi r24, 0x03 ; 3
  1430. 816: 80 64 ori r24, 0x40 ; 64
  1431. 818: 8c 93 st X, r24
  1432. #else
  1433. *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
  1434. #endif
  1435. if (_tx_buffer_head == _tx_buffer_tail) {
  1436. 81a: 93 8d ldd r25, Z+27 ; 0x1b
  1437. 81c: 84 8d ldd r24, Z+28 ; 0x1c
  1438. 81e: 98 13 cpse r25, r24
  1439. 820: 06 c0 rjmp .+12 ; 0x82e <_ZN14HardwareSerial17_tx_udr_empty_irqEv+0x42>
  1440. // Buffer empty, so disable interrupts
  1441. cbi(*_ucsrb, UDRIE0);
  1442. 822: 02 88 ldd r0, Z+18 ; 0x12
  1443. 824: f3 89 ldd r31, Z+19 ; 0x13
  1444. 826: e0 2d mov r30, r0
  1445. 828: 80 81 ld r24, Z
  1446. 82a: 8f 7d andi r24, 0xDF ; 223
  1447. 82c: 80 83 st Z, r24
  1448. 82e: 08 95 ret
  1449. 00000830 <_ZN14HardwareSerial5writeEh>:
  1450. // If we get here, nothing is queued anymore (DRIE is disabled) and
  1451. // the hardware finished tranmission (TXC is set).
  1452. }
  1453. size_t HardwareSerial::write(uint8_t c)
  1454. {
  1455. 830: ef 92 push r14
  1456. 832: ff 92 push r15
  1457. 834: 0f 93 push r16
  1458. 836: 1f 93 push r17
  1459. 838: cf 93 push r28
  1460. 83a: df 93 push r29
  1461. 83c: ec 01 movw r28, r24
  1462. _written = true;
  1463. 83e: 81 e0 ldi r24, 0x01 ; 1
  1464. 840: 88 8f std Y+24, r24 ; 0x18
  1465. // If the buffer and the data register is empty, just write the byte
  1466. // to the data register and be done. This shortcut helps
  1467. // significantly improve the effective datarate at high (>
  1468. // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
  1469. if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
  1470. 842: 9b 8d ldd r25, Y+27 ; 0x1b
  1471. 844: 8c 8d ldd r24, Y+28 ; 0x1c
  1472. 846: 98 13 cpse r25, r24
  1473. 848: 05 c0 rjmp .+10 ; 0x854 <_ZN14HardwareSerial5writeEh+0x24>
  1474. 84a: e8 89 ldd r30, Y+16 ; 0x10
  1475. 84c: f9 89 ldd r31, Y+17 ; 0x11
  1476. 84e: 80 81 ld r24, Z
  1477. 850: 85 fd sbrc r24, 5
  1478. 852: 26 c0 rjmp .+76 ; 0x8a0 <_ZN14HardwareSerial5writeEh+0x70>
  1479. 854: f6 2e mov r15, r22
  1480. *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
  1481. #endif
  1482. }
  1483. return 1;
  1484. }
  1485. tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
  1486. 856: 0b 8d ldd r16, Y+27 ; 0x1b
  1487. 858: 10 e0 ldi r17, 0x00 ; 0
  1488. 85a: 0f 5f subi r16, 0xFF ; 255
  1489. 85c: 1f 4f sbci r17, 0xFF ; 255
  1490. 85e: 0f 73 andi r16, 0x3F ; 63
  1491. 860: 11 27 eor r17, r17
  1492. 862: e0 2e mov r14, r16
  1493. // If the output buffer is full, there's nothing for it other than to
  1494. // wait for the interrupt handler to empty it a bit
  1495. while (i == _tx_buffer_tail) {
  1496. 864: 8c 8d ldd r24, Y+28 ; 0x1c
  1497. 866: e8 12 cpse r14, r24
  1498. 868: 0c c0 rjmp .+24 ; 0x882 <_ZN14HardwareSerial5writeEh+0x52>
  1499. if (bit_is_clear(SREG, SREG_I)) {
  1500. 86a: 0f b6 in r0, 0x3f ; 63
  1501. 86c: 07 fc sbrc r0, 7
  1502. 86e: fa cf rjmp .-12 ; 0x864 <_ZN14HardwareSerial5writeEh+0x34>
  1503. // Interrupts are disabled, so we'll have to poll the data
  1504. // register empty flag ourselves. If it is set, pretend an
  1505. // interrupt has happened and call the handler to free up
  1506. // space for us.
  1507. if(bit_is_set(*_ucsra, UDRE0))
  1508. 870: e8 89 ldd r30, Y+16 ; 0x10
  1509. 872: f9 89 ldd r31, Y+17 ; 0x11
  1510. 874: 80 81 ld r24, Z
  1511. 876: 85 ff sbrs r24, 5
  1512. 878: f5 cf rjmp .-22 ; 0x864 <_ZN14HardwareSerial5writeEh+0x34>
  1513. _tx_udr_empty_irq();
  1514. 87a: ce 01 movw r24, r28
  1515. 87c: 0e 94 f6 03 call 0x7ec ; 0x7ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>
  1516. 880: f1 cf rjmp .-30 ; 0x864 <_ZN14HardwareSerial5writeEh+0x34>
  1517. } else {
  1518. // nop, the interrupt handler will free up space for us
  1519. }
  1520. }
  1521. _tx_buffer[_tx_buffer_head] = c;
  1522. 882: 8b 8d ldd r24, Y+27 ; 0x1b
  1523. 884: fe 01 movw r30, r28
  1524. 886: e8 0f add r30, r24
  1525. 888: f1 1d adc r31, r1
  1526. 88a: e3 5a subi r30, 0xA3 ; 163
  1527. 88c: ff 4f sbci r31, 0xFF ; 255
  1528. 88e: f0 82 st Z, r15
  1529. // make atomic to prevent execution of ISR between setting the
  1530. // head pointer and setting the interrupt flag resulting in buffer
  1531. // retransmission
  1532. ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
  1533. 890: 9f b7 in r25, 0x3f ; 63
  1534. return 1;
  1535. }
  1536. static __inline__ uint8_t __iCliRetVal(void)
  1537. {
  1538. cli();
  1539. 892: f8 94 cli
  1540. _tx_buffer_head = i;
  1541. 894: 0b 8f std Y+27, r16 ; 0x1b
  1542. sbi(*_ucsrb, UDRIE0);
  1543. 896: ea 89 ldd r30, Y+18 ; 0x12
  1544. 898: fb 89 ldd r31, Y+19 ; 0x13
  1545. 89a: 80 81 ld r24, Z
  1546. 89c: 80 62 ori r24, 0x20 ; 32
  1547. 89e: 0a c0 rjmp .+20 ; 0x8b4 <_ZN14HardwareSerial5writeEh+0x84>
  1548. // So writing UDR must happen first.
  1549. // Writing UDR and clearing TC must be done atomically, otherwise
  1550. // interrupts might delay the TXC clear so the byte written to UDR
  1551. // is transmitted (setting TXC) before clearing TXC. Then TXC will
  1552. // be cleared when no bytes are left, causing flush() to hang
  1553. ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
  1554. 8a0: 9f b7 in r25, 0x3f ; 63
  1555. 8a2: f8 94 cli
  1556. *_udr = c;
  1557. 8a4: ee 89 ldd r30, Y+22 ; 0x16
  1558. 8a6: ff 89 ldd r31, Y+23 ; 0x17
  1559. 8a8: 60 83 st Z, r22
  1560. #ifdef MPCM0
  1561. *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
  1562. 8aa: e8 89 ldd r30, Y+16 ; 0x10
  1563. 8ac: f9 89 ldd r31, Y+17 ; 0x11
  1564. 8ae: 80 81 ld r24, Z
  1565. 8b0: 83 70 andi r24, 0x03 ; 3
  1566. 8b2: 80 64 ori r24, 0x40 ; 64
  1567. 8b4: 80 83 st Z, r24
  1568. (void)__s;
  1569. }
  1570. static __inline__ void __iRestore(const uint8_t *__s)
  1571. {
  1572. SREG = *__s;
  1573. 8b6: 9f bf out 0x3f, r25 ; 63
  1574. _tx_buffer_head = i;
  1575. sbi(*_ucsrb, UDRIE0);
  1576. }
  1577. return 1;
  1578. }
  1579. 8b8: 81 e0 ldi r24, 0x01 ; 1
  1580. 8ba: 90 e0 ldi r25, 0x00 ; 0
  1581. 8bc: df 91 pop r29
  1582. 8be: cf 91 pop r28
  1583. 8c0: 1f 91 pop r17
  1584. 8c2: 0f 91 pop r16
  1585. 8c4: ff 90 pop r15
  1586. 8c6: ef 90 pop r14
  1587. 8c8: 08 95 ret
  1588. 000008ca <_ZN14HardwareSerial5flushEv>:
  1589. if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
  1590. return tail - head - 1;
  1591. }
  1592. void HardwareSerial::flush()
  1593. {
  1594. 8ca: cf 93 push r28
  1595. 8cc: df 93 push r29
  1596. 8ce: ec 01 movw r28, r24
  1597. // If we have never written a byte, no need to flush. This special
  1598. // case is needed since there is no way to force the TXC (transmit
  1599. // complete) bit to 1 during initialization
  1600. if (!_written)
  1601. 8d0: 88 8d ldd r24, Y+24 ; 0x18
  1602. 8d2: 88 23 and r24, r24
  1603. 8d4: c9 f0 breq .+50 ; 0x908 <__stack+0x9>
  1604. return;
  1605. while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
  1606. 8d6: ea 89 ldd r30, Y+18 ; 0x12
  1607. 8d8: fb 89 ldd r31, Y+19 ; 0x13
  1608. 8da: 80 81 ld r24, Z
  1609. 8dc: 85 fd sbrc r24, 5
  1610. 8de: 05 c0 rjmp .+10 ; 0x8ea <_ZN14HardwareSerial5flushEv+0x20>
  1611. 8e0: a8 89 ldd r26, Y+16 ; 0x10
  1612. 8e2: b9 89 ldd r27, Y+17 ; 0x11
  1613. 8e4: 8c 91 ld r24, X
  1614. 8e6: 86 fd sbrc r24, 6
  1615. 8e8: 0f c0 rjmp .+30 ; 0x908 <__stack+0x9>
  1616. if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
  1617. 8ea: 0f b6 in r0, 0x3f ; 63
  1618. 8ec: 07 fc sbrc r0, 7
  1619. 8ee: f5 cf rjmp .-22 ; 0x8da <_ZN14HardwareSerial5flushEv+0x10>
  1620. 8f0: 80 81 ld r24, Z
  1621. 8f2: 85 ff sbrs r24, 5
  1622. 8f4: f2 cf rjmp .-28 ; 0x8da <_ZN14HardwareSerial5flushEv+0x10>
  1623. // Interrupts are globally disabled, but the DR empty
  1624. // interrupt should be enabled, so poll the DR empty flag to
  1625. // prevent deadlock
  1626. if (bit_is_set(*_ucsra, UDRE0))
  1627. 8f6: a8 89 ldd r26, Y+16 ; 0x10
  1628. 8f8: b9 89 ldd r27, Y+17 ; 0x11
  1629. 8fa: 8c 91 ld r24, X
  1630. 8fc: 85 ff sbrs r24, 5
  1631. 8fe: ed cf rjmp .-38 ; 0x8da <_ZN14HardwareSerial5flushEv+0x10>
  1632. _tx_udr_empty_irq();
  1633. 900: ce 01 movw r24, r28
  1634. 902: 0e 94 f6 03 call 0x7ec ; 0x7ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>
  1635. 906: e7 cf rjmp .-50 ; 0x8d6 <_ZN14HardwareSerial5flushEv+0xc>
  1636. }
  1637. // If we get here, nothing is queued anymore (DRIE is disabled) and
  1638. // the hardware finished tranmission (TXC is set).
  1639. }
  1640. 908: df 91 pop r29
  1641. 90a: cf 91 pop r28
  1642. 90c: 08 95 ret
  1643. 0000090e <_Z14serialEventRunv>:
  1644. #endif
  1645. void serialEventRun(void)
  1646. {
  1647. #if defined(HAVE_HWSERIAL0)
  1648. if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
  1649. 90e: 80 e0 ldi r24, 0x00 ; 0
  1650. 910: 90 e0 ldi r25, 0x00 ; 0
  1651. 912: 89 2b or r24, r25
  1652. 914: 29 f0 breq .+10 ; 0x920 <_Z14serialEventRunv+0x12>
  1653. 916: 0e 94 ec 03 call 0x7d8 ; 0x7d8 <_Z17Serial0_availablev>
  1654. 91a: 81 11 cpse r24, r1
  1655. 91c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
  1656. 920: 08 95 ret
  1657. 00000922 <_ZN5Print5writeEPKc.constprop.14>:
  1658. int getWriteError() { return write_error; }
  1659. void clearWriteError() { setWriteError(0); }
  1660. virtual size_t write(uint8_t) = 0;
  1661. size_t write(const char *str) {
  1662. if (str == NULL) return 0;
  1663. 922: 00 97 sbiw r24, 0x00 ; 0
  1664. 924: 69 f0 breq .+26 ; 0x940 <_ZN5Print5writeEPKc.constprop.14+0x1e>
  1665. return write((const uint8_t *)str, strlen(str));
  1666. 926: fc 01 movw r30, r24
  1667. 928: 01 90 ld r0, Z+
  1668. 92a: 00 20 and r0, r0
  1669. 92c: e9 f7 brne .-6 ; 0x928 <_ZN5Print5writeEPKc.constprop.14+0x6>
  1670. 92e: 31 97 sbiw r30, 0x01 ; 1
  1671. 930: af 01 movw r20, r30
  1672. 932: 48 1b sub r20, r24
  1673. 934: 59 0b sbc r21, r25
  1674. 936: bc 01 movw r22, r24
  1675. 938: 8d e3 ldi r24, 0x3D ; 61
  1676. 93a: 91 e0 ldi r25, 0x01 ; 1
  1677. 93c: 0c 94 81 03 jmp 0x702 ; 0x702 <_ZN5Print5writeEPKhj>
  1678. }
  1679. 940: 80 e0 ldi r24, 0x00 ; 0
  1680. 942: 90 e0 ldi r25, 0x00 ; 0
  1681. 944: 08 95 ret
  1682. 00000946 <__cxa_pure_virtual>:
  1683. extern "C" void __cxa_deleted_virtual(void) __attribute__ ((__noreturn__));
  1684. void __cxa_pure_virtual(void) {
  1685. // We might want to write some diagnostics to uart in this case
  1686. //std::terminate();
  1687. abort();
  1688. 946: 0e 94 d3 08 call 0x11a6 ; 0x11a6 <abort>
  1689. 0000094a <__vector_16>:
  1690. #if defined(TIM0_OVF_vect)
  1691. ISR(TIM0_OVF_vect)
  1692. #else
  1693. ISR(TIMER0_OVF_vect)
  1694. #endif
  1695. {
  1696. 94a: 1f 92 push r1
  1697. 94c: 0f 92 push r0
  1698. 94e: 0f b6 in r0, 0x3f ; 63
  1699. 950: 0f 92 push r0
  1700. 952: 11 24 eor r1, r1
  1701. 954: 2f 93 push r18
  1702. 956: 3f 93 push r19
  1703. 958: 8f 93 push r24
  1704. 95a: 9f 93 push r25
  1705. 95c: af 93 push r26
  1706. 95e: bf 93 push r27
  1707. // copy these to local variables so they can be stored in registers
  1708. // (volatile variables must be read from memory on every access)
  1709. unsigned long m = timer0_millis;
  1710. 960: 80 91 35 01 lds r24, 0x0135 ; 0x800135 <timer0_millis>
  1711. 964: 90 91 36 01 lds r25, 0x0136 ; 0x800136 <timer0_millis+0x1>
  1712. 968: a0 91 37 01 lds r26, 0x0137 ; 0x800137 <timer0_millis+0x2>
  1713. 96c: b0 91 38 01 lds r27, 0x0138 ; 0x800138 <timer0_millis+0x3>
  1714. unsigned char f = timer0_fract;
  1715. 970: 30 91 34 01 lds r19, 0x0134 ; 0x800134 <timer0_fract>
  1716. m += MILLIS_INC;
  1717. f += FRACT_INC;
  1718. 974: 23 e0 ldi r18, 0x03 ; 3
  1719. 976: 23 0f add r18, r19
  1720. if (f >= FRACT_MAX) {
  1721. 978: 2d 37 cpi r18, 0x7D ; 125
  1722. 97a: 20 f4 brcc .+8 ; 0x984 <__vector_16+0x3a>
  1723. // copy these to local variables so they can be stored in registers
  1724. // (volatile variables must be read from memory on every access)
  1725. unsigned long m = timer0_millis;
  1726. unsigned char f = timer0_fract;
  1727. m += MILLIS_INC;
  1728. 97c: 01 96 adiw r24, 0x01 ; 1
  1729. 97e: a1 1d adc r26, r1
  1730. 980: b1 1d adc r27, r1
  1731. 982: 05 c0 rjmp .+10 ; 0x98e <__vector_16+0x44>
  1732. f += FRACT_INC;
  1733. if (f >= FRACT_MAX) {
  1734. f -= FRACT_MAX;
  1735. 984: 26 e8 ldi r18, 0x86 ; 134
  1736. 986: 23 0f add r18, r19
  1737. m += 1;
  1738. 988: 02 96 adiw r24, 0x02 ; 2
  1739. 98a: a1 1d adc r26, r1
  1740. 98c: b1 1d adc r27, r1
  1741. }
  1742. timer0_fract = f;
  1743. 98e: 20 93 34 01 sts 0x0134, r18 ; 0x800134 <timer0_fract>
  1744. timer0_millis = m;
  1745. 992: 80 93 35 01 sts 0x0135, r24 ; 0x800135 <timer0_millis>
  1746. 996: 90 93 36 01 sts 0x0136, r25 ; 0x800136 <timer0_millis+0x1>
  1747. 99a: a0 93 37 01 sts 0x0137, r26 ; 0x800137 <timer0_millis+0x2>
  1748. 99e: b0 93 38 01 sts 0x0138, r27 ; 0x800138 <timer0_millis+0x3>
  1749. timer0_overflow_count++;
  1750. 9a2: 80 91 39 01 lds r24, 0x0139 ; 0x800139 <timer0_overflow_count>
  1751. 9a6: 90 91 3a 01 lds r25, 0x013A ; 0x80013a <timer0_overflow_count+0x1>
  1752. 9aa: a0 91 3b 01 lds r26, 0x013B ; 0x80013b <timer0_overflow_count+0x2>
  1753. 9ae: b0 91 3c 01 lds r27, 0x013C ; 0x80013c <timer0_overflow_count+0x3>
  1754. 9b2: 01 96 adiw r24, 0x01 ; 1
  1755. 9b4: a1 1d adc r26, r1
  1756. 9b6: b1 1d adc r27, r1
  1757. 9b8: 80 93 39 01 sts 0x0139, r24 ; 0x800139 <timer0_overflow_count>
  1758. 9bc: 90 93 3a 01 sts 0x013A, r25 ; 0x80013a <timer0_overflow_count+0x1>
  1759. 9c0: a0 93 3b 01 sts 0x013B, r26 ; 0x80013b <timer0_overflow_count+0x2>
  1760. 9c4: b0 93 3c 01 sts 0x013C, r27 ; 0x80013c <timer0_overflow_count+0x3>
  1761. }
  1762. 9c8: bf 91 pop r27
  1763. 9ca: af 91 pop r26
  1764. 9cc: 9f 91 pop r25
  1765. 9ce: 8f 91 pop r24
  1766. 9d0: 3f 91 pop r19
  1767. 9d2: 2f 91 pop r18
  1768. 9d4: 0f 90 pop r0
  1769. 9d6: 0f be out 0x3f, r0 ; 63
  1770. 9d8: 0f 90 pop r0
  1771. 9da: 1f 90 pop r1
  1772. 9dc: 18 95 reti
  1773. 000009de <__vector_7>:
  1774. #endif
  1775. #ifdef USE_TIMER2
  1776. ISR(TIMER2_COMPA_vect)
  1777. {
  1778. 9de: 1f 92 push r1
  1779. 9e0: 0f 92 push r0
  1780. 9e2: 0f b6 in r0, 0x3f ; 63
  1781. 9e4: 0f 92 push r0
  1782. 9e6: 11 24 eor r1, r1
  1783. 9e8: 2f 93 push r18
  1784. 9ea: 3f 93 push r19
  1785. 9ec: 4f 93 push r20
  1786. 9ee: 5f 93 push r21
  1787. 9f0: 6f 93 push r22
  1788. 9f2: 7f 93 push r23
  1789. 9f4: 8f 93 push r24
  1790. 9f6: 9f 93 push r25
  1791. 9f8: af 93 push r26
  1792. 9fa: bf 93 push r27
  1793. 9fc: ef 93 push r30
  1794. 9fe: ff 93 push r31
  1795. if (timer2_toggle_count != 0)
  1796. a00: 80 91 df 01 lds r24, 0x01DF ; 0x8001df <timer2_toggle_count>
  1797. a04: 90 91 e0 01 lds r25, 0x01E0 ; 0x8001e0 <timer2_toggle_count+0x1>
  1798. a08: a0 91 e1 01 lds r26, 0x01E1 ; 0x8001e1 <timer2_toggle_count+0x2>
  1799. a0c: b0 91 e2 01 lds r27, 0x01E2 ; 0x8001e2 <timer2_toggle_count+0x3>
  1800. a10: 89 2b or r24, r25
  1801. a12: 8a 2b or r24, r26
  1802. a14: 8b 2b or r24, r27
  1803. a16: 59 f1 breq .+86 ; 0xa6e <__vector_7+0x90>
  1804. {
  1805. // toggle the pin
  1806. *timer2_pin_port ^= timer2_pin_mask;
  1807. a18: 90 91 da 01 lds r25, 0x01DA ; 0x8001da <timer2_pin_mask>
  1808. a1c: e0 91 db 01 lds r30, 0x01DB ; 0x8001db <timer2_pin_port>
  1809. a20: f0 91 dc 01 lds r31, 0x01DC ; 0x8001dc <timer2_pin_port+0x1>
  1810. a24: 80 81 ld r24, Z
  1811. a26: 89 27 eor r24, r25
  1812. a28: 80 83 st Z, r24
  1813. if (timer2_toggle_count > 0)
  1814. a2a: 80 91 df 01 lds r24, 0x01DF ; 0x8001df <timer2_toggle_count>
  1815. a2e: 90 91 e0 01 lds r25, 0x01E0 ; 0x8001e0 <timer2_toggle_count+0x1>
  1816. a32: a0 91 e1 01 lds r26, 0x01E1 ; 0x8001e1 <timer2_toggle_count+0x2>
  1817. a36: b0 91 e2 01 lds r27, 0x01E2 ; 0x8001e2 <timer2_toggle_count+0x3>
  1818. a3a: 18 16 cp r1, r24
  1819. a3c: 19 06 cpc r1, r25
  1820. a3e: 1a 06 cpc r1, r26
  1821. a40: 1b 06 cpc r1, r27
  1822. a42: 0c f0 brlt .+2 ; 0xa46 <__vector_7+0x68>
  1823. a44: 3d c0 rjmp .+122 ; 0xac0 <__vector_7+0xe2>
  1824. timer2_toggle_count--;
  1825. a46: 80 91 df 01 lds r24, 0x01DF ; 0x8001df <timer2_toggle_count>
  1826. a4a: 90 91 e0 01 lds r25, 0x01E0 ; 0x8001e0 <timer2_toggle_count+0x1>
  1827. a4e: a0 91 e1 01 lds r26, 0x01E1 ; 0x8001e1 <timer2_toggle_count+0x2>
  1828. a52: b0 91 e2 01 lds r27, 0x01E2 ; 0x8001e2 <timer2_toggle_count+0x3>
  1829. a56: 01 97 sbiw r24, 0x01 ; 1
  1830. a58: a1 09 sbc r26, r1
  1831. a5a: b1 09 sbc r27, r1
  1832. a5c: 80 93 df 01 sts 0x01DF, r24 ; 0x8001df <timer2_toggle_count>
  1833. a60: 90 93 e0 01 sts 0x01E0, r25 ; 0x8001e0 <timer2_toggle_count+0x1>
  1834. a64: a0 93 e1 01 sts 0x01E1, r26 ; 0x8001e1 <timer2_toggle_count+0x2>
  1835. a68: b0 93 e2 01 sts 0x01E2, r27 ; 0x8001e2 <timer2_toggle_count+0x3>
  1836. a6c: 29 c0 rjmp .+82 ; 0xac0 <__vector_7+0xe2>
  1837. else
  1838. {
  1839. // need to call noTone() so that the tone_pins[] entry is reset, so the
  1840. // timer gets initialized next time we call tone().
  1841. // XXX: this assumes timer 2 is always the first one used.
  1842. noTone(tone_pins[0]);
  1843. a6e: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__data_start>
  1844. {
  1845. int8_t _timer = -1;
  1846. for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
  1847. if (tone_pins[i] == _pin) {
  1848. _timer = pgm_read_byte(tone_pin_to_timer_PGM + i);
  1849. a72: ec e7 ldi r30, 0x7C ; 124
  1850. a74: f0 e0 ldi r31, 0x00 ; 0
  1851. a76: e4 91 lpm r30, Z
  1852. tone_pins[i] = 255;
  1853. a78: 9f ef ldi r25, 0xFF ; 255
  1854. a7a: 90 93 00 01 sts 0x0100, r25 ; 0x800100 <__data_start>
  1855. // XXX: this function only works properly for timer 2 (the only one we use
  1856. // currently). for the others, it should end the tone, but won't restore
  1857. // proper PWM functionality for the timer.
  1858. void disableTimer(uint8_t _timer)
  1859. {
  1860. switch (_timer)
  1861. a7e: e1 30 cpi r30, 0x01 ; 1
  1862. a80: b9 f0 breq .+46 ; 0xab0 <__vector_7+0xd2>
  1863. a82: 98 f0 brcs .+38 ; 0xaaa <__vector_7+0xcc>
  1864. a84: e2 30 cpi r30, 0x02 ; 2
  1865. a86: c9 f4 brne .+50 ; 0xaba <__vector_7+0xdc>
  1866. break;
  1867. #endif
  1868. case 2:
  1869. #if defined(TIMSK2) && defined(OCIE2A)
  1870. bitWrite(TIMSK2, OCIE2A, 0); // disable interrupt
  1871. a88: 90 91 70 00 lds r25, 0x0070 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
  1872. a8c: 9d 7f andi r25, 0xFD ; 253
  1873. a8e: 90 93 70 00 sts 0x0070, r25 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
  1874. #endif
  1875. #if defined(TCCR2A) && defined(WGM20)
  1876. TCCR2A = (1 << WGM20);
  1877. a92: 91 e0 ldi r25, 0x01 ; 1
  1878. a94: 90 93 b0 00 sts 0x00B0, r25 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  1879. #endif
  1880. #if defined(TCCR2B) && defined(CS22)
  1881. TCCR2B = (TCCR2B & 0b11111000) | (1 << CS22);
  1882. a98: 90 91 b1 00 lds r25, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  1883. a9c: 98 7f andi r25, 0xF8 ; 248
  1884. a9e: 94 60 ori r25, 0x04 ; 4
  1885. aa0: 90 93 b1 00 sts 0x00B1, r25 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  1886. #endif
  1887. #if defined(OCR2A)
  1888. OCR2A = 0;
  1889. aa4: 10 92 b3 00 sts 0x00B3, r1 ; 0x8000b3 <__TEXT_REGION_LENGTH__+0x7e00b3>
  1890. aa8: 08 c0 rjmp .+16 ; 0xaba <__vector_7+0xdc>
  1891. {
  1892. switch (_timer)
  1893. {
  1894. case 0:
  1895. #if defined(TIMSK0)
  1896. TIMSK0 = 0;
  1897. aaa: 10 92 6e 00 sts 0x006E, r1 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  1898. aae: 05 c0 rjmp .+10 ; 0xaba <__vector_7+0xdc>
  1899. #endif
  1900. break;
  1901. #if defined(TIMSK1) && defined(OCIE1A)
  1902. case 1:
  1903. bitWrite(TIMSK1, OCIE1A, 0);
  1904. ab0: 90 91 6f 00 lds r25, 0x006F ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
  1905. ab4: 9d 7f andi r25, 0xFD ; 253
  1906. ab6: 90 93 6f 00 sts 0x006F, r25 ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
  1907. }
  1908. }
  1909. disableTimer(_timer);
  1910. digitalWrite(_pin, 0);
  1911. aba: 60 e0 ldi r22, 0x00 ; 0
  1912. abc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  1913. // XXX: this assumes timer 2 is always the first one used.
  1914. noTone(tone_pins[0]);
  1915. // disableTimer(2);
  1916. // *timer2_pin_port &= ~(timer2_pin_mask); // keep pin low after stop
  1917. }
  1918. }
  1919. ac0: ff 91 pop r31
  1920. ac2: ef 91 pop r30
  1921. ac4: bf 91 pop r27
  1922. ac6: af 91 pop r26
  1923. ac8: 9f 91 pop r25
  1924. aca: 8f 91 pop r24
  1925. acc: 7f 91 pop r23
  1926. ace: 6f 91 pop r22
  1927. ad0: 5f 91 pop r21
  1928. ad2: 4f 91 pop r20
  1929. ad4: 3f 91 pop r19
  1930. ad6: 2f 91 pop r18
  1931. ad8: 0f 90 pop r0
  1932. ada: 0f be out 0x3f, r0 ; 63
  1933. adc: 0f 90 pop r0
  1934. ade: 1f 90 pop r1
  1935. ae0: 18 95 reti
  1936. 00000ae2 <__vector_19>:
  1937. #elif defined(USART_UDRE_vect)
  1938. ISR(USART_UDRE_vect)
  1939. #else
  1940. #error "Don't know what the Data Register Empty vector is called for Serial"
  1941. #endif
  1942. {
  1943. ae2: 1f 92 push r1
  1944. ae4: 0f 92 push r0
  1945. ae6: 0f b6 in r0, 0x3f ; 63
  1946. ae8: 0f 92 push r0
  1947. aea: 11 24 eor r1, r1
  1948. aec: 2f 93 push r18
  1949. aee: 3f 93 push r19
  1950. af0: 4f 93 push r20
  1951. af2: 5f 93 push r21
  1952. af4: 6f 93 push r22
  1953. af6: 7f 93 push r23
  1954. af8: 8f 93 push r24
  1955. afa: 9f 93 push r25
  1956. afc: af 93 push r26
  1957. afe: bf 93 push r27
  1958. b00: ef 93 push r30
  1959. b02: ff 93 push r31
  1960. Serial._tx_udr_empty_irq();
  1961. b04: 8d e3 ldi r24, 0x3D ; 61
  1962. b06: 91 e0 ldi r25, 0x01 ; 1
  1963. b08: 0e 94 f6 03 call 0x7ec ; 0x7ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>
  1964. }
  1965. b0c: ff 91 pop r31
  1966. b0e: ef 91 pop r30
  1967. b10: bf 91 pop r27
  1968. b12: af 91 pop r26
  1969. b14: 9f 91 pop r25
  1970. b16: 8f 91 pop r24
  1971. b18: 7f 91 pop r23
  1972. b1a: 6f 91 pop r22
  1973. b1c: 5f 91 pop r21
  1974. b1e: 4f 91 pop r20
  1975. b20: 3f 91 pop r19
  1976. b22: 2f 91 pop r18
  1977. b24: 0f 90 pop r0
  1978. b26: 0f be out 0x3f, r0 ; 63
  1979. b28: 0f 90 pop r0
  1980. b2a: 1f 90 pop r1
  1981. b2c: 18 95 reti
  1982. 00000b2e <__vector_18>:
  1983. #elif defined(USART_RXC_vect)
  1984. ISR(USART_RXC_vect) // ATmega8
  1985. #else
  1986. #error "Don't know what the Data Received vector is called for Serial"
  1987. #endif
  1988. {
  1989. b2e: 1f 92 push r1
  1990. b30: 0f 92 push r0
  1991. b32: 0f b6 in r0, 0x3f ; 63
  1992. b34: 0f 92 push r0
  1993. b36: 11 24 eor r1, r1
  1994. b38: 2f 93 push r18
  1995. b3a: 8f 93 push r24
  1996. b3c: 9f 93 push r25
  1997. b3e: ef 93 push r30
  1998. b40: ff 93 push r31
  1999. // Actual interrupt handlers //////////////////////////////////////////////////////////////
  2000. void HardwareSerial::_rx_complete_irq(void)
  2001. {
  2002. if (bit_is_clear(*_ucsra, UPE0)) {
  2003. b42: e0 91 4d 01 lds r30, 0x014D ; 0x80014d <Serial+0x10>
  2004. b46: f0 91 4e 01 lds r31, 0x014E ; 0x80014e <Serial+0x11>
  2005. b4a: 80 81 ld r24, Z
  2006. b4c: e0 91 53 01 lds r30, 0x0153 ; 0x800153 <Serial+0x16>
  2007. b50: f0 91 54 01 lds r31, 0x0154 ; 0x800154 <Serial+0x17>
  2008. b54: 82 fd sbrc r24, 2
  2009. b56: 12 c0 rjmp .+36 ; 0xb7c <__vector_18+0x4e>
  2010. // No Parity error, read byte and store it in the buffer if there is
  2011. // room
  2012. unsigned char c = *_udr;
  2013. b58: 90 81 ld r25, Z
  2014. rx_buffer_index_t i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_RX_BUFFER_SIZE;
  2015. b5a: 80 91 56 01 lds r24, 0x0156 ; 0x800156 <Serial+0x19>
  2016. b5e: 8f 5f subi r24, 0xFF ; 255
  2017. b60: 8f 73 andi r24, 0x3F ; 63
  2018. // if we should be storing the received character into the location
  2019. // just before the tail (meaning that the head would advance to the
  2020. // current location of the tail), we're about to overflow the buffer
  2021. // and so we don't write the character or advance the head.
  2022. if (i != _rx_buffer_tail) {
  2023. b62: 20 91 57 01 lds r18, 0x0157 ; 0x800157 <Serial+0x1a>
  2024. b66: 82 17 cp r24, r18
  2025. b68: 51 f0 breq .+20 ; 0xb7e <__vector_18+0x50>
  2026. _rx_buffer[_rx_buffer_head] = c;
  2027. b6a: e0 91 56 01 lds r30, 0x0156 ; 0x800156 <Serial+0x19>
  2028. b6e: f0 e0 ldi r31, 0x00 ; 0
  2029. b70: e3 5c subi r30, 0xC3 ; 195
  2030. b72: fe 4f sbci r31, 0xFE ; 254
  2031. b74: 95 8f std Z+29, r25 ; 0x1d
  2032. _rx_buffer_head = i;
  2033. b76: 80 93 56 01 sts 0x0156, r24 ; 0x800156 <Serial+0x19>
  2034. b7a: 01 c0 rjmp .+2 ; 0xb7e <__vector_18+0x50>
  2035. }
  2036. } else {
  2037. // Parity error, read byte but discard it
  2038. *_udr;
  2039. b7c: 80 81 ld r24, Z
  2040. Serial._rx_complete_irq();
  2041. }
  2042. b7e: ff 91 pop r31
  2043. b80: ef 91 pop r30
  2044. b82: 9f 91 pop r25
  2045. b84: 8f 91 pop r24
  2046. b86: 2f 91 pop r18
  2047. b88: 0f 90 pop r0
  2048. b8a: 0f be out 0x3f, r0 ; 63
  2049. b8c: 0f 90 pop r0
  2050. b8e: 1f 90 pop r1
  2051. b90: 18 95 reti
  2052. 00000b92 <main>:
  2053. void setupUSB() __attribute__((weak));
  2054. void setupUSB() { }
  2055. int main(void)
  2056. {
  2057. b92: cf 93 push r28
  2058. b94: df 93 push r29
  2059. b96: cd b7 in r28, 0x3d ; 61
  2060. b98: de b7 in r29, 0x3e ; 62
  2061. b9a: a1 97 sbiw r28, 0x21 ; 33
  2062. b9c: 0f b6 in r0, 0x3f ; 63
  2063. b9e: f8 94 cli
  2064. ba0: de bf out 0x3e, r29 ; 62
  2065. ba2: 0f be out 0x3f, r0 ; 63
  2066. ba4: cd bf out 0x3d, r28 ; 61
  2067. void init()
  2068. {
  2069. // this needs to be called before setup() or some functions won't
  2070. // work there
  2071. sei();
  2072. ba6: 78 94 sei
  2073. // on the ATmega168, timer 0 is also used for fast hardware pwm
  2074. // (using phase-correct PWM would mean that timer 0 overflowed half as often
  2075. // resulting in different millis() behavior on the ATmega8 and ATmega168)
  2076. #if defined(TCCR0A) && defined(WGM01)
  2077. sbi(TCCR0A, WGM01);
  2078. ba8: 84 b5 in r24, 0x24 ; 36
  2079. baa: 82 60 ori r24, 0x02 ; 2
  2080. bac: 84 bd out 0x24, r24 ; 36
  2081. sbi(TCCR0A, WGM00);
  2082. bae: 84 b5 in r24, 0x24 ; 36
  2083. bb0: 81 60 ori r24, 0x01 ; 1
  2084. bb2: 84 bd out 0x24, r24 ; 36
  2085. // this combination is for the standard atmega8
  2086. sbi(TCCR0, CS01);
  2087. sbi(TCCR0, CS00);
  2088. #elif defined(TCCR0B) && defined(CS01) && defined(CS00)
  2089. // this combination is for the standard 168/328/1280/2560
  2090. sbi(TCCR0B, CS01);
  2091. bb4: 85 b5 in r24, 0x25 ; 37
  2092. bb6: 82 60 ori r24, 0x02 ; 2
  2093. bb8: 85 bd out 0x25, r24 ; 37
  2094. sbi(TCCR0B, CS00);
  2095. bba: 85 b5 in r24, 0x25 ; 37
  2096. bbc: 81 60 ori r24, 0x01 ; 1
  2097. bbe: 85 bd out 0x25, r24 ; 37
  2098. // enable timer 0 overflow interrupt
  2099. #if defined(TIMSK) && defined(TOIE0)
  2100. sbi(TIMSK, TOIE0);
  2101. #elif defined(TIMSK0) && defined(TOIE0)
  2102. sbi(TIMSK0, TOIE0);
  2103. bc0: 80 91 6e 00 lds r24, 0x006E ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  2104. bc4: 81 60 ori r24, 0x01 ; 1
  2105. bc6: 80 93 6e 00 sts 0x006E, r24 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  2106. // this is better for motors as it ensures an even waveform
  2107. // note, however, that fast pwm mode can achieve a frequency of up
  2108. // 8 MHz (with a 16 MHz clock) at 50% duty cycle
  2109. #if defined(TCCR1B) && defined(CS11) && defined(CS10)
  2110. TCCR1B = 0;
  2111. bca: 10 92 81 00 sts 0x0081, r1 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  2112. // set timer 1 prescale factor to 64
  2113. sbi(TCCR1B, CS11);
  2114. bce: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  2115. bd2: 82 60 ori r24, 0x02 ; 2
  2116. bd4: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  2117. #if F_CPU >= 8000000L
  2118. sbi(TCCR1B, CS10);
  2119. bd8: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  2120. bdc: 81 60 ori r24, 0x01 ; 1
  2121. bde: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
  2122. sbi(TCCR1, CS10);
  2123. #endif
  2124. #endif
  2125. // put timer 1 in 8-bit phase correct pwm mode
  2126. #if defined(TCCR1A) && defined(WGM10)
  2127. sbi(TCCR1A, WGM10);
  2128. be2: 80 91 80 00 lds r24, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
  2129. be6: 81 60 ori r24, 0x01 ; 1
  2130. be8: 80 93 80 00 sts 0x0080, r24 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
  2131. // set timer 2 prescale factor to 64
  2132. #if defined(TCCR2) && defined(CS22)
  2133. sbi(TCCR2, CS22);
  2134. #elif defined(TCCR2B) && defined(CS22)
  2135. sbi(TCCR2B, CS22);
  2136. bec: 80 91 b1 00 lds r24, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  2137. bf0: 84 60 ori r24, 0x04 ; 4
  2138. bf2: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
  2139. // configure timer 2 for phase correct pwm (8-bit)
  2140. #if defined(TCCR2) && defined(WGM20)
  2141. sbi(TCCR2, WGM20);
  2142. #elif defined(TCCR2A) && defined(WGM20)
  2143. sbi(TCCR2A, WGM20);
  2144. bf6: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  2145. bfa: 81 60 ori r24, 0x01 ; 1
  2146. bfc: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
  2147. #endif
  2148. #if defined(ADCSRA)
  2149. // set a2d prescaler so we are inside the desired 50-200 KHz range.
  2150. #if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
  2151. sbi(ADCSRA, ADPS2);
  2152. c00: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2153. c04: 84 60 ori r24, 0x04 ; 4
  2154. c06: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2155. sbi(ADCSRA, ADPS1);
  2156. c0a: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2157. c0e: 82 60 ori r24, 0x02 ; 2
  2158. c10: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2159. sbi(ADCSRA, ADPS0);
  2160. c14: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2161. c18: 81 60 ori r24, 0x01 ; 1
  2162. c1a: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2163. cbi(ADCSRA, ADPS2);
  2164. cbi(ADCSRA, ADPS1);
  2165. sbi(ADCSRA, ADPS0);
  2166. #endif
  2167. // enable a2d conversions
  2168. sbi(ADCSRA, ADEN);
  2169. c1e: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2170. c22: 80 68 ori r24, 0x80 ; 128
  2171. c24: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2172. // here so they can be used as normal digital i/o; they will be
  2173. // reconnected in Serial.begin()
  2174. #if defined(UCSRB)
  2175. UCSRB = 0;
  2176. #elif defined(UCSR0B)
  2177. UCSR0B = 0;
  2178. c28: 10 92 c1 00 sts 0x00C1, r1 ; 0x8000c1 <__TEXT_REGION_LENGTH__+0x7e00c1>
  2179. void HardwareSerial::begin(unsigned long baud, byte config)
  2180. {
  2181. // Try u2x mode first
  2182. uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
  2183. *_ucsra = 1 << U2X0;
  2184. c2c: e0 91 4d 01 lds r30, 0x014D ; 0x80014d <Serial+0x10>
  2185. c30: f0 91 4e 01 lds r31, 0x014E ; 0x80014e <Serial+0x11>
  2186. c34: 82 e0 ldi r24, 0x02 ; 2
  2187. c36: 80 83 st Z, r24
  2188. *_ucsra = 0;
  2189. baud_setting = (F_CPU / 8 / baud - 1) / 2;
  2190. }
  2191. // assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
  2192. *_ubrrh = baud_setting >> 8;
  2193. c38: e0 91 49 01 lds r30, 0x0149 ; 0x800149 <Serial+0xc>
  2194. c3c: f0 91 4a 01 lds r31, 0x014A ; 0x80014a <Serial+0xd>
  2195. c40: 10 82 st Z, r1
  2196. *_ubrrl = baud_setting;
  2197. c42: e0 91 4b 01 lds r30, 0x014B ; 0x80014b <Serial+0xe>
  2198. c46: f0 91 4c 01 lds r31, 0x014C ; 0x80014c <Serial+0xf>
  2199. c4a: 8f ec ldi r24, 0xCF ; 207
  2200. c4c: 80 83 st Z, r24
  2201. _written = false;
  2202. c4e: 10 92 55 01 sts 0x0155, r1 ; 0x800155 <Serial+0x18>
  2203. //set the data bits, parity, and stop bits
  2204. #if defined(__AVR_ATmega8__)
  2205. config |= 0x80; // select UCSRC register (shared with UBRRH)
  2206. #endif
  2207. *_ucsrc = config;
  2208. c52: e0 91 51 01 lds r30, 0x0151 ; 0x800151 <Serial+0x14>
  2209. c56: f0 91 52 01 lds r31, 0x0152 ; 0x800152 <Serial+0x15>
  2210. c5a: 86 e0 ldi r24, 0x06 ; 6
  2211. c5c: 80 83 st Z, r24
  2212. sbi(*_ucsrb, RXEN0);
  2213. c5e: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
  2214. c62: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
  2215. c66: 80 81 ld r24, Z
  2216. c68: 80 61 ori r24, 0x10 ; 16
  2217. c6a: 80 83 st Z, r24
  2218. sbi(*_ucsrb, TXEN0);
  2219. c6c: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
  2220. c70: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
  2221. c74: 80 81 ld r24, Z
  2222. c76: 88 60 ori r24, 0x08 ; 8
  2223. c78: 80 83 st Z, r24
  2224. sbi(*_ucsrb, RXCIE0);
  2225. c7a: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
  2226. c7e: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
  2227. c82: 80 81 ld r24, Z
  2228. c84: 80 68 ori r24, 0x80 ; 128
  2229. c86: 80 83 st Z, r24
  2230. cbi(*_ucsrb, UDRIE0);
  2231. c88: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
  2232. c8c: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
  2233. c90: 80 81 ld r24, Z
  2234. c92: 8f 7d andi r24, 0xDF ; 223
  2235. c94: 80 83 st Z, r24
  2236. void setup() {
  2237. // put your setup code here, to run once:
  2238. Serial.begin(9600);
  2239. pinMode(LED1, OUTPUT);
  2240. c96: 8e e0 ldi r24, 0x0E ; 14
  2241. c98: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2242. pinMode(LED2, OUTPUT);
  2243. c9c: 8f e0 ldi r24, 0x0F ; 15
  2244. c9e: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2245. pinMode(LED3, OUTPUT);
  2246. ca2: 80 e1 ldi r24, 0x10 ; 16
  2247. ca4: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2248. pinMode(LED4, OUTPUT);
  2249. ca8: 81 e1 ldi r24, 0x11 ; 17
  2250. caa: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2251. pinMode(LED5, OUTPUT);
  2252. cae: 82 e1 ldi r24, 0x12 ; 18
  2253. cb0: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2254. pinMode(LED6, OUTPUT);
  2255. cb4: 83 e1 ldi r24, 0x13 ; 19
  2256. cb6: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2257. pinMode(LED7, OUTPUT);
  2258. cba: 87 e0 ldi r24, 0x07 ; 7
  2259. cbc: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2260. pinMode(LED8, OUTPUT);
  2261. cc0: 88 e0 ldi r24, 0x08 ; 8
  2262. cc2: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2263. pinMode(SPKR, OUTPUT);
  2264. cc6: 85 e0 ldi r24, 0x05 ; 5
  2265. cc8: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
  2266. return write(s.c_str(), s.length());
  2267. }
  2268. size_t Print::print(const char str[])
  2269. {
  2270. return write(str);
  2271. ccc: 83 e1 ldi r24, 0x13 ; 19
  2272. cce: 91 e0 ldi r25, 0x01 ; 1
  2273. cd0: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
  2274. return x.printTo(*this);
  2275. }
  2276. size_t Print::println(void)
  2277. {
  2278. return write("\r\n");
  2279. cd4: 88 e2 ldi r24, 0x28 ; 40
  2280. cd6: 91 e0 ldi r25, 0x01 ; 1
  2281. cd8: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
  2282. return write(s.c_str(), s.length());
  2283. }
  2284. size_t Print::print(const char str[])
  2285. {
  2286. return write(str);
  2287. cdc: 8b e2 ldi r24, 0x2B ; 43
  2288. cde: 91 e0 ldi r25, 0x01 ; 1
  2289. ce0: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
  2290. return x.printTo(*this);
  2291. }
  2292. size_t Print::println(void)
  2293. {
  2294. return write("\r\n");
  2295. ce4: 88 e2 ldi r24, 0x28 ; 40
  2296. ce6: 91 e0 ldi r25, 0x01 ; 1
  2297. ce8: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
  2298. Serial.println("Flammable Gas Sensor");
  2299. Serial.println("Begin");
  2300. int yy = 0;
  2301. for(yy=200;yy<1200;yy+=150){
  2302. cec: 08 ec ldi r16, 0xC8 ; 200
  2303. cee: 10 e0 ldi r17, 0x00 ; 0
  2304. tone(SPKR,yy,100);
  2305. cf0: c8 01 movw r24, r16
  2306. cf2: 0e 94 a7 00 call 0x14e ; 0x14e <_Z4tonehjm.constprop.15>
  2307. delay(100);
  2308. cf6: 64 e6 ldi r22, 0x64 ; 100
  2309. cf8: 70 e0 ldi r23, 0x00 ; 0
  2310. cfa: 80 e0 ldi r24, 0x00 ; 0
  2311. cfc: 90 e0 ldi r25, 0x00 ; 0
  2312. cfe: 0e 94 47 03 call 0x68e ; 0x68e <delay>
  2313. Serial.println("Flammable Gas Sensor");
  2314. Serial.println("Begin");
  2315. int yy = 0;
  2316. for(yy=200;yy<1200;yy+=150){
  2317. d02: 0a 56 subi r16, 0x6A ; 106
  2318. d04: 1f 4f sbci r17, 0xFF ; 255
  2319. d06: 02 3e cpi r16, 0xE2 ; 226
  2320. d08: 24 e0 ldi r18, 0x04 ; 4
  2321. d0a: 12 07 cpc r17, r18
  2322. d0c: 89 f7 brne .-30 ; 0xcf0 <main+0x15e>
  2323. tone(SPKR,yy,100);
  2324. delay(50);
  2325. }*/
  2326. digitalWrite(LED1,HIGH);
  2327. d0e: 61 e0 ldi r22, 0x01 ; 1
  2328. d10: 8e e0 ldi r24, 0x0E ; 14
  2329. d12: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2330. digitalWrite(LED2,HIGH);
  2331. d16: 61 e0 ldi r22, 0x01 ; 1
  2332. d18: 8f e0 ldi r24, 0x0F ; 15
  2333. d1a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2334. digitalWrite(LED3,HIGH);
  2335. d1e: 61 e0 ldi r22, 0x01 ; 1
  2336. d20: 80 e1 ldi r24, 0x10 ; 16
  2337. d22: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2338. digitalWrite(LED4,HIGH);
  2339. d26: 61 e0 ldi r22, 0x01 ; 1
  2340. d28: 81 e1 ldi r24, 0x11 ; 17
  2341. d2a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2342. delay(500);
  2343. d2e: 64 ef ldi r22, 0xF4 ; 244
  2344. d30: 71 e0 ldi r23, 0x01 ; 1
  2345. d32: 80 e0 ldi r24, 0x00 ; 0
  2346. d34: 90 e0 ldi r25, 0x00 ; 0
  2347. d36: 0e 94 47 03 call 0x68e ; 0x68e <delay>
  2348. digitalWrite(LED1,LOW);
  2349. d3a: 60 e0 ldi r22, 0x00 ; 0
  2350. d3c: 8e e0 ldi r24, 0x0E ; 14
  2351. d3e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2352. digitalWrite(LED2,LOW);
  2353. d42: 60 e0 ldi r22, 0x00 ; 0
  2354. d44: 8f e0 ldi r24, 0x0F ; 15
  2355. d46: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2356. digitalWrite(LED3,LOW);
  2357. d4a: 60 e0 ldi r22, 0x00 ; 0
  2358. d4c: 80 e1 ldi r24, 0x10 ; 16
  2359. d4e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2360. digitalWrite(LED4,LOW);
  2361. d52: 60 e0 ldi r22, 0x00 ; 0
  2362. d54: 81 e1 ldi r24, 0x11 ; 17
  2363. d56: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2364. digitalWrite(LED5,HIGH);
  2365. d5a: 61 e0 ldi r22, 0x01 ; 1
  2366. d5c: 82 e1 ldi r24, 0x12 ; 18
  2367. d5e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2368. digitalWrite(LED6,HIGH);
  2369. d62: 61 e0 ldi r22, 0x01 ; 1
  2370. d64: 83 e1 ldi r24, 0x13 ; 19
  2371. d66: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2372. digitalWrite(LED7,HIGH);
  2373. d6a: 61 e0 ldi r22, 0x01 ; 1
  2374. d6c: 87 e0 ldi r24, 0x07 ; 7
  2375. d6e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2376. digitalWrite(LED8,HIGH);
  2377. d72: 61 e0 ldi r22, 0x01 ; 1
  2378. d74: 88 e0 ldi r24, 0x08 ; 8
  2379. d76: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2380. delay(500);
  2381. d7a: 64 ef ldi r22, 0xF4 ; 244
  2382. d7c: 71 e0 ldi r23, 0x01 ; 1
  2383. d7e: 80 e0 ldi r24, 0x00 ; 0
  2384. d80: 90 e0 ldi r25, 0x00 ; 0
  2385. d82: 0e 94 47 03 call 0x68e ; 0x68e <delay>
  2386. digitalWrite(LED5,LOW);
  2387. d86: 60 e0 ldi r22, 0x00 ; 0
  2388. d88: 82 e1 ldi r24, 0x12 ; 18
  2389. d8a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2390. digitalWrite(LED6,LOW);
  2391. d8e: 60 e0 ldi r22, 0x00 ; 0
  2392. d90: 83 e1 ldi r24, 0x13 ; 19
  2393. d92: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2394. digitalWrite(LED7,LOW);
  2395. d96: 60 e0 ldi r22, 0x00 ; 0
  2396. d98: 87 e0 ldi r24, 0x07 ; 7
  2397. d9a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2398. digitalWrite(LED8,LOW);
  2399. d9e: 60 e0 ldi r22, 0x00 ; 0
  2400. da0: 88 e0 ldi r24, 0x08 ; 8
  2401. da2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2402. // to 0 (the default).
  2403. #if defined(ADMUX)
  2404. #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
  2405. ADMUX = (analog_reference << 4) | (pin & 0x07);
  2406. #else
  2407. ADMUX = (analog_reference << 6) | (pin & 0x07);
  2408. da6: 86 e4 ldi r24, 0x46 ; 70
  2409. da8: b8 2e mov r11, r24
  2410. // prevent crash if called with base == 1
  2411. if (base < 2) base = 10;
  2412. do {
  2413. char c = n % base;
  2414. daa: 9a e0 ldi r25, 0x0A ; 10
  2415. dac: c9 2e mov r12, r25
  2416. dae: d1 2c mov r13, r1
  2417. db0: e1 2c mov r14, r1
  2418. db2: f1 2c mov r15, r1
  2419. db4: b0 92 7c 00 sts 0x007C, r11 ; 0x80007c <__TEXT_REGION_LENGTH__+0x7e007c>
  2420. // without a delay, we seem to read from the wrong channel
  2421. //delay(1);
  2422. #if defined(ADCSRA) && defined(ADCL)
  2423. // start the conversion
  2424. sbi(ADCSRA, ADSC);
  2425. db8: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2426. dbc: 80 64 ori r24, 0x40 ; 64
  2427. dbe: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2428. // ADSC is cleared when the conversion finishes
  2429. while (bit_is_set(ADCSRA, ADSC));
  2430. dc2: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
  2431. dc6: 86 fd sbrc r24, 6
  2432. dc8: fc cf rjmp .-8 ; 0xdc2 <main+0x230>
  2433. // we have to read ADCL first; doing so locks both ADCL
  2434. // and ADCH until ADCH is read. reading ADCL second would
  2435. // cause the results of each conversion to be discarded,
  2436. // as ADCL and ADCH would be locked when it completed.
  2437. low = ADCL;
  2438. dca: 20 91 78 00 lds r18, 0x0078 ; 0x800078 <__TEXT_REGION_LENGTH__+0x7e0078>
  2439. high = ADCH;
  2440. dce: 80 91 79 00 lds r24, 0x0079 ; 0x800079 <__TEXT_REGION_LENGTH__+0x7e0079>
  2441. }
  2442. void loop() {
  2443. // put your main code here, to run repeatedly:
  2444. gasVAL = analogRead(Sensor);
  2445. dd2: 30 e0 ldi r19, 0x00 ; 0
  2446. dd4: 38 2b or r19, r24
  2447. dd6: 30 93 33 01 sts 0x0133, r19 ; 0x800133 <__data_end+0x1>
  2448. dda: 20 93 32 01 sts 0x0132, r18 ; 0x800132 <__data_end>
  2449. return print((long) n, base);
  2450. }
  2451. size_t Print::print(unsigned int n, int base)
  2452. {
  2453. return print((unsigned long) n, base);
  2454. dde: 40 e0 ldi r20, 0x00 ; 0
  2455. de0: 50 e0 ldi r21, 0x00 ; 0
  2456. size_t Print::printNumber(unsigned long n, uint8_t base)
  2457. {
  2458. char buf[8 * sizeof(long) + 1]; // Assumes 8-bit chars plus zero byte.
  2459. char *str = &buf[sizeof(buf) - 1];
  2460. *str = '\0';
  2461. de2: 19 a2 std Y+33, r1 ; 0x21
  2462. de4: 8e 01 movw r16, r28
  2463. de6: 0f 5d subi r16, 0xDF ; 223
  2464. de8: 1f 4f sbci r17, 0xFF ; 255
  2465. // prevent crash if called with base == 1
  2466. if (base < 2) base = 10;
  2467. do {
  2468. char c = n % base;
  2469. n /= base;
  2470. dea: ca 01 movw r24, r20
  2471. dec: b9 01 movw r22, r18
  2472. dee: a7 01 movw r20, r14
  2473. df0: 96 01 movw r18, r12
  2474. df2: 0e 94 7d 08 call 0x10fa ; 0x10fa <__udivmodsi4>
  2475. *--str = c < 10 ? c + '0' : c + 'A' - 10;
  2476. df6: 60 5d subi r22, 0xD0 ; 208
  2477. df8: f8 01 movw r30, r16
  2478. dfa: 62 93 st -Z, r22
  2479. dfc: 8f 01 movw r16, r30
  2480. *str = '\0';
  2481. // prevent crash if called with base == 1
  2482. if (base < 2) base = 10;
  2483. do {
  2484. dfe: 21 15 cp r18, r1
  2485. e00: 31 05 cpc r19, r1
  2486. e02: 41 05 cpc r20, r1
  2487. e04: 51 05 cpc r21, r1
  2488. e06: 89 f7 brne .-30 ; 0xdea <main+0x258>
  2489. n /= base;
  2490. *--str = c < 10 ? c + '0' : c + 'A' - 10;
  2491. } while(n);
  2492. return write(str);
  2493. e08: cf 01 movw r24, r30
  2494. e0a: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
  2495. return x.printTo(*this);
  2496. }
  2497. size_t Print::println(void)
  2498. {
  2499. return write("\r\n");
  2500. e0e: 88 e2 ldi r24, 0x28 ; 40
  2501. e10: 91 e0 ldi r25, 0x01 ; 1
  2502. e12: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
  2503. Serial.println(gasVAL);
  2504. lightLED(gasVAL);
  2505. e16: 80 91 32 01 lds r24, 0x0132 ; 0x800132 <__data_end>
  2506. e1a: 90 91 33 01 lds r25, 0x0133 ; 0x800133 <__data_end+0x1>
  2507. }
  2508. void lightLED( uint16_t reading){
  2509. if (reading >= 750){
  2510. e1e: 8e 3e cpi r24, 0xEE ; 238
  2511. e20: f2 e0 ldi r31, 0x02 ; 2
  2512. e22: 9f 07 cpc r25, r31
  2513. e24: 18 f1 brcs .+70 ; 0xe6c <main+0x2da>
  2514. digitalWrite(LED1,HIGH);
  2515. e26: 61 e0 ldi r22, 0x01 ; 1
  2516. e28: 8e e0 ldi r24, 0x0E ; 14
  2517. e2a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2518. digitalWrite(LED2,HIGH);
  2519. e2e: 61 e0 ldi r22, 0x01 ; 1
  2520. e30: 8f e0 ldi r24, 0x0F ; 15
  2521. e32: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2522. digitalWrite(LED3,HIGH);
  2523. e36: 61 e0 ldi r22, 0x01 ; 1
  2524. e38: 80 e1 ldi r24, 0x10 ; 16
  2525. e3a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2526. digitalWrite(LED4,HIGH);
  2527. e3e: 61 e0 ldi r22, 0x01 ; 1
  2528. e40: 81 e1 ldi r24, 0x11 ; 17
  2529. e42: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2530. digitalWrite(LED5,HIGH);
  2531. e46: 61 e0 ldi r22, 0x01 ; 1
  2532. e48: 82 e1 ldi r24, 0x12 ; 18
  2533. e4a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2534. digitalWrite(LED6,HIGH);
  2535. e4e: 61 e0 ldi r22, 0x01 ; 1
  2536. e50: 83 e1 ldi r24, 0x13 ; 19
  2537. e52: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2538. digitalWrite(LED7,HIGH);
  2539. e56: 61 e0 ldi r22, 0x01 ; 1
  2540. e58: 87 e0 ldi r24, 0x07 ; 7
  2541. e5a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2542. digitalWrite(LED8,HIGH);
  2543. e5e: 61 e0 ldi r22, 0x01 ; 1
  2544. e60: 88 e0 ldi r24, 0x08 ; 8
  2545. e62: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2546. tone(SPKR,750,100);
  2547. e66: 8e ee ldi r24, 0xEE ; 238
  2548. e68: 92 e0 ldi r25, 0x02 ; 2
  2549. e6a: 26 c0 rjmp .+76 ; 0xeb8 <main+0x326>
  2550. }
  2551. else if (reading >= 700){
  2552. e6c: 8c 3b cpi r24, 0xBC ; 188
  2553. e6e: 22 e0 ldi r18, 0x02 ; 2
  2554. e70: 92 07 cpc r25, r18
  2555. e72: 28 f1 brcs .+74 ; 0xebe <main+0x32c>
  2556. digitalWrite(LED1,HIGH);
  2557. e74: 61 e0 ldi r22, 0x01 ; 1
  2558. e76: 8e e0 ldi r24, 0x0E ; 14
  2559. e78: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2560. digitalWrite(LED2,HIGH);
  2561. e7c: 61 e0 ldi r22, 0x01 ; 1
  2562. e7e: 8f e0 ldi r24, 0x0F ; 15
  2563. e80: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2564. digitalWrite(LED3,HIGH);
  2565. e84: 61 e0 ldi r22, 0x01 ; 1
  2566. e86: 80 e1 ldi r24, 0x10 ; 16
  2567. e88: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2568. digitalWrite(LED4,HIGH);
  2569. e8c: 61 e0 ldi r22, 0x01 ; 1
  2570. e8e: 81 e1 ldi r24, 0x11 ; 17
  2571. e90: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2572. digitalWrite(LED5,HIGH);
  2573. e94: 61 e0 ldi r22, 0x01 ; 1
  2574. e96: 82 e1 ldi r24, 0x12 ; 18
  2575. e98: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2576. digitalWrite(LED6,HIGH);
  2577. e9c: 61 e0 ldi r22, 0x01 ; 1
  2578. e9e: 83 e1 ldi r24, 0x13 ; 19
  2579. ea0: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2580. digitalWrite(LED7,HIGH);
  2581. ea4: 61 e0 ldi r22, 0x01 ; 1
  2582. ea6: 87 e0 ldi r24, 0x07 ; 7
  2583. ea8: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2584. digitalWrite(LED8,LOW);
  2585. eac: 60 e0 ldi r22, 0x00 ; 0
  2586. eae: 88 e0 ldi r24, 0x08 ; 8
  2587. eb0: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2588. tone(SPKR,700,100);
  2589. eb4: 8c eb ldi r24, 0xBC ; 188
  2590. eb6: 92 e0 ldi r25, 0x02 ; 2
  2591. eb8: 0e 94 a7 00 call 0x14e ; 0x14e <_Z4tonehjm.constprop.15>
  2592. ebc: e8 c0 rjmp .+464 ; 0x108e <main+0x4fc>
  2593. }
  2594. else if (reading >= 650){
  2595. ebe: 8a 38 cpi r24, 0x8A ; 138
  2596. ec0: e2 e0 ldi r30, 0x02 ; 2
  2597. ec2: 9e 07 cpc r25, r30
  2598. ec4: 18 f1 brcs .+70 ; 0xf0c <main+0x37a>
  2599. digitalWrite(LED1,HIGH);
  2600. ec6: 61 e0 ldi r22, 0x01 ; 1
  2601. ec8: 8e e0 ldi r24, 0x0E ; 14
  2602. eca: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2603. digitalWrite(LED2,HIGH);
  2604. ece: 61 e0 ldi r22, 0x01 ; 1
  2605. ed0: 8f e0 ldi r24, 0x0F ; 15
  2606. ed2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2607. digitalWrite(LED3,HIGH);
  2608. ed6: 61 e0 ldi r22, 0x01 ; 1
  2609. ed8: 80 e1 ldi r24, 0x10 ; 16
  2610. eda: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2611. digitalWrite(LED4,HIGH);
  2612. ede: 61 e0 ldi r22, 0x01 ; 1
  2613. ee0: 81 e1 ldi r24, 0x11 ; 17
  2614. ee2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2615. digitalWrite(LED5,HIGH);
  2616. ee6: 61 e0 ldi r22, 0x01 ; 1
  2617. ee8: 82 e1 ldi r24, 0x12 ; 18
  2618. eea: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2619. digitalWrite(LED6,HIGH);
  2620. eee: 61 e0 ldi r22, 0x01 ; 1
  2621. ef0: 83 e1 ldi r24, 0x13 ; 19
  2622. ef2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2623. digitalWrite(LED7,LOW);
  2624. ef6: 60 e0 ldi r22, 0x00 ; 0
  2625. ef8: 87 e0 ldi r24, 0x07 ; 7
  2626. efa: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2627. digitalWrite(LED8,LOW);
  2628. efe: 60 e0 ldi r22, 0x00 ; 0
  2629. f00: 88 e0 ldi r24, 0x08 ; 8
  2630. f02: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2631. tone(SPKR,650,100);
  2632. f06: 8a e8 ldi r24, 0x8A ; 138
  2633. f08: 92 e0 ldi r25, 0x02 ; 2
  2634. f0a: d6 cf rjmp .-84 ; 0xeb8 <main+0x326>
  2635. }
  2636. else if (reading >= 600){
  2637. f0c: 88 35 cpi r24, 0x58 ; 88
  2638. f0e: f2 e0 ldi r31, 0x02 ; 2
  2639. f10: 9f 07 cpc r25, r31
  2640. f12: 18 f1 brcs .+70 ; 0xf5a <main+0x3c8>
  2641. digitalWrite(LED1,HIGH);
  2642. f14: 61 e0 ldi r22, 0x01 ; 1
  2643. f16: 8e e0 ldi r24, 0x0E ; 14
  2644. f18: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2645. digitalWrite(LED2,HIGH);
  2646. f1c: 61 e0 ldi r22, 0x01 ; 1
  2647. f1e: 8f e0 ldi r24, 0x0F ; 15
  2648. f20: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2649. digitalWrite(LED3,HIGH);
  2650. f24: 61 e0 ldi r22, 0x01 ; 1
  2651. f26: 80 e1 ldi r24, 0x10 ; 16
  2652. f28: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2653. digitalWrite(LED4,HIGH);
  2654. f2c: 61 e0 ldi r22, 0x01 ; 1
  2655. f2e: 81 e1 ldi r24, 0x11 ; 17
  2656. f30: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2657. digitalWrite(LED5,HIGH);
  2658. f34: 61 e0 ldi r22, 0x01 ; 1
  2659. f36: 82 e1 ldi r24, 0x12 ; 18
  2660. f38: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2661. digitalWrite(LED6,LOW);
  2662. f3c: 60 e0 ldi r22, 0x00 ; 0
  2663. f3e: 83 e1 ldi r24, 0x13 ; 19
  2664. f40: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2665. digitalWrite(LED7,LOW);
  2666. f44: 60 e0 ldi r22, 0x00 ; 0
  2667. f46: 87 e0 ldi r24, 0x07 ; 7
  2668. f48: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2669. digitalWrite(LED8,LOW);
  2670. f4c: 60 e0 ldi r22, 0x00 ; 0
  2671. f4e: 88 e0 ldi r24, 0x08 ; 8
  2672. f50: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2673. tone(SPKR,600,100);
  2674. f54: 88 e5 ldi r24, 0x58 ; 88
  2675. f56: 92 e0 ldi r25, 0x02 ; 2
  2676. f58: af cf rjmp .-162 ; 0xeb8 <main+0x326>
  2677. }
  2678. else if (reading >= 550){
  2679. f5a: 86 32 cpi r24, 0x26 ; 38
  2680. f5c: 22 e0 ldi r18, 0x02 ; 2
  2681. f5e: 92 07 cpc r25, r18
  2682. f60: 18 f1 brcs .+70 ; 0xfa8 <main+0x416>
  2683. digitalWrite(LED1,HIGH);
  2684. f62: 61 e0 ldi r22, 0x01 ; 1
  2685. f64: 8e e0 ldi r24, 0x0E ; 14
  2686. f66: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2687. digitalWrite(LED2,HIGH);
  2688. f6a: 61 e0 ldi r22, 0x01 ; 1
  2689. f6c: 8f e0 ldi r24, 0x0F ; 15
  2690. f6e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2691. digitalWrite(LED3,HIGH);
  2692. f72: 61 e0 ldi r22, 0x01 ; 1
  2693. f74: 80 e1 ldi r24, 0x10 ; 16
  2694. f76: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2695. digitalWrite(LED4,HIGH);
  2696. f7a: 61 e0 ldi r22, 0x01 ; 1
  2697. f7c: 81 e1 ldi r24, 0x11 ; 17
  2698. f7e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2699. digitalWrite(LED5,LOW);
  2700. f82: 60 e0 ldi r22, 0x00 ; 0
  2701. f84: 82 e1 ldi r24, 0x12 ; 18
  2702. f86: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2703. digitalWrite(LED6,LOW);
  2704. f8a: 60 e0 ldi r22, 0x00 ; 0
  2705. f8c: 83 e1 ldi r24, 0x13 ; 19
  2706. f8e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2707. digitalWrite(LED7,LOW);
  2708. f92: 60 e0 ldi r22, 0x00 ; 0
  2709. f94: 87 e0 ldi r24, 0x07 ; 7
  2710. f96: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2711. digitalWrite(LED8,LOW);
  2712. f9a: 60 e0 ldi r22, 0x00 ; 0
  2713. f9c: 88 e0 ldi r24, 0x08 ; 8
  2714. f9e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2715. tone(SPKR,550,100);
  2716. fa2: 86 e2 ldi r24, 0x26 ; 38
  2717. fa4: 92 e0 ldi r25, 0x02 ; 2
  2718. fa6: 88 cf rjmp .-240 ; 0xeb8 <main+0x326>
  2719. }
  2720. else if (reading >= 500){
  2721. fa8: 84 3f cpi r24, 0xF4 ; 244
  2722. faa: e1 e0 ldi r30, 0x01 ; 1
  2723. fac: 9e 07 cpc r25, r30
  2724. fae: 18 f1 brcs .+70 ; 0xff6 <main+0x464>
  2725. digitalWrite(LED1,HIGH);
  2726. fb0: 61 e0 ldi r22, 0x01 ; 1
  2727. fb2: 8e e0 ldi r24, 0x0E ; 14
  2728. fb4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2729. digitalWrite(LED2,HIGH);
  2730. fb8: 61 e0 ldi r22, 0x01 ; 1
  2731. fba: 8f e0 ldi r24, 0x0F ; 15
  2732. fbc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2733. digitalWrite(LED3,HIGH);
  2734. fc0: 61 e0 ldi r22, 0x01 ; 1
  2735. fc2: 80 e1 ldi r24, 0x10 ; 16
  2736. fc4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2737. digitalWrite(LED4,LOW);
  2738. fc8: 60 e0 ldi r22, 0x00 ; 0
  2739. fca: 81 e1 ldi r24, 0x11 ; 17
  2740. fcc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2741. digitalWrite(LED5,LOW);
  2742. fd0: 60 e0 ldi r22, 0x00 ; 0
  2743. fd2: 82 e1 ldi r24, 0x12 ; 18
  2744. fd4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2745. digitalWrite(LED6,LOW);
  2746. fd8: 60 e0 ldi r22, 0x00 ; 0
  2747. fda: 83 e1 ldi r24, 0x13 ; 19
  2748. fdc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2749. digitalWrite(LED7,LOW);
  2750. fe0: 60 e0 ldi r22, 0x00 ; 0
  2751. fe2: 87 e0 ldi r24, 0x07 ; 7
  2752. fe4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2753. digitalWrite(LED8,LOW);
  2754. fe8: 60 e0 ldi r22, 0x00 ; 0
  2755. fea: 88 e0 ldi r24, 0x08 ; 8
  2756. fec: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2757. tone(SPKR,500,100);
  2758. ff0: 84 ef ldi r24, 0xF4 ; 244
  2759. ff2: 91 e0 ldi r25, 0x01 ; 1
  2760. ff4: 61 cf rjmp .-318 ; 0xeb8 <main+0x326>
  2761. }
  2762. else if (reading >= 410){
  2763. ff6: 8a 39 cpi r24, 0x9A ; 154
  2764. ff8: f1 e0 ldi r31, 0x01 ; 1
  2765. ffa: 9f 07 cpc r25, r31
  2766. ffc: 18 f1 brcs .+70 ; 0x1044 <main+0x4b2>
  2767. digitalWrite(LED1,HIGH);
  2768. ffe: 61 e0 ldi r22, 0x01 ; 1
  2769. 1000: 8e e0 ldi r24, 0x0E ; 14
  2770. 1002: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2771. digitalWrite(LED2,HIGH);
  2772. 1006: 61 e0 ldi r22, 0x01 ; 1
  2773. 1008: 8f e0 ldi r24, 0x0F ; 15
  2774. 100a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2775. digitalWrite(LED3,LOW);
  2776. 100e: 60 e0 ldi r22, 0x00 ; 0
  2777. 1010: 80 e1 ldi r24, 0x10 ; 16
  2778. 1012: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2779. digitalWrite(LED4,LOW);
  2780. 1016: 60 e0 ldi r22, 0x00 ; 0
  2781. 1018: 81 e1 ldi r24, 0x11 ; 17
  2782. 101a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2783. digitalWrite(LED5,LOW);
  2784. 101e: 60 e0 ldi r22, 0x00 ; 0
  2785. 1020: 82 e1 ldi r24, 0x12 ; 18
  2786. 1022: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2787. digitalWrite(LED6,LOW);
  2788. 1026: 60 e0 ldi r22, 0x00 ; 0
  2789. 1028: 83 e1 ldi r24, 0x13 ; 19
  2790. 102a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2791. digitalWrite(LED7,LOW);
  2792. 102e: 60 e0 ldi r22, 0x00 ; 0
  2793. 1030: 87 e0 ldi r24, 0x07 ; 7
  2794. 1032: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2795. digitalWrite(LED8,LOW);
  2796. 1036: 60 e0 ldi r22, 0x00 ; 0
  2797. 1038: 88 e0 ldi r24, 0x08 ; 8
  2798. 103a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2799. tone(SPKR,410,100);
  2800. 103e: 8a e9 ldi r24, 0x9A ; 154
  2801. 1040: 91 e0 ldi r25, 0x01 ; 1
  2802. 1042: 3a cf rjmp .-396 ; 0xeb8 <main+0x326>
  2803. }
  2804. else if (reading >= 300){
  2805. 1044: 8c 32 cpi r24, 0x2C ; 44
  2806. 1046: 91 40 sbci r25, 0x01 ; 1
  2807. 1048: 10 f0 brcs .+4 ; 0x104e <main+0x4bc>
  2808. digitalWrite(LED1,HIGH);
  2809. 104a: 61 e0 ldi r22, 0x01 ; 1
  2810. 104c: 01 c0 rjmp .+2 ; 0x1050 <main+0x4be>
  2811. digitalWrite(LED6,LOW);
  2812. digitalWrite(LED7,LOW);
  2813. digitalWrite(LED8,LOW);
  2814. }
  2815. else if (reading >= 0){
  2816. digitalWrite(LED1,LOW);
  2817. 104e: 60 e0 ldi r22, 0x00 ; 0
  2818. 1050: 8e e0 ldi r24, 0x0E ; 14
  2819. 1052: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2820. digitalWrite(LED2,LOW);
  2821. 1056: 60 e0 ldi r22, 0x00 ; 0
  2822. 1058: 8f e0 ldi r24, 0x0F ; 15
  2823. 105a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2824. digitalWrite(LED3,LOW);
  2825. 105e: 60 e0 ldi r22, 0x00 ; 0
  2826. 1060: 80 e1 ldi r24, 0x10 ; 16
  2827. 1062: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2828. digitalWrite(LED4,LOW);
  2829. 1066: 60 e0 ldi r22, 0x00 ; 0
  2830. 1068: 81 e1 ldi r24, 0x11 ; 17
  2831. 106a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2832. digitalWrite(LED5,LOW);
  2833. 106e: 60 e0 ldi r22, 0x00 ; 0
  2834. 1070: 82 e1 ldi r24, 0x12 ; 18
  2835. 1072: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2836. digitalWrite(LED6,LOW);
  2837. 1076: 60 e0 ldi r22, 0x00 ; 0
  2838. 1078: 83 e1 ldi r24, 0x13 ; 19
  2839. 107a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2840. digitalWrite(LED7,LOW);
  2841. 107e: 60 e0 ldi r22, 0x00 ; 0
  2842. 1080: 87 e0 ldi r24, 0x07 ; 7
  2843. 1082: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2844. digitalWrite(LED8,LOW);
  2845. 1086: 60 e0 ldi r22, 0x00 ; 0
  2846. 1088: 88 e0 ldi r24, 0x08 ; 8
  2847. 108a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
  2848. // put your main code here, to run repeatedly:
  2849. gasVAL = analogRead(Sensor);
  2850. Serial.println(gasVAL);
  2851. lightLED(gasVAL);
  2852. delay(30);
  2853. 108e: 6e e1 ldi r22, 0x1E ; 30
  2854. 1090: 70 e0 ldi r23, 0x00 ; 0
  2855. 1092: 80 e0 ldi r24, 0x00 ; 0
  2856. 1094: 90 e0 ldi r25, 0x00 ; 0
  2857. 1096: 0e 94 47 03 call 0x68e ; 0x68e <delay>
  2858. setup();
  2859. for (;;) {
  2860. loop();
  2861. if (serialEventRun) serialEventRun();
  2862. 109a: 0e 94 87 04 call 0x90e ; 0x90e <_Z14serialEventRunv>
  2863. 109e: 8a ce rjmp .-748 ; 0xdb4 <main+0x222>
  2864. 000010a0 <_GLOBAL__sub_I___vector_18>:
  2865. size_t printNumber(unsigned long, uint8_t);
  2866. size_t printFloat(double, uint8_t);
  2867. protected:
  2868. void setWriteError(int err = 1) { write_error = err; }
  2869. public:
  2870. Print() : write_error(0) {}
  2871. 10a0: ed e3 ldi r30, 0x3D ; 61
  2872. 10a2: f1 e0 ldi r31, 0x01 ; 1
  2873. 10a4: 13 82 std Z+3, r1 ; 0x03
  2874. 10a6: 12 82 std Z+2, r1 ; 0x02
  2875. public:
  2876. virtual int available() = 0;
  2877. virtual int read() = 0;
  2878. virtual int peek() = 0;
  2879. Stream() {_timeout=1000;}
  2880. 10a8: 88 ee ldi r24, 0xE8 ; 232
  2881. 10aa: 93 e0 ldi r25, 0x03 ; 3
  2882. 10ac: a0 e0 ldi r26, 0x00 ; 0
  2883. 10ae: b0 e0 ldi r27, 0x00 ; 0
  2884. 10b0: 84 83 std Z+4, r24 ; 0x04
  2885. 10b2: 95 83 std Z+5, r25 ; 0x05
  2886. 10b4: a6 83 std Z+6, r26 ; 0x06
  2887. 10b6: b7 83 std Z+7, r27 ; 0x07
  2888. volatile uint8_t *ucsrc, volatile uint8_t *udr) :
  2889. _ubrrh(ubrrh), _ubrrl(ubrrl),
  2890. _ucsra(ucsra), _ucsrb(ucsrb), _ucsrc(ucsrc),
  2891. _udr(udr),
  2892. _rx_buffer_head(0), _rx_buffer_tail(0),
  2893. _tx_buffer_head(0), _tx_buffer_tail(0)
  2894. 10b8: 85 e0 ldi r24, 0x05 ; 5
  2895. 10ba: 91 e0 ldi r25, 0x01 ; 1
  2896. 10bc: 91 83 std Z+1, r25 ; 0x01
  2897. 10be: 80 83 st Z, r24
  2898. 10c0: 85 ec ldi r24, 0xC5 ; 197
  2899. 10c2: 90 e0 ldi r25, 0x00 ; 0
  2900. 10c4: 95 87 std Z+13, r25 ; 0x0d
  2901. 10c6: 84 87 std Z+12, r24 ; 0x0c
  2902. 10c8: 84 ec ldi r24, 0xC4 ; 196
  2903. 10ca: 90 e0 ldi r25, 0x00 ; 0
  2904. 10cc: 97 87 std Z+15, r25 ; 0x0f
  2905. 10ce: 86 87 std Z+14, r24 ; 0x0e
  2906. 10d0: 80 ec ldi r24, 0xC0 ; 192
  2907. 10d2: 90 e0 ldi r25, 0x00 ; 0
  2908. 10d4: 91 8b std Z+17, r25 ; 0x11
  2909. 10d6: 80 8b std Z+16, r24 ; 0x10
  2910. 10d8: 81 ec ldi r24, 0xC1 ; 193
  2911. 10da: 90 e0 ldi r25, 0x00 ; 0
  2912. 10dc: 93 8b std Z+19, r25 ; 0x13
  2913. 10de: 82 8b std Z+18, r24 ; 0x12
  2914. 10e0: 82 ec ldi r24, 0xC2 ; 194
  2915. 10e2: 90 e0 ldi r25, 0x00 ; 0
  2916. 10e4: 95 8b std Z+21, r25 ; 0x15
  2917. 10e6: 84 8b std Z+20, r24 ; 0x14
  2918. 10e8: 86 ec ldi r24, 0xC6 ; 198
  2919. 10ea: 90 e0 ldi r25, 0x00 ; 0
  2920. 10ec: 97 8b std Z+23, r25 ; 0x17
  2921. 10ee: 86 8b std Z+22, r24 ; 0x16
  2922. 10f0: 11 8e std Z+25, r1 ; 0x19
  2923. 10f2: 12 8e std Z+26, r1 ; 0x1a
  2924. 10f4: 13 8e std Z+27, r1 ; 0x1b
  2925. 10f6: 14 8e std Z+28, r1 ; 0x1c
  2926. 10f8: 08 95 ret
  2927. 000010fa <__udivmodsi4>:
  2928. 10fa: a1 e2 ldi r26, 0x21 ; 33
  2929. 10fc: 1a 2e mov r1, r26
  2930. 10fe: aa 1b sub r26, r26
  2931. 1100: bb 1b sub r27, r27
  2932. 1102: fd 01 movw r30, r26
  2933. 1104: 0d c0 rjmp .+26 ; 0x1120 <__udivmodsi4_ep>
  2934. 00001106 <__udivmodsi4_loop>:
  2935. 1106: aa 1f adc r26, r26
  2936. 1108: bb 1f adc r27, r27
  2937. 110a: ee 1f adc r30, r30
  2938. 110c: ff 1f adc r31, r31
  2939. 110e: a2 17 cp r26, r18
  2940. 1110: b3 07 cpc r27, r19
  2941. 1112: e4 07 cpc r30, r20
  2942. 1114: f5 07 cpc r31, r21
  2943. 1116: 20 f0 brcs .+8 ; 0x1120 <__udivmodsi4_ep>
  2944. 1118: a2 1b sub r26, r18
  2945. 111a: b3 0b sbc r27, r19
  2946. 111c: e4 0b sbc r30, r20
  2947. 111e: f5 0b sbc r31, r21
  2948. 00001120 <__udivmodsi4_ep>:
  2949. 1120: 66 1f adc r22, r22
  2950. 1122: 77 1f adc r23, r23
  2951. 1124: 88 1f adc r24, r24
  2952. 1126: 99 1f adc r25, r25
  2953. 1128: 1a 94 dec r1
  2954. 112a: 69 f7 brne .-38 ; 0x1106 <__udivmodsi4_loop>
  2955. 112c: 60 95 com r22
  2956. 112e: 70 95 com r23
  2957. 1130: 80 95 com r24
  2958. 1132: 90 95 com r25
  2959. 1134: 9b 01 movw r18, r22
  2960. 1136: ac 01 movw r20, r24
  2961. 1138: bd 01 movw r22, r26
  2962. 113a: cf 01 movw r24, r30
  2963. 113c: 08 95 ret
  2964. 0000113e <__divmodsi4>:
  2965. 113e: 05 2e mov r0, r21
  2966. 1140: 97 fb bst r25, 7
  2967. 1142: 1e f4 brtc .+6 ; 0x114a <__divmodsi4+0xc>
  2968. 1144: 00 94 com r0
  2969. 1146: 0e 94 b6 08 call 0x116c ; 0x116c <__negsi2>
  2970. 114a: 57 fd sbrc r21, 7
  2971. 114c: 07 d0 rcall .+14 ; 0x115c <__divmodsi4_neg2>
  2972. 114e: 0e 94 7d 08 call 0x10fa ; 0x10fa <__udivmodsi4>
  2973. 1152: 07 fc sbrc r0, 7
  2974. 1154: 03 d0 rcall .+6 ; 0x115c <__divmodsi4_neg2>
  2975. 1156: 4e f4 brtc .+18 ; 0x116a <__divmodsi4_exit>
  2976. 1158: 0c 94 b6 08 jmp 0x116c ; 0x116c <__negsi2>
  2977. 0000115c <__divmodsi4_neg2>:
  2978. 115c: 50 95 com r21
  2979. 115e: 40 95 com r20
  2980. 1160: 30 95 com r19
  2981. 1162: 21 95 neg r18
  2982. 1164: 3f 4f sbci r19, 0xFF ; 255
  2983. 1166: 4f 4f sbci r20, 0xFF ; 255
  2984. 1168: 5f 4f sbci r21, 0xFF ; 255
  2985. 0000116a <__divmodsi4_exit>:
  2986. 116a: 08 95 ret
  2987. 0000116c <__negsi2>:
  2988. 116c: 90 95 com r25
  2989. 116e: 80 95 com r24
  2990. 1170: 70 95 com r23
  2991. 1172: 61 95 neg r22
  2992. 1174: 7f 4f sbci r23, 0xFF ; 255
  2993. 1176: 8f 4f sbci r24, 0xFF ; 255
  2994. 1178: 9f 4f sbci r25, 0xFF ; 255
  2995. 117a: 08 95 ret
  2996. 0000117c <__umulhisi3>:
  2997. 117c: a2 9f mul r26, r18
  2998. 117e: b0 01 movw r22, r0
  2999. 1180: b3 9f mul r27, r19
  3000. 1182: c0 01 movw r24, r0
  3001. 1184: a3 9f mul r26, r19
  3002. 1186: 70 0d add r23, r0
  3003. 1188: 81 1d adc r24, r1
  3004. 118a: 11 24 eor r1, r1
  3005. 118c: 91 1d adc r25, r1
  3006. 118e: b2 9f mul r27, r18
  3007. 1190: 70 0d add r23, r0
  3008. 1192: 81 1d adc r24, r1
  3009. 1194: 11 24 eor r1, r1
  3010. 1196: 91 1d adc r25, r1
  3011. 1198: 08 95 ret
  3012. 0000119a <__tablejump2__>:
  3013. 119a: ee 0f add r30, r30
  3014. 119c: ff 1f adc r31, r31
  3015. 119e: 05 90 lpm r0, Z+
  3016. 11a0: f4 91 lpm r31, Z
  3017. 11a2: e0 2d mov r30, r0
  3018. 11a4: 09 94 ijmp
  3019. 000011a6 <abort>:
  3020. 11a6: 81 e0 ldi r24, 0x01 ; 1
  3021. 11a8: 90 e0 ldi r25, 0x00 ; 0
  3022. 11aa: f8 94 cli
  3023. 11ac: 0c 94 d8 08 jmp 0x11b0 ; 0x11b0 <_exit>
  3024. 000011b0 <_exit>:
  3025. 11b0: f8 94 cli
  3026. 000011b2 <__stop_program>:
  3027. 11b2: ff cf rjmp .-2 ; 0x11b2 <__stop_program>