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FlammableGasSensor/pcb/panelback/gerbers/panelback-B.Fab.gbr

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FlammableGasSensor/pcb/panelback/gerbers/panelback-B.Mask.gbs

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FlammableGasSensor/pcb/panelback/gerbers/panelback-B.Paste.gbp

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FlammableGasSensor/pcb/panelback/gerbers/panelback-B.SilkS.gbo

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FlammableGasSensor/pcb/panelback/gerbers/panelback-Edge.Cuts.gm1

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+    (drawings 18)
+    (tracks 0)
+    (zones 0)
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+  )
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+  (page USLetter)
+  (title_block
+    (title "Project Title")
+  )
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+  (layers
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+    (47 F.CrtYd user)
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+    (49 F.Fab user)
+  )
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+      (hpglpennumber 1)
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+      (hpglpendiameter 15)
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+      (plotvalue true)
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+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
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+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory gerbers/))
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+  (net 0 "")
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+  (net_class Default "This is the default net class."
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+    (effects (font (size 1.2 1.2) (thickness 0.1524)))
+  )
+  (gr_text "Use for Programming only.\nDevice requires 9-12V to \npower Gas Sensor Heater" (at 112.5 96) (layer F.SilkS) (tstamp 5CF60329)
+    (effects (font (size 1 1) (thickness 0.1524) italic))
+  )
+  (gr_text USB (at 113 92) (layer F.SilkS) (tstamp 5CF60287)
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+  (gr_line (start 60 100) (end 60 79) (layer Edge.Cuts) (width 0.1524))
+  (gr_text "FABRICATION NOTES\n\n1. THIS IS A 2 LAYER BOARD. \n2. EXTERNAL LAYERS SHALL HAVE 1 OZ COPPER.\n3. MATERIAL: FR4 AND 0.062 INCH +/- 10% THICK.\n4. BOARDS SHALL BE ROHS COMPLIANT. \n5. MANUFACTURE IN ACCORDANCE WITH IPC-6012 CLASS 2\n6. MASK: BOTH SIDES OF THE BOARD SHALL HAVE \n   SOLDER MASK (ANY COLOR) OVER BARE COPPER. \n7. SILK: BOTH SIDES OF THE BOARD SHALL HAVE \n   WHITE SILKSCREEN. DO NOT PLACE SILK OVER BARE COPPER.\n8. FINISH: ENIG.\n9. MINIMUM TRACE WIDTH - 0.006 INCH.\n   MINIMUM SPACE - 0.006 INCH.\n   MINIMUM HOLE DIA - 0.013 INCH. \n10. MAX HOLE PLACEMENT TOLERANCE OF +/- 0.003 INCH.\n11. MAX HOLE DIAMETER TOLERANCE OF +/- 0.003 INCH AFTER PLATING." (at 21.844 161.544) (layer Dwgs.User)
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FlammableGasSensor/pcb/panelback/panelback.kicad_pcb-bak

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+(kicad_pcb (version 20171130) (host pcbnew 5.0.0-rc2)
+
+  (general
+    (thickness 1.6)
+    (drawings 18)
+    (tracks 0)
+    (zones 0)
+    (modules 0)
+    (nets 1)
+  )
+
+  (page USLetter)
+  (title_block
+    (title "Project Title")
+  )
+
+  (layers
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+    (31 B.Cu signal)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (44 Edge.Cuts user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
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+    (user_trace_width 0.1524)
+    (user_trace_width 0.254)
+    (user_trace_width 0.3302)
+    (user_trace_width 0.508)
+    (user_trace_width 0.762)
+    (user_trace_width 1.27)
+    (trace_clearance 0.254)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.1524)
+    (segment_width 0.1524)
+    (edge_width 0.1524)
+    (via_size 0.6858)
+    (via_drill 0.3302)
+    (via_min_size 0.6858)
+    (via_min_drill 0.3302)
+    (user_via 0.6858 0.3302)
+    (user_via 0.762 0.4064)
+    (user_via 0.8636 0.508)
+    (uvia_size 0.6858)
+    (uvia_drill 0.3302)
+    (uvias_allowed no)
+    (uvia_min_size 0)
+    (uvia_min_drill 0)
+    (pcb_text_width 0.1524)
+    (pcb_text_size 1.016 1.016)
+    (mod_edge_width 0.1524)
+    (mod_text_size 1.016 1.016)
+    (mod_text_width 0.1524)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.0762)
+    (solder_mask_min_width 0.1016)
+    (pad_to_paste_clearance -0.0762)
+    (aux_axis_origin 0 0)
+    (visible_elements 7FFFFFFF)
+    (pcbplotparams
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+      (usegerberextensions true)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory gerbers/))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.254)
+    (trace_width 0.254)
+    (via_dia 0.6858)
+    (via_drill 0.3302)
+    (uvia_dia 0.6858)
+    (uvia_drill 0.3302)
+  )
+
+  (gr_text "WARNING: All user serviceable parts inside!!!" (at 103 82) (layer F.SilkS)
+    (effects (font (size 1.2 1.2) (thickness 0.1524)))
+  )
+  (gr_text "Use for Programming only.\nDevice requires 9-12V to \npower Gas Sensor Heater" (at 112.5 96) (layer F.SilkS) (tstamp 5CF60329)
+    (effects (font (size 1 1) (thickness 0.1524) italic))
+  )
+  (gr_text USB (at 113 92) (layer F.SilkS) (tstamp 5CF60287)
+    (effects (font (size 2 2) (thickness 0.1524) italic))
+  )
+  (gr_text 9-12V+ (at 74 97) (layer F.SilkS)
+    (effects (font (size 2 2) (thickness 0.1524) italic))
+  )
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+  (gr_line (start 109 84.5) (end 117 84.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 109 89.5) (end 109 84.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 117 89.5) (end 109 89.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 117 85) (end 117 89.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 78.5 83.5) (end 69.5 83.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 78.5 94.5) (end 78.5 83.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 69.5 94.5) (end 78.5 94.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 69.5 83.5) (end 69.5 94.5) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 128 100) (end 60 100) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 128 79) (end 128 100) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 60 79) (end 128 79) (layer Edge.Cuts) (width 0.1524))
+  (gr_line (start 60 100) (end 60 79) (layer Edge.Cuts) (width 0.1524))
+  (gr_text "FABRICATION NOTES\n\n1. THIS IS A 2 LAYER BOARD. \n2. EXTERNAL LAYERS SHALL HAVE 1 OZ COPPER.\n3. MATERIAL: FR4 AND 0.062 INCH +/- 10% THICK.\n4. BOARDS SHALL BE ROHS COMPLIANT. \n5. MANUFACTURE IN ACCORDANCE WITH IPC-6012 CLASS 2\n6. MASK: BOTH SIDES OF THE BOARD SHALL HAVE \n   SOLDER MASK (ANY COLOR) OVER BARE COPPER. \n7. SILK: BOTH SIDES OF THE BOARD SHALL HAVE \n   WHITE SILKSCREEN. DO NOT PLACE SILK OVER BARE COPPER.\n8. FINISH: ENIG.\n9. MINIMUM TRACE WIDTH - 0.006 INCH.\n   MINIMUM SPACE - 0.006 INCH.\n   MINIMUM HOLE DIA - 0.013 INCH. \n10. MAX HOLE PLACEMENT TOLERANCE OF +/- 0.003 INCH.\n11. MAX HOLE DIAMETER TOLERANCE OF +/- 0.003 INCH AFTER PLATING." (at 21.844 161.544) (layer Dwgs.User)
+    (effects (font (size 2.54 2.54) (thickness 0.254)) (justify left))
+  )
+
+  (zone (net 0) (net_name "") (layers F&B.Cu) (tstamp 0) (hatch edge 0.508)
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FlammableGasSensor/pcb/panelback/panelback.pro

@@ -0,0 +1,41 @@
+update=Tue 11 Oct 2016 05:25:07 PM PDT
+version=1
+last_client=kicad
+[cvpcb]
+version=1
+NetIExt=net
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.016000000000
+PcbTextSizeH=1.016000000000
+PcbTextThickness=0.152400000000
+ModuleTextSizeV=1.016000000000
+ModuleTextSizeH=1.016000000000
+ModuleTextSizeThickness=0.152400000000
+SolderMaskClearance=0.003000000000
+SolderMaskMinWidth=0.004000000000
+DrawSegmentWidth=0.152400000000
+BoardOutlineThickness=0.152400000000
+ModuleOutlineThickness=0.152400000000
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=50
+[general]
+version=1

FlammableGasSensor/pcb/panelback/panelback.sch

@@ -0,0 +1,17 @@
+EESchema Schematic File Version 2
+LIBS:power
+EELAYER 25 0
+EELAYER END
+$Descr USLetter 11000 8500
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$EndSCHEMATC