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3245 lines
118 KiB
3245 lines
118 KiB
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gassensor_reva.ino.elf: file format elf32-avr
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Disassembly of section .text:
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00000000 <__vectors>:
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0: 0c 94 5e 00 jmp 0xbc ; 0xbc <__ctors_end>
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4: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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8: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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10: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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14: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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18: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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1c: 0c 94 ef 04 jmp 0x9de ; 0x9de <__vector_7>
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20: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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24: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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28: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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2c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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30: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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34: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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38: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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3c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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40: 0c 94 a5 04 jmp 0x94a ; 0x94a <__vector_16>
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44: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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48: 0c 94 97 05 jmp 0xb2e ; 0xb2e <__vector_18>
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4c: 0c 94 71 05 jmp 0xae2 ; 0xae2 <__vector_19>
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50: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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54: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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58: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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5c: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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60: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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64: 0c 94 86 00 jmp 0x10c ; 0x10c <__bad_interrupt>
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00000068 <__trampolines_end>:
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68: 00 00 nop
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6a: 00 08 sbc r0, r0
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6c: 00 02 muls r16, r16
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6e: 01 00 .word 0x0001 ; ????
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70: 00 03 mulsu r16, r16
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72: 04 07 cpc r16, r20
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...
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0000007c <_ZL21tone_pin_to_timer_PGM>:
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7c: 02 .
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0000007d <port_to_output_PGM>:
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7d: 00 00 00 00 25 00 28 00 2b 00 ....%.(.+.
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00000087 <port_to_mode_PGM>:
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87: 00 00 00 00 24 00 27 00 2a 00 ....$.'.*.
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00000091 <digital_pin_to_port_PGM>:
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91: 04 04 04 04 04 04 04 04 02 02 02 02 02 02 03 03 ................
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a1: 03 03 03 03 ....
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000000a5 <digital_pin_to_bit_mask_PGM>:
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a5: 01 02 04 08 10 20 40 80 01 02 04 08 10 20 01 02 ..... @...... ..
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b5: 04 08 10 20 00 ... .
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000000ba <__ctors_start>:
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ba: 50 08 sbc r5, r0
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000000bc <__ctors_end>:
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bc: 11 24 eor r1, r1
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be: 1f be out 0x3f, r1 ; 63
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c0: cf ef ldi r28, 0xFF ; 255
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c2: d8 e0 ldi r29, 0x08 ; 8
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c4: de bf out 0x3e, r29 ; 62
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c6: cd bf out 0x3d, r28 ; 61
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000000c8 <__do_copy_data>:
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c8: 11 e0 ldi r17, 0x01 ; 1
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ca: a0 e0 ldi r26, 0x00 ; 0
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cc: b1 e0 ldi r27, 0x01 ; 1
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ce: e4 eb ldi r30, 0xB4 ; 180
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d0: f1 e1 ldi r31, 0x11 ; 17
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d2: 02 c0 rjmp .+4 ; 0xd8 <__do_copy_data+0x10>
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d4: 05 90 lpm r0, Z+
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d6: 0d 92 st X+, r0
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d8: a2 33 cpi r26, 0x32 ; 50
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da: b1 07 cpc r27, r17
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dc: d9 f7 brne .-10 ; 0xd4 <__do_copy_data+0xc>
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000000de <__do_clear_bss>:
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de: 21 e0 ldi r18, 0x01 ; 1
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e0: a2 e3 ldi r26, 0x32 ; 50
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e2: b1 e0 ldi r27, 0x01 ; 1
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e4: 01 c0 rjmp .+2 ; 0xe8 <.do_clear_bss_start>
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000000e6 <.do_clear_bss_loop>:
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e6: 1d 92 st X+, r1
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000000e8 <.do_clear_bss_start>:
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e8: ab 3e cpi r26, 0xEB ; 235
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ea: b2 07 cpc r27, r18
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ec: e1 f7 brne .-8 ; 0xe6 <.do_clear_bss_loop>
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000000ee <__do_global_ctors>:
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ee: 10 e0 ldi r17, 0x00 ; 0
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f0: ce e5 ldi r28, 0x5E ; 94
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f2: d0 e0 ldi r29, 0x00 ; 0
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f4: 04 c0 rjmp .+8 ; 0xfe <__do_global_ctors+0x10>
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f6: 21 97 sbiw r28, 0x01 ; 1
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f8: fe 01 movw r30, r28
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fa: 0e 94 cd 08 call 0x119a ; 0x119a <__tablejump2__>
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fe: cd 35 cpi r28, 0x5D ; 93
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100: d1 07 cpc r29, r17
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102: c9 f7 brne .-14 ; 0xf6 <__do_global_ctors+0x8>
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104: 0e 94 c9 05 call 0xb92 ; 0xb92 <main>
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108: 0c 94 d8 08 jmp 0x11b0 ; 0x11b0 <_exit>
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0000010c <__bad_interrupt>:
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10c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
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00000110 <pinMode.constprop.17>:
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#include "wiring_private.h"
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#include "pins_arduino.h"
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void pinMode(uint8_t pin, uint8_t mode)
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{
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uint8_t bit = digitalPinToBitMask(pin);
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110: 90 e0 ldi r25, 0x00 ; 0
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112: fc 01 movw r30, r24
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114: eb 55 subi r30, 0x5B ; 91
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116: ff 4f sbci r31, 0xFF ; 255
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118: 24 91 lpm r18, Z
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uint8_t port = digitalPinToPort(pin);
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11a: fc 01 movw r30, r24
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11c: ef 56 subi r30, 0x6F ; 111
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11e: ff 4f sbci r31, 0xFF ; 255
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120: 84 91 lpm r24, Z
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volatile uint8_t *reg, *out;
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if (port == NOT_A_PIN) return;
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122: 88 23 and r24, r24
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124: 99 f0 breq .+38 ; 0x14c <pinMode.constprop.17+0x3c>
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// JWS: can I let the optimizer do this?
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reg = portModeRegister(port);
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126: 90 e0 ldi r25, 0x00 ; 0
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128: 88 0f add r24, r24
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12a: 99 1f adc r25, r25
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12c: fc 01 movw r30, r24
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12e: e9 57 subi r30, 0x79 ; 121
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130: ff 4f sbci r31, 0xFF ; 255
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132: a5 91 lpm r26, Z+
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134: b4 91 lpm r27, Z
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out = portOutputRegister(port);
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136: fc 01 movw r30, r24
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138: e3 58 subi r30, 0x83 ; 131
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13a: ff 4f sbci r31, 0xFF ; 255
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13c: 85 91 lpm r24, Z+
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13e: 94 91 lpm r25, Z
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cli();
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*reg &= ~bit;
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*out |= bit;
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SREG = oldSREG;
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} else {
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uint8_t oldSREG = SREG;
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140: 8f b7 in r24, 0x3f ; 63
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cli();
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142: f8 94 cli
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*reg |= bit;
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144: ec 91 ld r30, X
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146: e2 2b or r30, r18
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148: ec 93 st X, r30
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SREG = oldSREG;
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14a: 8f bf out 0x3f, r24 ; 63
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14c: 08 95 ret
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0000014e <_Z4tonehjm.constprop.15>:
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// frequency (in hertz) and duration (in milliseconds).
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void tone(uint8_t _pin, unsigned int frequency, unsigned long duration)
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14e: 4f 92 push r4
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150: 5f 92 push r5
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152: 6f 92 push r6
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154: 7f 92 push r7
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156: 8f 92 push r8
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158: 9f 92 push r9
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15a: af 92 push r10
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15c: bf 92 push r11
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15e: cf 92 push r12
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160: df 92 push r13
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162: ef 92 push r14
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164: ff 92 push r15
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166: 1f 93 push r17
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168: cf 93 push r28
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16a: df 93 push r29
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16c: ec 01 movw r28, r24
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{
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int8_t _timer = -1;
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// if we're already using the pin, the timer should be configured.
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for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
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if (tone_pins[i] == _pin) {
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16e: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__data_start>
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172: 85 30 cpi r24, 0x05 ; 5
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174: 21 f0 breq .+8 ; 0x17e <_Z4tonehjm.constprop.15+0x30>
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}
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}
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// search for an unused timer.
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for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
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if (tone_pins[i] == 255) {
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176: 8f 3f cpi r24, 0xFF ; 255
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178: 09 f0 breq .+2 ; 0x17c <_Z4tonehjm.constprop.15+0x2e>
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17a: 07 c2 rjmp .+1038 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
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17c: 04 c0 rjmp .+8 ; 0x186 <_Z4tonehjm.constprop.15+0x38>
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int8_t _timer = -1;
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// if we're already using the pin, the timer should be configured.
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for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
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if (tone_pins[i] == _pin) {
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return pgm_read_byte(tone_pin_to_timer_PGM + i);
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17e: ec e7 ldi r30, 0x7C ; 124
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180: f0 e0 ldi r31, 0x00 ; 0
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182: 14 91 lpm r17, Z
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184: 6e c0 rjmp .+220 ; 0x262 <_Z4tonehjm.constprop.15+0x114>
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}
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// search for an unused timer.
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for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
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if (tone_pins[i] == 255) {
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tone_pins[i] = _pin;
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186: 85 e0 ldi r24, 0x05 ; 5
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188: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__data_start>
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_timer = pgm_read_byte(tone_pin_to_timer_PGM + i);
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18c: ec e7 ldi r30, 0x7C ; 124
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18e: f0 e0 ldi r31, 0x00 ; 0
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190: 14 91 lpm r17, Z
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break;
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}
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}
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if (_timer != -1)
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192: 1f 3f cpi r17, 0xFF ; 255
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194: 09 f4 brne .+2 ; 0x198 <_Z4tonehjm.constprop.15+0x4a>
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196: f9 c1 rjmp .+1010 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
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{
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// Set timer specific stuff
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// All timers in CTC mode
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// 8 bit timers will require changing prescalar values,
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// whereas 16 bit timers are set to either ck/1 or ck/64 prescalar
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switch (_timer)
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198: 11 30 cpi r17, 0x01 ; 1
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19a: 09 f4 brne .+2 ; 0x19e <_Z4tonehjm.constprop.15+0x50>
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19c: 40 c0 rjmp .+128 ; 0x21e <_Z4tonehjm.constprop.15+0xd0>
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19e: 30 f1 brcs .+76 ; 0x1ec <_Z4tonehjm.constprop.15+0x9e>
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1a0: 12 30 cpi r17, 0x02 ; 2
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1a2: 09 f0 breq .+2 ; 0x1a6 <_Z4tonehjm.constprop.15+0x58>
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1a4: 5e c0 rjmp .+188 ; 0x262 <_Z4tonehjm.constprop.15+0x114>
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#endif
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#if defined(TCCR2A) && defined(TCCR2B)
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case 2:
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// 8 bit timer
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TCCR2A = 0;
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1a6: 10 92 b0 00 sts 0x00B0, r1 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
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TCCR2B = 0;
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1aa: 10 92 b1 00 sts 0x00B1, r1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
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bitWrite(TCCR2A, WGM21, 1);
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1ae: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
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1b2: 82 60 ori r24, 0x02 ; 2
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1b4: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
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bitWrite(TCCR2B, CS20, 1);
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1b8: 80 91 b1 00 lds r24, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
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1bc: 81 60 ori r24, 0x01 ; 1
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1be: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
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timer2_pin_port = portOutputRegister(digitalPinToPort(_pin));
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1c2: e6 e9 ldi r30, 0x96 ; 150
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1c4: f0 e0 ldi r31, 0x00 ; 0
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1c6: e4 91 lpm r30, Z
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1c8: f0 e0 ldi r31, 0x00 ; 0
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1ca: ee 0f add r30, r30
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1cc: ff 1f adc r31, r31
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1ce: e3 58 subi r30, 0x83 ; 131
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1d0: ff 4f sbci r31, 0xFF ; 255
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1d2: 85 91 lpm r24, Z+
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1d4: 94 91 lpm r25, Z
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1d6: 90 93 dc 01 sts 0x01DC, r25 ; 0x8001dc <timer2_pin_port+0x1>
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1da: 80 93 db 01 sts 0x01DB, r24 ; 0x8001db <timer2_pin_port>
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timer2_pin_mask = digitalPinToBitMask(_pin);
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1de: ea ea ldi r30, 0xAA ; 170
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1e0: f0 e0 ldi r31, 0x00 ; 0
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1e2: e4 91 lpm r30, Z
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1e4: e0 93 da 01 sts 0x01DA, r30 ; 0x8001da <timer2_pin_mask>
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1e8: 12 e0 ldi r17, 0x02 ; 2
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1ea: cb c1 rjmp .+918 ; 0x582 <__LOCK_REGION_LENGTH__+0x182>
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switch (_timer)
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{
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#if defined(TCCR0A) && defined(TCCR0B) && defined(WGM01)
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case 0:
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// 8 bit timer
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TCCR0A = 0;
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1ec: 14 bc out 0x24, r1 ; 36
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TCCR0B = 0;
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1ee: 15 bc out 0x25, r1 ; 37
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bitWrite(TCCR0A, WGM01, 1);
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1f0: 84 b5 in r24, 0x24 ; 36
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1f2: 82 60 ori r24, 0x02 ; 2
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1f4: 84 bd out 0x24, r24 ; 36
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bitWrite(TCCR0B, CS00, 1);
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1f6: 85 b5 in r24, 0x25 ; 37
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1f8: 81 60 ori r24, 0x01 ; 1
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1fa: 85 bd out 0x25, r24 ; 37
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timer0_pin_port = portOutputRegister(digitalPinToPort(_pin));
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1fc: e6 e9 ldi r30, 0x96 ; 150
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1fe: f0 e0 ldi r31, 0x00 ; 0
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200: e4 91 lpm r30, Z
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202: f0 e0 ldi r31, 0x00 ; 0
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204: ee 0f add r30, r30
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206: ff 1f adc r31, r31
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208: e3 58 subi r30, 0x83 ; 131
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20a: ff 4f sbci r31, 0xFF ; 255
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20c: 85 91 lpm r24, Z+
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20e: 94 91 lpm r25, Z
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timer0_pin_mask = digitalPinToBitMask(_pin);
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210: ea ea ldi r30, 0xAA ; 170
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212: f0 e0 ldi r31, 0x00 ; 0
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214: e4 91 lpm r30, Z
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216: e0 93 de 01 sts 0x01DE, r30 ; 0x8001de <timer0_pin_mask>
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21a: 10 e0 ldi r17, 0x00 ; 0
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21c: b2 c1 rjmp .+868 ; 0x582 <__LOCK_REGION_LENGTH__+0x182>
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#endif
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#if defined(TCCR1A) && defined(TCCR1B) && defined(WGM12)
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case 1:
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// 16 bit timer
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TCCR1A = 0;
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21e: 10 92 80 00 sts 0x0080, r1 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
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TCCR1B = 0;
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222: 10 92 81 00 sts 0x0081, r1 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
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bitWrite(TCCR1B, WGM12, 1);
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226: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
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22a: 88 60 ori r24, 0x08 ; 8
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22c: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
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bitWrite(TCCR1B, CS10, 1);
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230: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
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234: 81 60 ori r24, 0x01 ; 1
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236: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
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timer1_pin_port = portOutputRegister(digitalPinToPort(_pin));
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23a: e6 e9 ldi r30, 0x96 ; 150
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23c: f0 e0 ldi r31, 0x00 ; 0
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23e: e4 91 lpm r30, Z
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240: f0 e0 ldi r31, 0x00 ; 0
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242: ee 0f add r30, r30
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244: ff 1f adc r31, r31
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246: e3 58 subi r30, 0x83 ; 131
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248: ff 4f sbci r31, 0xFF ; 255
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24a: 85 91 lpm r24, Z+
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24c: 94 91 lpm r25, Z
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timer1_pin_mask = digitalPinToBitMask(_pin);
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24e: ea ea ldi r30, 0xAA ; 170
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250: f0 e0 ldi r31, 0x00 ; 0
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252: e4 91 lpm r30, Z
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254: e0 93 dd 01 sts 0x01DD, r30 ; 0x8001dd <timer1_pin_mask>
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_timer = toneBegin(_pin);
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if (_timer >= 0)
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{
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// Set the pinMode as OUTPUT
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pinMode(_pin, OUTPUT);
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258: 85 e0 ldi r24, 0x05 ; 5
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25a: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
25e: 11 e0 ldi r17, 0x01 ; 1
|
|
260: b0 c0 rjmp .+352 ; 0x3c2 <_Z4tonehjm.constprop.15+0x274>
|
|
uint32_t ocr = 0;
|
|
int8_t _timer;
|
|
|
|
_timer = toneBegin(_pin);
|
|
|
|
if (_timer >= 0)
|
|
262: 17 fd sbrc r17, 7
|
|
264: 92 c1 rjmp .+804 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
|
|
{
|
|
// Set the pinMode as OUTPUT
|
|
pinMode(_pin, OUTPUT);
|
|
266: 85 e0 ldi r24, 0x05 ; 5
|
|
268: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
|
|
// if we are using an 8 bit timer, scan through prescalars to find the best fit
|
|
if (_timer == 0 || _timer == 2)
|
|
26c: 81 2f mov r24, r17
|
|
26e: 8d 7f andi r24, 0xFD ; 253
|
|
270: 09 f0 breq .+2 ; 0x274 <_Z4tonehjm.constprop.15+0x126>
|
|
272: a7 c0 rjmp .+334 ; 0x3c2 <_Z4tonehjm.constprop.15+0x274>
|
|
{
|
|
ocr = F_CPU / frequency / 2 - 1;
|
|
274: 4e 01 movw r8, r28
|
|
276: a1 2c mov r10, r1
|
|
278: b1 2c mov r11, r1
|
|
27a: 60 e0 ldi r22, 0x00 ; 0
|
|
27c: 72 e1 ldi r23, 0x12 ; 18
|
|
27e: 8a e7 ldi r24, 0x7A ; 122
|
|
280: 90 e0 ldi r25, 0x00 ; 0
|
|
282: a5 01 movw r20, r10
|
|
284: 94 01 movw r18, r8
|
|
286: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
28a: 29 01 movw r4, r18
|
|
28c: 3a 01 movw r6, r20
|
|
28e: 69 01 movw r12, r18
|
|
290: 7a 01 movw r14, r20
|
|
292: 21 e0 ldi r18, 0x01 ; 1
|
|
294: c2 1a sub r12, r18
|
|
296: d1 08 sbc r13, r1
|
|
298: e1 08 sbc r14, r1
|
|
29a: f1 08 sbc r15, r1
|
|
prescalarbits = 0b001; // ck/1: same for both timers
|
|
if (ocr > 255)
|
|
29c: 8f ef ldi r24, 0xFF ; 255
|
|
29e: c8 16 cp r12, r24
|
|
2a0: d1 04 cpc r13, r1
|
|
2a2: e1 04 cpc r14, r1
|
|
2a4: f1 04 cpc r15, r1
|
|
2a6: 09 f0 breq .+2 ; 0x2aa <_Z4tonehjm.constprop.15+0x15c>
|
|
2a8: 08 f4 brcc .+2 ; 0x2ac <_Z4tonehjm.constprop.15+0x15e>
|
|
2aa: 4b c0 rjmp .+150 ; 0x342 <_Z4tonehjm.constprop.15+0x1f4>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 8 - 1;
|
|
2ac: 60 e4 ldi r22, 0x40 ; 64
|
|
2ae: 72 e4 ldi r23, 0x42 ; 66
|
|
2b0: 8f e0 ldi r24, 0x0F ; 15
|
|
2b2: 90 e0 ldi r25, 0x00 ; 0
|
|
2b4: a5 01 movw r20, r10
|
|
2b6: 94 01 movw r18, r8
|
|
2b8: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
2bc: 69 01 movw r12, r18
|
|
2be: 7a 01 movw r14, r20
|
|
2c0: 81 e0 ldi r24, 0x01 ; 1
|
|
2c2: c8 1a sub r12, r24
|
|
2c4: d1 08 sbc r13, r1
|
|
2c6: e1 08 sbc r14, r1
|
|
2c8: f1 08 sbc r15, r1
|
|
prescalarbits = 0b010; // ck/8: same for both timers
|
|
|
|
if (_timer == 2 && ocr > 255)
|
|
2ca: 12 30 cpi r17, 0x02 ; 2
|
|
2cc: 01 f5 brne .+64 ; 0x30e <_Z4tonehjm.constprop.15+0x1c0>
|
|
2ce: 2f ef ldi r18, 0xFF ; 255
|
|
2d0: c2 16 cp r12, r18
|
|
2d2: d1 04 cpc r13, r1
|
|
2d4: e1 04 cpc r14, r1
|
|
2d6: f1 04 cpc r15, r1
|
|
2d8: 09 f0 breq .+2 ; 0x2dc <_Z4tonehjm.constprop.15+0x18e>
|
|
2da: 08 f4 brcc .+2 ; 0x2de <_Z4tonehjm.constprop.15+0x190>
|
|
2dc: ea c0 rjmp .+468 ; 0x4b2 <__LOCK_REGION_LENGTH__+0xb2>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 32 - 1;
|
|
2de: 60 e9 ldi r22, 0x90 ; 144
|
|
2e0: 70 ed ldi r23, 0xD0 ; 208
|
|
2e2: 83 e0 ldi r24, 0x03 ; 3
|
|
2e4: 90 e0 ldi r25, 0x00 ; 0
|
|
2e6: a5 01 movw r20, r10
|
|
2e8: 94 01 movw r18, r8
|
|
2ea: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
2ee: 69 01 movw r12, r18
|
|
2f0: 7a 01 movw r14, r20
|
|
2f2: 81 e0 ldi r24, 0x01 ; 1
|
|
2f4: c8 1a sub r12, r24
|
|
2f6: d1 08 sbc r13, r1
|
|
2f8: e1 08 sbc r14, r1
|
|
2fa: f1 08 sbc r15, r1
|
|
prescalarbits = 0b011;
|
|
}
|
|
|
|
if (ocr > 255)
|
|
2fc: 2f ef ldi r18, 0xFF ; 255
|
|
2fe: c2 16 cp r12, r18
|
|
300: d1 04 cpc r13, r1
|
|
302: e1 04 cpc r14, r1
|
|
304: f1 04 cpc r15, r1
|
|
306: 09 f0 breq .+2 ; 0x30a <_Z4tonehjm.constprop.15+0x1bc>
|
|
308: 30 f5 brcc .+76 ; 0x356 <_Z4tonehjm.constprop.15+0x208>
|
|
prescalarbits = 0b010; // ck/8: same for both timers
|
|
|
|
if (_timer == 2 && ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 32 - 1;
|
|
prescalarbits = 0b011;
|
|
30a: 83 e0 ldi r24, 0x03 ; 3
|
|
30c: 53 c0 rjmp .+166 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
|
|
}
|
|
|
|
if (ocr > 255)
|
|
30e: 8f ef ldi r24, 0xFF ; 255
|
|
310: c8 16 cp r12, r24
|
|
312: d1 04 cpc r13, r1
|
|
314: e1 04 cpc r14, r1
|
|
316: f1 04 cpc r15, r1
|
|
318: b1 f0 breq .+44 ; 0x346 <_Z4tonehjm.constprop.15+0x1f8>
|
|
31a: a8 f0 brcs .+42 ; 0x346 <_Z4tonehjm.constprop.15+0x1f8>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
31c: 68 e4 ldi r22, 0x48 ; 72
|
|
31e: 78 ee ldi r23, 0xE8 ; 232
|
|
320: 81 e0 ldi r24, 0x01 ; 1
|
|
322: 90 e0 ldi r25, 0x00 ; 0
|
|
324: a5 01 movw r20, r10
|
|
326: 94 01 movw r18, r8
|
|
328: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
32c: 69 01 movw r12, r18
|
|
32e: 7a 01 movw r14, r20
|
|
330: 81 e0 ldi r24, 0x01 ; 1
|
|
332: c8 1a sub r12, r24
|
|
334: d1 08 sbc r13, r1
|
|
336: e1 08 sbc r14, r1
|
|
338: f1 08 sbc r15, r1
|
|
prescalarbits = _timer == 0 ? 0b011 : 0b100;
|
|
33a: 11 23 and r17, r17
|
|
33c: 09 f4 brne .+2 ; 0x340 <_Z4tonehjm.constprop.15+0x1f2>
|
|
33e: ee c0 rjmp .+476 ; 0x51c <__LOCK_REGION_LENGTH__+0x11c>
|
|
340: e4 c0 rjmp .+456 ; 0x50a <__LOCK_REGION_LENGTH__+0x10a>
|
|
|
|
// if we are using an 8 bit timer, scan through prescalars to find the best fit
|
|
if (_timer == 0 || _timer == 2)
|
|
{
|
|
ocr = F_CPU / frequency / 2 - 1;
|
|
prescalarbits = 0b001; // ck/1: same for both timers
|
|
342: 81 e0 ldi r24, 0x01 ; 1
|
|
344: 01 c0 rjmp .+2 ; 0x348 <_Z4tonehjm.constprop.15+0x1fa>
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 8 - 1;
|
|
prescalarbits = 0b010; // ck/8: same for both timers
|
|
346: 82 e0 ldi r24, 0x02 ; 2
|
|
}
|
|
}
|
|
}
|
|
|
|
#if defined(TCCR0B)
|
|
if (_timer == 0)
|
|
348: 11 11 cpse r17, r1
|
|
34a: 34 c0 rjmp .+104 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
|
|
{
|
|
TCCR0B = (TCCR0B & 0b11111000) | prescalarbits;
|
|
34c: 95 b5 in r25, 0x25 ; 37
|
|
34e: 98 7f andi r25, 0xF8 ; 248
|
|
350: 89 2b or r24, r25
|
|
352: 85 bd out 0x25, r24 ; 37
|
|
354: 68 c0 rjmp .+208 ; 0x426 <__LOCK_REGION_LENGTH__+0x26>
|
|
prescalarbits = 0b011;
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
356: 68 e4 ldi r22, 0x48 ; 72
|
|
358: 78 ee ldi r23, 0xE8 ; 232
|
|
35a: 81 e0 ldi r24, 0x01 ; 1
|
|
35c: 90 e0 ldi r25, 0x00 ; 0
|
|
35e: a5 01 movw r20, r10
|
|
360: 94 01 movw r18, r8
|
|
362: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
366: 69 01 movw r12, r18
|
|
368: 7a 01 movw r14, r20
|
|
36a: 81 e0 ldi r24, 0x01 ; 1
|
|
36c: c8 1a sub r12, r24
|
|
36e: d1 08 sbc r13, r1
|
|
370: e1 08 sbc r14, r1
|
|
372: f1 08 sbc r15, r1
|
|
prescalarbits = _timer == 0 ? 0b011 : 0b100;
|
|
|
|
if (_timer == 2 && ocr > 255)
|
|
374: 2f ef ldi r18, 0xFF ; 255
|
|
376: c2 16 cp r12, r18
|
|
378: d1 04 cpc r13, r1
|
|
37a: e1 04 cpc r14, r1
|
|
37c: f1 04 cpc r15, r1
|
|
37e: 09 f0 breq .+2 ; 0x382 <_Z4tonehjm.constprop.15+0x234>
|
|
380: 08 f4 brcc .+2 ; 0x384 <_Z4tonehjm.constprop.15+0x236>
|
|
382: 95 c0 rjmp .+298 ; 0x4ae <__LOCK_REGION_LENGTH__+0xae>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 128 - 1;
|
|
384: 64 e2 ldi r22, 0x24 ; 36
|
|
386: 74 ef ldi r23, 0xF4 ; 244
|
|
388: 80 e0 ldi r24, 0x00 ; 0
|
|
38a: 90 e0 ldi r25, 0x00 ; 0
|
|
38c: a5 01 movw r20, r10
|
|
38e: 94 01 movw r18, r8
|
|
390: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
394: 69 01 movw r12, r18
|
|
396: 7a 01 movw r14, r20
|
|
398: 81 e0 ldi r24, 0x01 ; 1
|
|
39a: c8 1a sub r12, r24
|
|
39c: d1 08 sbc r13, r1
|
|
39e: e1 08 sbc r14, r1
|
|
3a0: f1 08 sbc r15, r1
|
|
prescalarbits = 0b101;
|
|
}
|
|
|
|
if (ocr > 255)
|
|
3a2: 2f ef ldi r18, 0xFF ; 255
|
|
3a4: c2 16 cp r12, r18
|
|
3a6: d1 04 cpc r13, r1
|
|
3a8: e1 04 cpc r14, r1
|
|
3aa: f1 04 cpc r15, r1
|
|
3ac: 11 f0 breq .+4 ; 0x3b2 <_Z4tonehjm.constprop.15+0x264>
|
|
3ae: 08 f0 brcs .+2 ; 0x3b2 <_Z4tonehjm.constprop.15+0x264>
|
|
3b0: 82 c0 rjmp .+260 ; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6>
|
|
prescalarbits = _timer == 0 ? 0b011 : 0b100;
|
|
|
|
if (_timer == 2 && ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 128 - 1;
|
|
prescalarbits = 0b101;
|
|
3b2: 85 e0 ldi r24, 0x05 ; 5
|
|
}
|
|
else
|
|
#endif
|
|
#if defined(TCCR2B)
|
|
{
|
|
TCCR2B = (TCCR2B & 0b11111000) | prescalarbits;
|
|
3b4: 90 91 b1 00 lds r25, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
|
|
3b8: 98 7f andi r25, 0xF8 ; 248
|
|
3ba: 89 2b or r24, r25
|
|
3bc: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
|
|
3c0: 32 c0 rjmp .+100 ; 0x426 <__LOCK_REGION_LENGTH__+0x26>
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
// two choices for the 16 bit timers: ck/1 or ck/64
|
|
ocr = F_CPU / frequency / 2 - 1;
|
|
3c2: 4e 01 movw r8, r28
|
|
3c4: a1 2c mov r10, r1
|
|
3c6: b1 2c mov r11, r1
|
|
3c8: 60 e0 ldi r22, 0x00 ; 0
|
|
3ca: 72 e1 ldi r23, 0x12 ; 18
|
|
3cc: 8a e7 ldi r24, 0x7A ; 122
|
|
3ce: 90 e0 ldi r25, 0x00 ; 0
|
|
3d0: a5 01 movw r20, r10
|
|
3d2: 94 01 movw r18, r8
|
|
3d4: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
3d8: 69 01 movw r12, r18
|
|
3da: 7a 01 movw r14, r20
|
|
3dc: 81 e0 ldi r24, 0x01 ; 1
|
|
3de: c8 1a sub r12, r24
|
|
3e0: d1 08 sbc r13, r1
|
|
3e2: e1 08 sbc r14, r1
|
|
3e4: f1 08 sbc r15, r1
|
|
|
|
prescalarbits = 0b001;
|
|
if (ocr > 0xffff)
|
|
3e6: c1 14 cp r12, r1
|
|
3e8: d1 04 cpc r13, r1
|
|
3ea: 21 e0 ldi r18, 0x01 ; 1
|
|
3ec: e2 06 cpc r14, r18
|
|
3ee: f1 04 cpc r15, r1
|
|
3f0: 88 f0 brcs .+34 ; 0x414 <__LOCK_REGION_LENGTH__+0x14>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
3f2: 68 e4 ldi r22, 0x48 ; 72
|
|
3f4: 78 ee ldi r23, 0xE8 ; 232
|
|
3f6: 81 e0 ldi r24, 0x01 ; 1
|
|
3f8: 90 e0 ldi r25, 0x00 ; 0
|
|
3fa: a5 01 movw r20, r10
|
|
3fc: 94 01 movw r18, r8
|
|
3fe: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
402: 69 01 movw r12, r18
|
|
404: 7a 01 movw r14, r20
|
|
406: 81 e0 ldi r24, 0x01 ; 1
|
|
408: c8 1a sub r12, r24
|
|
40a: d1 08 sbc r13, r1
|
|
40c: e1 08 sbc r14, r1
|
|
40e: f1 08 sbc r15, r1
|
|
prescalarbits = 0b011;
|
|
410: 83 e0 ldi r24, 0x03 ; 3
|
|
412: 01 c0 rjmp .+2 ; 0x416 <__LOCK_REGION_LENGTH__+0x16>
|
|
else
|
|
{
|
|
// two choices for the 16 bit timers: ck/1 or ck/64
|
|
ocr = F_CPU / frequency / 2 - 1;
|
|
|
|
prescalarbits = 0b001;
|
|
414: 81 e0 ldi r24, 0x01 ; 1
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
prescalarbits = 0b011;
|
|
}
|
|
|
|
if (_timer == 1)
|
|
416: 11 30 cpi r17, 0x01 ; 1
|
|
418: 31 f4 brne .+12 ; 0x426 <__LOCK_REGION_LENGTH__+0x26>
|
|
{
|
|
#if defined(TCCR1B)
|
|
TCCR1B = (TCCR1B & 0b11111000) | prescalarbits;
|
|
41a: 90 91 81 00 lds r25, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
41e: 98 7f andi r25, 0xF8 ; 248
|
|
420: 89 2b or r24, r25
|
|
422: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
|
|
|
|
// Calculate the toggle count
|
|
if (duration > 0)
|
|
{
|
|
toggle_count = 2 * frequency * duration / 1000;
|
|
426: 9e 01 movw r18, r28
|
|
428: 22 0f add r18, r18
|
|
42a: 33 1f adc r19, r19
|
|
42c: a4 e6 ldi r26, 0x64 ; 100
|
|
42e: b0 e0 ldi r27, 0x00 ; 0
|
|
430: 0e 94 be 08 call 0x117c ; 0x117c <__umulhisi3>
|
|
434: 28 ee ldi r18, 0xE8 ; 232
|
|
436: 33 e0 ldi r19, 0x03 ; 3
|
|
438: 40 e0 ldi r20, 0x00 ; 0
|
|
43a: 50 e0 ldi r21, 0x00 ; 0
|
|
43c: 0e 94 7d 08 call 0x10fa ; 0x10fa <__udivmodsi4>
|
|
}
|
|
|
|
// Set the OCR for the given timer,
|
|
// set the toggle count,
|
|
// then turn on the interrupts
|
|
switch (_timer)
|
|
440: 11 30 cpi r17, 0x01 ; 1
|
|
442: 99 f0 breq .+38 ; 0x46a <__LOCK_REGION_LENGTH__+0x6a>
|
|
444: 12 30 cpi r17, 0x02 ; 2
|
|
446: 19 f1 breq .+70 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e>
|
|
448: 11 11 cpse r17, r1
|
|
44a: 9f c0 rjmp .+318 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
|
|
{
|
|
|
|
#if defined(OCR0A) && defined(TIMSK0) && defined(OCIE0A)
|
|
case 0:
|
|
OCR0A = ocr;
|
|
44c: c7 bc out 0x27, r12 ; 39
|
|
timer0_toggle_count = toggle_count;
|
|
44e: 20 93 e7 01 sts 0x01E7, r18 ; 0x8001e7 <timer0_toggle_count>
|
|
452: 30 93 e8 01 sts 0x01E8, r19 ; 0x8001e8 <timer0_toggle_count+0x1>
|
|
456: 40 93 e9 01 sts 0x01E9, r20 ; 0x8001e9 <timer0_toggle_count+0x2>
|
|
45a: 50 93 ea 01 sts 0x01EA, r21 ; 0x8001ea <timer0_toggle_count+0x3>
|
|
bitWrite(TIMSK0, OCIE0A, 1);
|
|
45e: 80 91 6e 00 lds r24, 0x006E ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
|
|
462: 82 60 ori r24, 0x02 ; 2
|
|
464: 80 93 6e 00 sts 0x006E, r24 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
|
|
468: 90 c0 rjmp .+288 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
|
|
break;
|
|
#endif
|
|
|
|
case 1:
|
|
#if defined(OCR1A) && defined(TIMSK1) && defined(OCIE1A)
|
|
OCR1A = ocr;
|
|
46a: d0 92 89 00 sts 0x0089, r13 ; 0x800089 <__TEXT_REGION_LENGTH__+0x7e0089>
|
|
46e: c0 92 88 00 sts 0x0088, r12 ; 0x800088 <__TEXT_REGION_LENGTH__+0x7e0088>
|
|
timer1_toggle_count = toggle_count;
|
|
472: 20 93 e3 01 sts 0x01E3, r18 ; 0x8001e3 <timer1_toggle_count>
|
|
476: 30 93 e4 01 sts 0x01E4, r19 ; 0x8001e4 <timer1_toggle_count+0x1>
|
|
47a: 40 93 e5 01 sts 0x01E5, r20 ; 0x8001e5 <timer1_toggle_count+0x2>
|
|
47e: 50 93 e6 01 sts 0x01E6, r21 ; 0x8001e6 <timer1_toggle_count+0x3>
|
|
bitWrite(TIMSK1, OCIE1A, 1);
|
|
482: 80 91 6f 00 lds r24, 0x006F ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
|
|
486: 82 60 ori r24, 0x02 ; 2
|
|
488: 80 93 6f 00 sts 0x006F, r24 ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
|
|
48c: 7e c0 rjmp .+252 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
|
|
#endif
|
|
break;
|
|
|
|
#if defined(OCR2A) && defined(TIMSK2) && defined(OCIE2A)
|
|
case 2:
|
|
OCR2A = ocr;
|
|
48e: c0 92 b3 00 sts 0x00B3, r12 ; 0x8000b3 <__TEXT_REGION_LENGTH__+0x7e00b3>
|
|
timer2_toggle_count = toggle_count;
|
|
492: 20 93 df 01 sts 0x01DF, r18 ; 0x8001df <timer2_toggle_count>
|
|
496: 30 93 e0 01 sts 0x01E0, r19 ; 0x8001e0 <timer2_toggle_count+0x1>
|
|
49a: 40 93 e1 01 sts 0x01E1, r20 ; 0x8001e1 <timer2_toggle_count+0x2>
|
|
49e: 50 93 e2 01 sts 0x01E2, r21 ; 0x8001e2 <timer2_toggle_count+0x3>
|
|
bitWrite(TIMSK2, OCIE2A, 1);
|
|
4a2: 80 91 70 00 lds r24, 0x0070 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
|
|
4a6: 82 60 ori r24, 0x02 ; 2
|
|
4a8: 80 93 70 00 sts 0x0070, r24 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
|
|
4ac: 6e c0 rjmp .+220 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a>
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
prescalarbits = _timer == 0 ? 0b011 : 0b100;
|
|
4ae: 84 e0 ldi r24, 0x04 ; 4
|
|
4b0: 81 cf rjmp .-254 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
|
|
ocr = F_CPU / frequency / 2 - 1;
|
|
prescalarbits = 0b001; // ck/1: same for both timers
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 8 - 1;
|
|
prescalarbits = 0b010; // ck/8: same for both timers
|
|
4b2: 82 e0 ldi r24, 0x02 ; 2
|
|
4b4: 7f cf rjmp .-258 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
|
|
prescalarbits = 0b101;
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 256 - 1;
|
|
4b6: 62 e1 ldi r22, 0x12 ; 18
|
|
4b8: 7a e7 ldi r23, 0x7A ; 122
|
|
4ba: 80 e0 ldi r24, 0x00 ; 0
|
|
4bc: 90 e0 ldi r25, 0x00 ; 0
|
|
4be: a5 01 movw r20, r10
|
|
4c0: 94 01 movw r18, r8
|
|
4c2: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
4c6: 69 01 movw r12, r18
|
|
4c8: 7a 01 movw r14, r20
|
|
4ca: 81 e0 ldi r24, 0x01 ; 1
|
|
4cc: c8 1a sub r12, r24
|
|
4ce: d1 08 sbc r13, r1
|
|
4d0: e1 08 sbc r14, r1
|
|
4d2: f1 08 sbc r15, r1
|
|
prescalarbits = _timer == 0 ? 0b100 : 0b110;
|
|
if (ocr > 255)
|
|
4d4: 8f ef ldi r24, 0xFF ; 255
|
|
4d6: c8 16 cp r12, r24
|
|
4d8: d1 04 cpc r13, r1
|
|
4da: e1 04 cpc r14, r1
|
|
4dc: f1 04 cpc r15, r1
|
|
4de: 99 f0 breq .+38 ; 0x506 <__LOCK_REGION_LENGTH__+0x106>
|
|
4e0: 90 f0 brcs .+36 ; 0x506 <__LOCK_REGION_LENGTH__+0x106>
|
|
{
|
|
// can't do any better than /1024
|
|
ocr = F_CPU / frequency / 2 / 1024 - 1;
|
|
4e2: d3 01 movw r26, r6
|
|
4e4: c2 01 movw r24, r4
|
|
4e6: 2a e0 ldi r18, 0x0A ; 10
|
|
4e8: b5 95 asr r27
|
|
4ea: a7 95 ror r26
|
|
4ec: 97 95 ror r25
|
|
4ee: 87 95 ror r24
|
|
4f0: 2a 95 dec r18
|
|
4f2: d1 f7 brne .-12 ; 0x4e8 <__LOCK_REGION_LENGTH__+0xe8>
|
|
4f4: 6c 01 movw r12, r24
|
|
4f6: 7d 01 movw r14, r26
|
|
4f8: 21 e0 ldi r18, 0x01 ; 1
|
|
4fa: c2 1a sub r12, r18
|
|
4fc: d1 08 sbc r13, r1
|
|
4fe: e1 08 sbc r14, r1
|
|
500: f1 08 sbc r15, r1
|
|
prescalarbits = _timer == 0 ? 0b101 : 0b111;
|
|
502: 87 e0 ldi r24, 0x07 ; 7
|
|
504: 57 cf rjmp .-338 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 256 - 1;
|
|
prescalarbits = _timer == 0 ? 0b100 : 0b110;
|
|
506: 86 e0 ldi r24, 0x06 ; 6
|
|
508: 55 cf rjmp .-342 ; 0x3b4 <_Z4tonehjm.constprop.15+0x266>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 128 - 1;
|
|
prescalarbits = 0b101;
|
|
}
|
|
|
|
if (ocr > 255)
|
|
50a: 2f ef ldi r18, 0xFF ; 255
|
|
50c: c2 16 cp r12, r18
|
|
50e: d1 04 cpc r13, r1
|
|
510: e1 04 cpc r14, r1
|
|
512: f1 04 cpc r15, r1
|
|
514: 09 f0 breq .+2 ; 0x518 <__LOCK_REGION_LENGTH__+0x118>
|
|
516: 78 f6 brcc .-98 ; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6>
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
prescalarbits = _timer == 0 ? 0b011 : 0b100;
|
|
518: 84 e0 ldi r24, 0x04 ; 4
|
|
51a: 16 cf rjmp .-468 ; 0x348 <_Z4tonehjm.constprop.15+0x1fa>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 128 - 1;
|
|
prescalarbits = 0b101;
|
|
}
|
|
|
|
if (ocr > 255)
|
|
51c: 8f ef ldi r24, 0xFF ; 255
|
|
51e: c8 16 cp r12, r24
|
|
520: d1 04 cpc r13, r1
|
|
522: e1 04 cpc r14, r1
|
|
524: f1 04 cpc r15, r1
|
|
526: 59 f1 breq .+86 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e>
|
|
528: 50 f1 brcs .+84 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e>
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 256 - 1;
|
|
52a: 62 e1 ldi r22, 0x12 ; 18
|
|
52c: 7a e7 ldi r23, 0x7A ; 122
|
|
52e: 80 e0 ldi r24, 0x00 ; 0
|
|
530: 90 e0 ldi r25, 0x00 ; 0
|
|
532: a5 01 movw r20, r10
|
|
534: 94 01 movw r18, r8
|
|
536: 0e 94 9f 08 call 0x113e ; 0x113e <__divmodsi4>
|
|
53a: 69 01 movw r12, r18
|
|
53c: 7a 01 movw r14, r20
|
|
53e: 81 e0 ldi r24, 0x01 ; 1
|
|
540: c8 1a sub r12, r24
|
|
542: d1 08 sbc r13, r1
|
|
544: e1 08 sbc r14, r1
|
|
546: f1 08 sbc r15, r1
|
|
prescalarbits = _timer == 0 ? 0b100 : 0b110;
|
|
if (ocr > 255)
|
|
548: 2f ef ldi r18, 0xFF ; 255
|
|
54a: c2 16 cp r12, r18
|
|
54c: d1 04 cpc r13, r1
|
|
54e: e1 04 cpc r14, r1
|
|
550: f1 04 cpc r15, r1
|
|
552: 99 f0 breq .+38 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a>
|
|
554: 90 f0 brcs .+36 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a>
|
|
{
|
|
// can't do any better than /1024
|
|
ocr = F_CPU / frequency / 2 / 1024 - 1;
|
|
556: d3 01 movw r26, r6
|
|
558: c2 01 movw r24, r4
|
|
55a: 3a e0 ldi r19, 0x0A ; 10
|
|
55c: b5 95 asr r27
|
|
55e: a7 95 ror r26
|
|
560: 97 95 ror r25
|
|
562: 87 95 ror r24
|
|
564: 3a 95 dec r19
|
|
566: d1 f7 brne .-12 ; 0x55c <__LOCK_REGION_LENGTH__+0x15c>
|
|
568: 6c 01 movw r12, r24
|
|
56a: 7d 01 movw r14, r26
|
|
56c: 21 e0 ldi r18, 0x01 ; 1
|
|
56e: c2 1a sub r12, r18
|
|
570: d1 08 sbc r13, r1
|
|
572: e1 08 sbc r14, r1
|
|
574: f1 08 sbc r15, r1
|
|
prescalarbits = _timer == 0 ? 0b101 : 0b111;
|
|
576: 85 e0 ldi r24, 0x05 ; 5
|
|
578: e9 ce rjmp .-558 ; 0x34c <_Z4tonehjm.constprop.15+0x1fe>
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 256 - 1;
|
|
prescalarbits = _timer == 0 ? 0b100 : 0b110;
|
|
57a: 84 e0 ldi r24, 0x04 ; 4
|
|
57c: e7 ce rjmp .-562 ; 0x34c <_Z4tonehjm.constprop.15+0x1fe>
|
|
}
|
|
|
|
if (ocr > 255)
|
|
{
|
|
ocr = F_CPU / frequency / 2 / 64 - 1;
|
|
prescalarbits = _timer == 0 ? 0b011 : 0b100;
|
|
57e: 83 e0 ldi r24, 0x03 ; 3
|
|
580: e5 ce rjmp .-566 ; 0x34c <_Z4tonehjm.constprop.15+0x1fe>
|
|
_timer = toneBegin(_pin);
|
|
|
|
if (_timer >= 0)
|
|
{
|
|
// Set the pinMode as OUTPUT
|
|
pinMode(_pin, OUTPUT);
|
|
582: 85 e0 ldi r24, 0x05 ; 5
|
|
584: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
588: 75 ce rjmp .-790 ; 0x274 <_Z4tonehjm.constprop.15+0x126>
|
|
break;
|
|
#endif
|
|
|
|
}
|
|
}
|
|
}
|
|
58a: df 91 pop r29
|
|
58c: cf 91 pop r28
|
|
58e: 1f 91 pop r17
|
|
590: ff 90 pop r15
|
|
592: ef 90 pop r14
|
|
594: df 90 pop r13
|
|
596: cf 90 pop r12
|
|
598: bf 90 pop r11
|
|
59a: af 90 pop r10
|
|
59c: 9f 90 pop r9
|
|
59e: 8f 90 pop r8
|
|
5a0: 7f 90 pop r7
|
|
5a2: 6f 90 pop r6
|
|
5a4: 5f 90 pop r5
|
|
5a6: 4f 90 pop r4
|
|
5a8: 08 95 ret
|
|
|
|
000005aa <digitalWrite>:
|
|
}
|
|
}
|
|
|
|
void digitalWrite(uint8_t pin, uint8_t val)
|
|
{
|
|
uint8_t timer = digitalPinToTimer(pin);
|
|
5aa: 90 e0 ldi r25, 0x00 ; 0
|
|
5ac: fc 01 movw r30, r24
|
|
5ae: e8 59 subi r30, 0x98 ; 152
|
|
5b0: ff 4f sbci r31, 0xFF ; 255
|
|
5b2: 24 91 lpm r18, Z
|
|
uint8_t bit = digitalPinToBitMask(pin);
|
|
5b4: fc 01 movw r30, r24
|
|
5b6: eb 55 subi r30, 0x5B ; 91
|
|
5b8: ff 4f sbci r31, 0xFF ; 255
|
|
5ba: 34 91 lpm r19, Z
|
|
uint8_t port = digitalPinToPort(pin);
|
|
5bc: fc 01 movw r30, r24
|
|
5be: ef 56 subi r30, 0x6F ; 111
|
|
5c0: ff 4f sbci r31, 0xFF ; 255
|
|
5c2: e4 91 lpm r30, Z
|
|
volatile uint8_t *out;
|
|
|
|
if (port == NOT_A_PIN) return;
|
|
5c4: ee 23 and r30, r30
|
|
5c6: 09 f4 brne .+2 ; 0x5ca <digitalWrite+0x20>
|
|
5c8: 3c c0 rjmp .+120 ; 0x642 <digitalWrite+0x98>
|
|
|
|
// If the pin that support PWM output, we need to turn it off
|
|
// before doing a digital write.
|
|
if (timer != NOT_ON_TIMER) turnOffPWM(timer);
|
|
5ca: 22 23 and r18, r18
|
|
5cc: 39 f1 breq .+78 ; 0x61c <digitalWrite+0x72>
|
|
//
|
|
//static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline));
|
|
//static inline void turnOffPWM(uint8_t timer)
|
|
static void turnOffPWM(uint8_t timer)
|
|
{
|
|
switch (timer)
|
|
5ce: 23 30 cpi r18, 0x03 ; 3
|
|
5d0: 91 f0 breq .+36 ; 0x5f6 <digitalWrite+0x4c>
|
|
5d2: 38 f4 brcc .+14 ; 0x5e2 <digitalWrite+0x38>
|
|
5d4: 21 30 cpi r18, 0x01 ; 1
|
|
5d6: a9 f0 breq .+42 ; 0x602 <digitalWrite+0x58>
|
|
5d8: 22 30 cpi r18, 0x02 ; 2
|
|
5da: 01 f5 brne .+64 ; 0x61c <digitalWrite+0x72>
|
|
#if defined(TCCR0A) && defined(COM0A1)
|
|
case TIMER0A: cbi(TCCR0A, COM0A1); break;
|
|
#endif
|
|
|
|
#if defined(TCCR0A) && defined(COM0B1)
|
|
case TIMER0B: cbi(TCCR0A, COM0B1); break;
|
|
5dc: 84 b5 in r24, 0x24 ; 36
|
|
5de: 8f 7d andi r24, 0xDF ; 223
|
|
5e0: 12 c0 rjmp .+36 ; 0x606 <digitalWrite+0x5c>
|
|
//
|
|
//static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline));
|
|
//static inline void turnOffPWM(uint8_t timer)
|
|
static void turnOffPWM(uint8_t timer)
|
|
{
|
|
switch (timer)
|
|
5e2: 27 30 cpi r18, 0x07 ; 7
|
|
5e4: 91 f0 breq .+36 ; 0x60a <digitalWrite+0x60>
|
|
5e6: 28 30 cpi r18, 0x08 ; 8
|
|
5e8: a1 f0 breq .+40 ; 0x612 <digitalWrite+0x68>
|
|
5ea: 24 30 cpi r18, 0x04 ; 4
|
|
5ec: b9 f4 brne .+46 ; 0x61c <digitalWrite+0x72>
|
|
{
|
|
#if defined(TCCR1A) && defined(COM1A1)
|
|
case TIMER1A: cbi(TCCR1A, COM1A1); break;
|
|
#endif
|
|
#if defined(TCCR1A) && defined(COM1B1)
|
|
case TIMER1B: cbi(TCCR1A, COM1B1); break;
|
|
5ee: 80 91 80 00 lds r24, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
|
|
5f2: 8f 7d andi r24, 0xDF ; 223
|
|
5f4: 03 c0 rjmp .+6 ; 0x5fc <digitalWrite+0x52>
|
|
static void turnOffPWM(uint8_t timer)
|
|
{
|
|
switch (timer)
|
|
{
|
|
#if defined(TCCR1A) && defined(COM1A1)
|
|
case TIMER1A: cbi(TCCR1A, COM1A1); break;
|
|
5f6: 80 91 80 00 lds r24, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
|
|
5fa: 8f 77 andi r24, 0x7F ; 127
|
|
#endif
|
|
#if defined(TCCR1A) && defined(COM1B1)
|
|
case TIMER1B: cbi(TCCR1A, COM1B1); break;
|
|
5fc: 80 93 80 00 sts 0x0080, r24 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
|
|
600: 0d c0 rjmp .+26 ; 0x61c <digitalWrite+0x72>
|
|
#if defined(TCCR2) && defined(COM21)
|
|
case TIMER2: cbi(TCCR2, COM21); break;
|
|
#endif
|
|
|
|
#if defined(TCCR0A) && defined(COM0A1)
|
|
case TIMER0A: cbi(TCCR0A, COM0A1); break;
|
|
602: 84 b5 in r24, 0x24 ; 36
|
|
604: 8f 77 andi r24, 0x7F ; 127
|
|
#endif
|
|
|
|
#if defined(TCCR0A) && defined(COM0B1)
|
|
case TIMER0B: cbi(TCCR0A, COM0B1); break;
|
|
606: 84 bd out 0x24, r24 ; 36
|
|
608: 09 c0 rjmp .+18 ; 0x61c <digitalWrite+0x72>
|
|
#endif
|
|
#if defined(TCCR2A) && defined(COM2A1)
|
|
case TIMER2A: cbi(TCCR2A, COM2A1); break;
|
|
60a: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
|
|
60e: 8f 77 andi r24, 0x7F ; 127
|
|
610: 03 c0 rjmp .+6 ; 0x618 <digitalWrite+0x6e>
|
|
#endif
|
|
#if defined(TCCR2A) && defined(COM2B1)
|
|
case TIMER2B: cbi(TCCR2A, COM2B1); break;
|
|
612: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
|
|
616: 8f 7d andi r24, 0xDF ; 223
|
|
618: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
|
|
|
|
// If the pin that support PWM output, we need to turn it off
|
|
// before doing a digital write.
|
|
if (timer != NOT_ON_TIMER) turnOffPWM(timer);
|
|
|
|
out = portOutputRegister(port);
|
|
61c: f0 e0 ldi r31, 0x00 ; 0
|
|
61e: ee 0f add r30, r30
|
|
620: ff 1f adc r31, r31
|
|
622: e3 58 subi r30, 0x83 ; 131
|
|
624: ff 4f sbci r31, 0xFF ; 255
|
|
626: a5 91 lpm r26, Z+
|
|
628: b4 91 lpm r27, Z
|
|
|
|
uint8_t oldSREG = SREG;
|
|
62a: 9f b7 in r25, 0x3f ; 63
|
|
cli();
|
|
62c: f8 94 cli
|
|
|
|
if (val == LOW) {
|
|
62e: 61 11 cpse r22, r1
|
|
630: 04 c0 rjmp .+8 ; 0x63a <digitalWrite+0x90>
|
|
*out &= ~bit;
|
|
632: 8c 91 ld r24, X
|
|
634: 30 95 com r19
|
|
636: 38 23 and r19, r24
|
|
638: 02 c0 rjmp .+4 ; 0x63e <digitalWrite+0x94>
|
|
} else {
|
|
*out |= bit;
|
|
63a: ec 91 ld r30, X
|
|
63c: 3e 2b or r19, r30
|
|
63e: 3c 93 st X, r19
|
|
}
|
|
|
|
SREG = oldSREG;
|
|
640: 9f bf out 0x3f, r25 ; 63
|
|
642: 08 95 ret
|
|
|
|
00000644 <micros>:
|
|
return m;
|
|
}
|
|
|
|
unsigned long micros() {
|
|
unsigned long m;
|
|
uint8_t oldSREG = SREG, t;
|
|
644: 3f b7 in r19, 0x3f ; 63
|
|
|
|
cli();
|
|
646: f8 94 cli
|
|
m = timer0_overflow_count;
|
|
648: 80 91 39 01 lds r24, 0x0139 ; 0x800139 <timer0_overflow_count>
|
|
64c: 90 91 3a 01 lds r25, 0x013A ; 0x80013a <timer0_overflow_count+0x1>
|
|
650: a0 91 3b 01 lds r26, 0x013B ; 0x80013b <timer0_overflow_count+0x2>
|
|
654: b0 91 3c 01 lds r27, 0x013C ; 0x80013c <timer0_overflow_count+0x3>
|
|
#if defined(TCNT0)
|
|
t = TCNT0;
|
|
658: 26 b5 in r18, 0x26 ; 38
|
|
#else
|
|
#error TIMER 0 not defined
|
|
#endif
|
|
|
|
#ifdef TIFR0
|
|
if ((TIFR0 & _BV(TOV0)) && (t < 255))
|
|
65a: a8 9b sbis 0x15, 0 ; 21
|
|
65c: 05 c0 rjmp .+10 ; 0x668 <micros+0x24>
|
|
65e: 2f 3f cpi r18, 0xFF ; 255
|
|
660: 19 f0 breq .+6 ; 0x668 <micros+0x24>
|
|
m++;
|
|
662: 01 96 adiw r24, 0x01 ; 1
|
|
664: a1 1d adc r26, r1
|
|
666: b1 1d adc r27, r1
|
|
#else
|
|
if ((TIFR & _BV(TOV0)) && (t < 255))
|
|
m++;
|
|
#endif
|
|
|
|
SREG = oldSREG;
|
|
668: 3f bf out 0x3f, r19 ; 63
|
|
|
|
return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
|
|
66a: ba 2f mov r27, r26
|
|
66c: a9 2f mov r26, r25
|
|
66e: 98 2f mov r25, r24
|
|
670: 88 27 eor r24, r24
|
|
672: 82 0f add r24, r18
|
|
674: 91 1d adc r25, r1
|
|
676: a1 1d adc r26, r1
|
|
678: b1 1d adc r27, r1
|
|
67a: bc 01 movw r22, r24
|
|
67c: cd 01 movw r24, r26
|
|
67e: 42 e0 ldi r20, 0x02 ; 2
|
|
680: 66 0f add r22, r22
|
|
682: 77 1f adc r23, r23
|
|
684: 88 1f adc r24, r24
|
|
686: 99 1f adc r25, r25
|
|
688: 4a 95 dec r20
|
|
68a: d1 f7 brne .-12 ; 0x680 <micros+0x3c>
|
|
}
|
|
68c: 08 95 ret
|
|
|
|
0000068e <delay>:
|
|
|
|
void delay(unsigned long ms)
|
|
{
|
|
68e: 8f 92 push r8
|
|
690: 9f 92 push r9
|
|
692: af 92 push r10
|
|
694: bf 92 push r11
|
|
696: cf 92 push r12
|
|
698: df 92 push r13
|
|
69a: ef 92 push r14
|
|
69c: ff 92 push r15
|
|
69e: 6b 01 movw r12, r22
|
|
6a0: 7c 01 movw r14, r24
|
|
uint32_t start = micros();
|
|
6a2: 0e 94 22 03 call 0x644 ; 0x644 <micros>
|
|
6a6: 4b 01 movw r8, r22
|
|
6a8: 5c 01 movw r10, r24
|
|
|
|
while (ms > 0) {
|
|
6aa: c1 14 cp r12, r1
|
|
6ac: d1 04 cpc r13, r1
|
|
6ae: e1 04 cpc r14, r1
|
|
6b0: f1 04 cpc r15, r1
|
|
6b2: f1 f0 breq .+60 ; 0x6f0 <delay+0x62>
|
|
yield();
|
|
while ( ms > 0 && (micros() - start) >= 1000) {
|
|
6b4: 0e 94 22 03 call 0x644 ; 0x644 <micros>
|
|
6b8: dc 01 movw r26, r24
|
|
6ba: cb 01 movw r24, r22
|
|
6bc: 88 19 sub r24, r8
|
|
6be: 99 09 sbc r25, r9
|
|
6c0: aa 09 sbc r26, r10
|
|
6c2: bb 09 sbc r27, r11
|
|
6c4: 88 3e cpi r24, 0xE8 ; 232
|
|
6c6: 93 40 sbci r25, 0x03 ; 3
|
|
6c8: a1 05 cpc r26, r1
|
|
6ca: b1 05 cpc r27, r1
|
|
6cc: 70 f3 brcs .-36 ; 0x6aa <delay+0x1c>
|
|
ms--;
|
|
6ce: 21 e0 ldi r18, 0x01 ; 1
|
|
6d0: c2 1a sub r12, r18
|
|
6d2: d1 08 sbc r13, r1
|
|
6d4: e1 08 sbc r14, r1
|
|
6d6: f1 08 sbc r15, r1
|
|
start += 1000;
|
|
6d8: 88 ee ldi r24, 0xE8 ; 232
|
|
6da: 88 0e add r8, r24
|
|
6dc: 83 e0 ldi r24, 0x03 ; 3
|
|
6de: 98 1e adc r9, r24
|
|
6e0: a1 1c adc r10, r1
|
|
6e2: b1 1c adc r11, r1
|
|
{
|
|
uint32_t start = micros();
|
|
|
|
while (ms > 0) {
|
|
yield();
|
|
while ( ms > 0 && (micros() - start) >= 1000) {
|
|
6e4: c1 14 cp r12, r1
|
|
6e6: d1 04 cpc r13, r1
|
|
6e8: e1 04 cpc r14, r1
|
|
6ea: f1 04 cpc r15, r1
|
|
6ec: 19 f7 brne .-58 ; 0x6b4 <delay+0x26>
|
|
6ee: dd cf rjmp .-70 ; 0x6aa <delay+0x1c>
|
|
ms--;
|
|
start += 1000;
|
|
}
|
|
}
|
|
}
|
|
6f0: ff 90 pop r15
|
|
6f2: ef 90 pop r14
|
|
6f4: df 90 pop r13
|
|
6f6: cf 90 pop r12
|
|
6f8: bf 90 pop r11
|
|
6fa: af 90 pop r10
|
|
6fc: 9f 90 pop r9
|
|
6fe: 8f 90 pop r8
|
|
700: 08 95 ret
|
|
|
|
00000702 <_ZN5Print5writeEPKhj>:
|
|
|
|
// Public Methods //////////////////////////////////////////////////////////////
|
|
|
|
/* default implementation: may be overridden */
|
|
size_t Print::write(const uint8_t *buffer, size_t size)
|
|
{
|
|
702: cf 92 push r12
|
|
704: df 92 push r13
|
|
706: ef 92 push r14
|
|
708: ff 92 push r15
|
|
70a: 0f 93 push r16
|
|
70c: 1f 93 push r17
|
|
70e: cf 93 push r28
|
|
710: df 93 push r29
|
|
712: 6c 01 movw r12, r24
|
|
714: 7a 01 movw r14, r20
|
|
716: 8b 01 movw r16, r22
|
|
size_t n = 0;
|
|
718: c0 e0 ldi r28, 0x00 ; 0
|
|
71a: d0 e0 ldi r29, 0x00 ; 0
|
|
while (size--) {
|
|
71c: ce 15 cp r28, r14
|
|
71e: df 05 cpc r29, r15
|
|
720: 81 f0 breq .+32 ; 0x742 <_ZN5Print5writeEPKhj+0x40>
|
|
if (write(*buffer++)) n++;
|
|
722: d8 01 movw r26, r16
|
|
724: 6d 91 ld r22, X+
|
|
726: 8d 01 movw r16, r26
|
|
728: d6 01 movw r26, r12
|
|
72a: ed 91 ld r30, X+
|
|
72c: fc 91 ld r31, X
|
|
72e: 01 90 ld r0, Z+
|
|
730: f0 81 ld r31, Z
|
|
732: e0 2d mov r30, r0
|
|
734: c6 01 movw r24, r12
|
|
736: 09 95 icall
|
|
738: 89 2b or r24, r25
|
|
73a: 11 f0 breq .+4 ; 0x740 <_ZN5Print5writeEPKhj+0x3e>
|
|
73c: 21 96 adiw r28, 0x01 ; 1
|
|
73e: ee cf rjmp .-36 ; 0x71c <_ZN5Print5writeEPKhj+0x1a>
|
|
740: 7e 01 movw r14, r28
|
|
else break;
|
|
}
|
|
return n;
|
|
}
|
|
742: c7 01 movw r24, r14
|
|
744: df 91 pop r29
|
|
746: cf 91 pop r28
|
|
748: 1f 91 pop r17
|
|
74a: 0f 91 pop r16
|
|
74c: ff 90 pop r15
|
|
74e: ef 90 pop r14
|
|
750: df 90 pop r13
|
|
752: cf 90 pop r12
|
|
754: 08 95 ret
|
|
|
|
00000756 <_ZN5Print5flushEv>:
|
|
size_t println(unsigned long, int = DEC);
|
|
size_t println(double, int = 2);
|
|
size_t println(const Printable&);
|
|
size_t println(void);
|
|
|
|
virtual void flush() { /* Empty implementation for backward compatibility */ }
|
|
756: 08 95 ret
|
|
|
|
00000758 <_ZN5Print17availableForWriteEv>:
|
|
return write((const uint8_t *)buffer, size);
|
|
}
|
|
|
|
// default to zero, meaning "a single write may block"
|
|
// should be overriden by subclasses with buffering
|
|
virtual int availableForWrite() { return 0; }
|
|
758: 80 e0 ldi r24, 0x00 ; 0
|
|
75a: 90 e0 ldi r25, 0x00 ; 0
|
|
75c: 08 95 ret
|
|
|
|
0000075e <_ZN14HardwareSerial17availableForWriteEv>:
|
|
{
|
|
tx_buffer_index_t head;
|
|
tx_buffer_index_t tail;
|
|
|
|
TX_BUFFER_ATOMIC {
|
|
head = _tx_buffer_head;
|
|
75e: fc 01 movw r30, r24
|
|
760: 53 8d ldd r21, Z+27 ; 0x1b
|
|
tail = _tx_buffer_tail;
|
|
762: 44 8d ldd r20, Z+28 ; 0x1c
|
|
764: 25 2f mov r18, r21
|
|
766: 30 e0 ldi r19, 0x00 ; 0
|
|
768: 84 2f mov r24, r20
|
|
76a: 90 e0 ldi r25, 0x00 ; 0
|
|
}
|
|
if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
|
|
76c: 82 1b sub r24, r18
|
|
76e: 93 0b sbc r25, r19
|
|
770: 54 17 cp r21, r20
|
|
772: 10 f0 brcs .+4 ; 0x778 <_ZN14HardwareSerial17availableForWriteEv+0x1a>
|
|
774: cf 96 adiw r24, 0x3f ; 63
|
|
776: 08 95 ret
|
|
return tail - head - 1;
|
|
778: 01 97 sbiw r24, 0x01 ; 1
|
|
}
|
|
77a: 08 95 ret
|
|
|
|
0000077c <_ZN14HardwareSerial4readEv>:
|
|
return _rx_buffer[_rx_buffer_tail];
|
|
}
|
|
}
|
|
|
|
int HardwareSerial::read(void)
|
|
{
|
|
77c: fc 01 movw r30, r24
|
|
// if the head isn't ahead of the tail, we don't have any characters
|
|
if (_rx_buffer_head == _rx_buffer_tail) {
|
|
77e: 91 8d ldd r25, Z+25 ; 0x19
|
|
780: 82 8d ldd r24, Z+26 ; 0x1a
|
|
782: 98 17 cp r25, r24
|
|
784: 61 f0 breq .+24 ; 0x79e <_ZN14HardwareSerial4readEv+0x22>
|
|
return -1;
|
|
} else {
|
|
unsigned char c = _rx_buffer[_rx_buffer_tail];
|
|
786: 82 8d ldd r24, Z+26 ; 0x1a
|
|
788: df 01 movw r26, r30
|
|
78a: a8 0f add r26, r24
|
|
78c: b1 1d adc r27, r1
|
|
78e: 5d 96 adiw r26, 0x1d ; 29
|
|
790: 8c 91 ld r24, X
|
|
_rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
|
|
792: 92 8d ldd r25, Z+26 ; 0x1a
|
|
794: 9f 5f subi r25, 0xFF ; 255
|
|
796: 9f 73 andi r25, 0x3F ; 63
|
|
798: 92 8f std Z+26, r25 ; 0x1a
|
|
return c;
|
|
79a: 90 e0 ldi r25, 0x00 ; 0
|
|
79c: 08 95 ret
|
|
|
|
int HardwareSerial::read(void)
|
|
{
|
|
// if the head isn't ahead of the tail, we don't have any characters
|
|
if (_rx_buffer_head == _rx_buffer_tail) {
|
|
return -1;
|
|
79e: 8f ef ldi r24, 0xFF ; 255
|
|
7a0: 9f ef ldi r25, 0xFF ; 255
|
|
} else {
|
|
unsigned char c = _rx_buffer[_rx_buffer_tail];
|
|
_rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
|
|
return c;
|
|
}
|
|
}
|
|
7a2: 08 95 ret
|
|
|
|
000007a4 <_ZN14HardwareSerial4peekEv>:
|
|
{
|
|
return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
|
|
}
|
|
|
|
int HardwareSerial::peek(void)
|
|
{
|
|
7a4: fc 01 movw r30, r24
|
|
if (_rx_buffer_head == _rx_buffer_tail) {
|
|
7a6: 91 8d ldd r25, Z+25 ; 0x19
|
|
7a8: 82 8d ldd r24, Z+26 ; 0x1a
|
|
7aa: 98 17 cp r25, r24
|
|
7ac: 31 f0 breq .+12 ; 0x7ba <_ZN14HardwareSerial4peekEv+0x16>
|
|
return -1;
|
|
} else {
|
|
return _rx_buffer[_rx_buffer_tail];
|
|
7ae: 82 8d ldd r24, Z+26 ; 0x1a
|
|
7b0: e8 0f add r30, r24
|
|
7b2: f1 1d adc r31, r1
|
|
7b4: 85 8d ldd r24, Z+29 ; 0x1d
|
|
7b6: 90 e0 ldi r25, 0x00 ; 0
|
|
7b8: 08 95 ret
|
|
}
|
|
|
|
int HardwareSerial::peek(void)
|
|
{
|
|
if (_rx_buffer_head == _rx_buffer_tail) {
|
|
return -1;
|
|
7ba: 8f ef ldi r24, 0xFF ; 255
|
|
7bc: 9f ef ldi r25, 0xFF ; 255
|
|
} else {
|
|
return _rx_buffer[_rx_buffer_tail];
|
|
}
|
|
}
|
|
7be: 08 95 ret
|
|
|
|
000007c0 <_ZN14HardwareSerial9availableEv>:
|
|
// clear any received data
|
|
_rx_buffer_head = _rx_buffer_tail;
|
|
}
|
|
|
|
int HardwareSerial::available(void)
|
|
{
|
|
7c0: fc 01 movw r30, r24
|
|
return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
|
|
7c2: 91 8d ldd r25, Z+25 ; 0x19
|
|
7c4: 22 8d ldd r18, Z+26 ; 0x1a
|
|
7c6: 89 2f mov r24, r25
|
|
7c8: 90 e0 ldi r25, 0x00 ; 0
|
|
7ca: 80 5c subi r24, 0xC0 ; 192
|
|
7cc: 9f 4f sbci r25, 0xFF ; 255
|
|
7ce: 82 1b sub r24, r18
|
|
7d0: 91 09 sbc r25, r1
|
|
}
|
|
7d2: 8f 73 andi r24, 0x3F ; 63
|
|
7d4: 99 27 eor r25, r25
|
|
7d6: 08 95 ret
|
|
|
|
000007d8 <_Z17Serial0_availablev>:
|
|
#endif
|
|
|
|
// Function that can be weakly referenced by serialEventRun to prevent
|
|
// pulling in this file if it's not otherwise used.
|
|
bool Serial0_available() {
|
|
return Serial.available();
|
|
7d8: 8d e3 ldi r24, 0x3D ; 61
|
|
7da: 91 e0 ldi r25, 0x01 ; 1
|
|
7dc: 0e 94 e0 03 call 0x7c0 ; 0x7c0 <_ZN14HardwareSerial9availableEv>
|
|
7e0: 21 e0 ldi r18, 0x01 ; 1
|
|
7e2: 89 2b or r24, r25
|
|
7e4: 09 f4 brne .+2 ; 0x7e8 <_Z17Serial0_availablev+0x10>
|
|
7e6: 20 e0 ldi r18, 0x00 ; 0
|
|
}
|
|
7e8: 82 2f mov r24, r18
|
|
7ea: 08 95 ret
|
|
|
|
000007ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>:
|
|
#endif
|
|
|
|
// Actual interrupt handlers //////////////////////////////////////////////////////////////
|
|
|
|
void HardwareSerial::_tx_udr_empty_irq(void)
|
|
{
|
|
7ec: fc 01 movw r30, r24
|
|
// If interrupts are enabled, there must be more data in the output
|
|
// buffer. Send the next byte
|
|
unsigned char c = _tx_buffer[_tx_buffer_tail];
|
|
7ee: 84 8d ldd r24, Z+28 ; 0x1c
|
|
7f0: df 01 movw r26, r30
|
|
7f2: a8 0f add r26, r24
|
|
7f4: b1 1d adc r27, r1
|
|
7f6: a3 5a subi r26, 0xA3 ; 163
|
|
7f8: bf 4f sbci r27, 0xFF ; 255
|
|
7fa: 2c 91 ld r18, X
|
|
_tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
|
|
7fc: 84 8d ldd r24, Z+28 ; 0x1c
|
|
7fe: 90 e0 ldi r25, 0x00 ; 0
|
|
800: 01 96 adiw r24, 0x01 ; 1
|
|
802: 8f 73 andi r24, 0x3F ; 63
|
|
804: 99 27 eor r25, r25
|
|
806: 84 8f std Z+28, r24 ; 0x1c
|
|
|
|
*_udr = c;
|
|
808: a6 89 ldd r26, Z+22 ; 0x16
|
|
80a: b7 89 ldd r27, Z+23 ; 0x17
|
|
80c: 2c 93 st X, r18
|
|
// location". This makes sure flush() won't return until the bytes
|
|
// actually got written. Other r/w bits are preserved, and zeroes
|
|
// written to the rest.
|
|
|
|
#ifdef MPCM0
|
|
*_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
|
|
80e: a0 89 ldd r26, Z+16 ; 0x10
|
|
810: b1 89 ldd r27, Z+17 ; 0x11
|
|
812: 8c 91 ld r24, X
|
|
814: 83 70 andi r24, 0x03 ; 3
|
|
816: 80 64 ori r24, 0x40 ; 64
|
|
818: 8c 93 st X, r24
|
|
#else
|
|
*_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
|
|
#endif
|
|
|
|
if (_tx_buffer_head == _tx_buffer_tail) {
|
|
81a: 93 8d ldd r25, Z+27 ; 0x1b
|
|
81c: 84 8d ldd r24, Z+28 ; 0x1c
|
|
81e: 98 13 cpse r25, r24
|
|
820: 06 c0 rjmp .+12 ; 0x82e <_ZN14HardwareSerial17_tx_udr_empty_irqEv+0x42>
|
|
// Buffer empty, so disable interrupts
|
|
cbi(*_ucsrb, UDRIE0);
|
|
822: 02 88 ldd r0, Z+18 ; 0x12
|
|
824: f3 89 ldd r31, Z+19 ; 0x13
|
|
826: e0 2d mov r30, r0
|
|
828: 80 81 ld r24, Z
|
|
82a: 8f 7d andi r24, 0xDF ; 223
|
|
82c: 80 83 st Z, r24
|
|
82e: 08 95 ret
|
|
|
|
00000830 <_ZN14HardwareSerial5writeEh>:
|
|
// If we get here, nothing is queued anymore (DRIE is disabled) and
|
|
// the hardware finished tranmission (TXC is set).
|
|
}
|
|
|
|
size_t HardwareSerial::write(uint8_t c)
|
|
{
|
|
830: ef 92 push r14
|
|
832: ff 92 push r15
|
|
834: 0f 93 push r16
|
|
836: 1f 93 push r17
|
|
838: cf 93 push r28
|
|
83a: df 93 push r29
|
|
83c: ec 01 movw r28, r24
|
|
_written = true;
|
|
83e: 81 e0 ldi r24, 0x01 ; 1
|
|
840: 88 8f std Y+24, r24 ; 0x18
|
|
// If the buffer and the data register is empty, just write the byte
|
|
// to the data register and be done. This shortcut helps
|
|
// significantly improve the effective datarate at high (>
|
|
// 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
|
|
if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
|
|
842: 9b 8d ldd r25, Y+27 ; 0x1b
|
|
844: 8c 8d ldd r24, Y+28 ; 0x1c
|
|
846: 98 13 cpse r25, r24
|
|
848: 05 c0 rjmp .+10 ; 0x854 <_ZN14HardwareSerial5writeEh+0x24>
|
|
84a: e8 89 ldd r30, Y+16 ; 0x10
|
|
84c: f9 89 ldd r31, Y+17 ; 0x11
|
|
84e: 80 81 ld r24, Z
|
|
850: 85 fd sbrc r24, 5
|
|
852: 26 c0 rjmp .+76 ; 0x8a0 <_ZN14HardwareSerial5writeEh+0x70>
|
|
854: f6 2e mov r15, r22
|
|
*_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
|
|
#endif
|
|
}
|
|
return 1;
|
|
}
|
|
tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
|
|
856: 0b 8d ldd r16, Y+27 ; 0x1b
|
|
858: 10 e0 ldi r17, 0x00 ; 0
|
|
85a: 0f 5f subi r16, 0xFF ; 255
|
|
85c: 1f 4f sbci r17, 0xFF ; 255
|
|
85e: 0f 73 andi r16, 0x3F ; 63
|
|
860: 11 27 eor r17, r17
|
|
862: e0 2e mov r14, r16
|
|
|
|
// If the output buffer is full, there's nothing for it other than to
|
|
// wait for the interrupt handler to empty it a bit
|
|
while (i == _tx_buffer_tail) {
|
|
864: 8c 8d ldd r24, Y+28 ; 0x1c
|
|
866: e8 12 cpse r14, r24
|
|
868: 0c c0 rjmp .+24 ; 0x882 <_ZN14HardwareSerial5writeEh+0x52>
|
|
if (bit_is_clear(SREG, SREG_I)) {
|
|
86a: 0f b6 in r0, 0x3f ; 63
|
|
86c: 07 fc sbrc r0, 7
|
|
86e: fa cf rjmp .-12 ; 0x864 <_ZN14HardwareSerial5writeEh+0x34>
|
|
// Interrupts are disabled, so we'll have to poll the data
|
|
// register empty flag ourselves. If it is set, pretend an
|
|
// interrupt has happened and call the handler to free up
|
|
// space for us.
|
|
if(bit_is_set(*_ucsra, UDRE0))
|
|
870: e8 89 ldd r30, Y+16 ; 0x10
|
|
872: f9 89 ldd r31, Y+17 ; 0x11
|
|
874: 80 81 ld r24, Z
|
|
876: 85 ff sbrs r24, 5
|
|
878: f5 cf rjmp .-22 ; 0x864 <_ZN14HardwareSerial5writeEh+0x34>
|
|
_tx_udr_empty_irq();
|
|
87a: ce 01 movw r24, r28
|
|
87c: 0e 94 f6 03 call 0x7ec ; 0x7ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>
|
|
880: f1 cf rjmp .-30 ; 0x864 <_ZN14HardwareSerial5writeEh+0x34>
|
|
} else {
|
|
// nop, the interrupt handler will free up space for us
|
|
}
|
|
}
|
|
|
|
_tx_buffer[_tx_buffer_head] = c;
|
|
882: 8b 8d ldd r24, Y+27 ; 0x1b
|
|
884: fe 01 movw r30, r28
|
|
886: e8 0f add r30, r24
|
|
888: f1 1d adc r31, r1
|
|
88a: e3 5a subi r30, 0xA3 ; 163
|
|
88c: ff 4f sbci r31, 0xFF ; 255
|
|
88e: f0 82 st Z, r15
|
|
|
|
// make atomic to prevent execution of ISR between setting the
|
|
// head pointer and setting the interrupt flag resulting in buffer
|
|
// retransmission
|
|
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
|
890: 9f b7 in r25, 0x3f ; 63
|
|
return 1;
|
|
}
|
|
|
|
static __inline__ uint8_t __iCliRetVal(void)
|
|
{
|
|
cli();
|
|
892: f8 94 cli
|
|
_tx_buffer_head = i;
|
|
894: 0b 8f std Y+27, r16 ; 0x1b
|
|
sbi(*_ucsrb, UDRIE0);
|
|
896: ea 89 ldd r30, Y+18 ; 0x12
|
|
898: fb 89 ldd r31, Y+19 ; 0x13
|
|
89a: 80 81 ld r24, Z
|
|
89c: 80 62 ori r24, 0x20 ; 32
|
|
89e: 0a c0 rjmp .+20 ; 0x8b4 <_ZN14HardwareSerial5writeEh+0x84>
|
|
// So writing UDR must happen first.
|
|
// Writing UDR and clearing TC must be done atomically, otherwise
|
|
// interrupts might delay the TXC clear so the byte written to UDR
|
|
// is transmitted (setting TXC) before clearing TXC. Then TXC will
|
|
// be cleared when no bytes are left, causing flush() to hang
|
|
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
|
8a0: 9f b7 in r25, 0x3f ; 63
|
|
8a2: f8 94 cli
|
|
*_udr = c;
|
|
8a4: ee 89 ldd r30, Y+22 ; 0x16
|
|
8a6: ff 89 ldd r31, Y+23 ; 0x17
|
|
8a8: 60 83 st Z, r22
|
|
#ifdef MPCM0
|
|
*_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
|
|
8aa: e8 89 ldd r30, Y+16 ; 0x10
|
|
8ac: f9 89 ldd r31, Y+17 ; 0x11
|
|
8ae: 80 81 ld r24, Z
|
|
8b0: 83 70 andi r24, 0x03 ; 3
|
|
8b2: 80 64 ori r24, 0x40 ; 64
|
|
8b4: 80 83 st Z, r24
|
|
(void)__s;
|
|
}
|
|
|
|
static __inline__ void __iRestore(const uint8_t *__s)
|
|
{
|
|
SREG = *__s;
|
|
8b6: 9f bf out 0x3f, r25 ; 63
|
|
_tx_buffer_head = i;
|
|
sbi(*_ucsrb, UDRIE0);
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
8b8: 81 e0 ldi r24, 0x01 ; 1
|
|
8ba: 90 e0 ldi r25, 0x00 ; 0
|
|
8bc: df 91 pop r29
|
|
8be: cf 91 pop r28
|
|
8c0: 1f 91 pop r17
|
|
8c2: 0f 91 pop r16
|
|
8c4: ff 90 pop r15
|
|
8c6: ef 90 pop r14
|
|
8c8: 08 95 ret
|
|
|
|
000008ca <_ZN14HardwareSerial5flushEv>:
|
|
if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
|
|
return tail - head - 1;
|
|
}
|
|
|
|
void HardwareSerial::flush()
|
|
{
|
|
8ca: cf 93 push r28
|
|
8cc: df 93 push r29
|
|
8ce: ec 01 movw r28, r24
|
|
// If we have never written a byte, no need to flush. This special
|
|
// case is needed since there is no way to force the TXC (transmit
|
|
// complete) bit to 1 during initialization
|
|
if (!_written)
|
|
8d0: 88 8d ldd r24, Y+24 ; 0x18
|
|
8d2: 88 23 and r24, r24
|
|
8d4: c9 f0 breq .+50 ; 0x908 <__stack+0x9>
|
|
return;
|
|
|
|
while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
|
|
8d6: ea 89 ldd r30, Y+18 ; 0x12
|
|
8d8: fb 89 ldd r31, Y+19 ; 0x13
|
|
8da: 80 81 ld r24, Z
|
|
8dc: 85 fd sbrc r24, 5
|
|
8de: 05 c0 rjmp .+10 ; 0x8ea <_ZN14HardwareSerial5flushEv+0x20>
|
|
8e0: a8 89 ldd r26, Y+16 ; 0x10
|
|
8e2: b9 89 ldd r27, Y+17 ; 0x11
|
|
8e4: 8c 91 ld r24, X
|
|
8e6: 86 fd sbrc r24, 6
|
|
8e8: 0f c0 rjmp .+30 ; 0x908 <__stack+0x9>
|
|
if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
|
|
8ea: 0f b6 in r0, 0x3f ; 63
|
|
8ec: 07 fc sbrc r0, 7
|
|
8ee: f5 cf rjmp .-22 ; 0x8da <_ZN14HardwareSerial5flushEv+0x10>
|
|
8f0: 80 81 ld r24, Z
|
|
8f2: 85 ff sbrs r24, 5
|
|
8f4: f2 cf rjmp .-28 ; 0x8da <_ZN14HardwareSerial5flushEv+0x10>
|
|
// Interrupts are globally disabled, but the DR empty
|
|
// interrupt should be enabled, so poll the DR empty flag to
|
|
// prevent deadlock
|
|
if (bit_is_set(*_ucsra, UDRE0))
|
|
8f6: a8 89 ldd r26, Y+16 ; 0x10
|
|
8f8: b9 89 ldd r27, Y+17 ; 0x11
|
|
8fa: 8c 91 ld r24, X
|
|
8fc: 85 ff sbrs r24, 5
|
|
8fe: ed cf rjmp .-38 ; 0x8da <_ZN14HardwareSerial5flushEv+0x10>
|
|
_tx_udr_empty_irq();
|
|
900: ce 01 movw r24, r28
|
|
902: 0e 94 f6 03 call 0x7ec ; 0x7ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>
|
|
906: e7 cf rjmp .-50 ; 0x8d6 <_ZN14HardwareSerial5flushEv+0xc>
|
|
}
|
|
// If we get here, nothing is queued anymore (DRIE is disabled) and
|
|
// the hardware finished tranmission (TXC is set).
|
|
}
|
|
908: df 91 pop r29
|
|
90a: cf 91 pop r28
|
|
90c: 08 95 ret
|
|
|
|
0000090e <_Z14serialEventRunv>:
|
|
#endif
|
|
|
|
void serialEventRun(void)
|
|
{
|
|
#if defined(HAVE_HWSERIAL0)
|
|
if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
|
|
90e: 80 e0 ldi r24, 0x00 ; 0
|
|
910: 90 e0 ldi r25, 0x00 ; 0
|
|
912: 89 2b or r24, r25
|
|
914: 29 f0 breq .+10 ; 0x920 <_Z14serialEventRunv+0x12>
|
|
916: 0e 94 ec 03 call 0x7d8 ; 0x7d8 <_Z17Serial0_availablev>
|
|
91a: 81 11 cpse r24, r1
|
|
91c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
|
|
920: 08 95 ret
|
|
|
|
00000922 <_ZN5Print5writeEPKc.constprop.14>:
|
|
int getWriteError() { return write_error; }
|
|
void clearWriteError() { setWriteError(0); }
|
|
|
|
virtual size_t write(uint8_t) = 0;
|
|
size_t write(const char *str) {
|
|
if (str == NULL) return 0;
|
|
922: 00 97 sbiw r24, 0x00 ; 0
|
|
924: 69 f0 breq .+26 ; 0x940 <_ZN5Print5writeEPKc.constprop.14+0x1e>
|
|
return write((const uint8_t *)str, strlen(str));
|
|
926: fc 01 movw r30, r24
|
|
928: 01 90 ld r0, Z+
|
|
92a: 00 20 and r0, r0
|
|
92c: e9 f7 brne .-6 ; 0x928 <_ZN5Print5writeEPKc.constprop.14+0x6>
|
|
92e: 31 97 sbiw r30, 0x01 ; 1
|
|
930: af 01 movw r20, r30
|
|
932: 48 1b sub r20, r24
|
|
934: 59 0b sbc r21, r25
|
|
936: bc 01 movw r22, r24
|
|
938: 8d e3 ldi r24, 0x3D ; 61
|
|
93a: 91 e0 ldi r25, 0x01 ; 1
|
|
93c: 0c 94 81 03 jmp 0x702 ; 0x702 <_ZN5Print5writeEPKhj>
|
|
}
|
|
940: 80 e0 ldi r24, 0x00 ; 0
|
|
942: 90 e0 ldi r25, 0x00 ; 0
|
|
944: 08 95 ret
|
|
|
|
00000946 <__cxa_pure_virtual>:
|
|
extern "C" void __cxa_deleted_virtual(void) __attribute__ ((__noreturn__));
|
|
|
|
void __cxa_pure_virtual(void) {
|
|
// We might want to write some diagnostics to uart in this case
|
|
//std::terminate();
|
|
abort();
|
|
946: 0e 94 d3 08 call 0x11a6 ; 0x11a6 <abort>
|
|
|
|
0000094a <__vector_16>:
|
|
#if defined(TIM0_OVF_vect)
|
|
ISR(TIM0_OVF_vect)
|
|
#else
|
|
ISR(TIMER0_OVF_vect)
|
|
#endif
|
|
{
|
|
94a: 1f 92 push r1
|
|
94c: 0f 92 push r0
|
|
94e: 0f b6 in r0, 0x3f ; 63
|
|
950: 0f 92 push r0
|
|
952: 11 24 eor r1, r1
|
|
954: 2f 93 push r18
|
|
956: 3f 93 push r19
|
|
958: 8f 93 push r24
|
|
95a: 9f 93 push r25
|
|
95c: af 93 push r26
|
|
95e: bf 93 push r27
|
|
// copy these to local variables so they can be stored in registers
|
|
// (volatile variables must be read from memory on every access)
|
|
unsigned long m = timer0_millis;
|
|
960: 80 91 35 01 lds r24, 0x0135 ; 0x800135 <timer0_millis>
|
|
964: 90 91 36 01 lds r25, 0x0136 ; 0x800136 <timer0_millis+0x1>
|
|
968: a0 91 37 01 lds r26, 0x0137 ; 0x800137 <timer0_millis+0x2>
|
|
96c: b0 91 38 01 lds r27, 0x0138 ; 0x800138 <timer0_millis+0x3>
|
|
unsigned char f = timer0_fract;
|
|
970: 30 91 34 01 lds r19, 0x0134 ; 0x800134 <timer0_fract>
|
|
|
|
m += MILLIS_INC;
|
|
f += FRACT_INC;
|
|
974: 23 e0 ldi r18, 0x03 ; 3
|
|
976: 23 0f add r18, r19
|
|
if (f >= FRACT_MAX) {
|
|
978: 2d 37 cpi r18, 0x7D ; 125
|
|
97a: 20 f4 brcc .+8 ; 0x984 <__vector_16+0x3a>
|
|
// copy these to local variables so they can be stored in registers
|
|
// (volatile variables must be read from memory on every access)
|
|
unsigned long m = timer0_millis;
|
|
unsigned char f = timer0_fract;
|
|
|
|
m += MILLIS_INC;
|
|
97c: 01 96 adiw r24, 0x01 ; 1
|
|
97e: a1 1d adc r26, r1
|
|
980: b1 1d adc r27, r1
|
|
982: 05 c0 rjmp .+10 ; 0x98e <__vector_16+0x44>
|
|
f += FRACT_INC;
|
|
if (f >= FRACT_MAX) {
|
|
f -= FRACT_MAX;
|
|
984: 26 e8 ldi r18, 0x86 ; 134
|
|
986: 23 0f add r18, r19
|
|
m += 1;
|
|
988: 02 96 adiw r24, 0x02 ; 2
|
|
98a: a1 1d adc r26, r1
|
|
98c: b1 1d adc r27, r1
|
|
}
|
|
|
|
timer0_fract = f;
|
|
98e: 20 93 34 01 sts 0x0134, r18 ; 0x800134 <timer0_fract>
|
|
timer0_millis = m;
|
|
992: 80 93 35 01 sts 0x0135, r24 ; 0x800135 <timer0_millis>
|
|
996: 90 93 36 01 sts 0x0136, r25 ; 0x800136 <timer0_millis+0x1>
|
|
99a: a0 93 37 01 sts 0x0137, r26 ; 0x800137 <timer0_millis+0x2>
|
|
99e: b0 93 38 01 sts 0x0138, r27 ; 0x800138 <timer0_millis+0x3>
|
|
timer0_overflow_count++;
|
|
9a2: 80 91 39 01 lds r24, 0x0139 ; 0x800139 <timer0_overflow_count>
|
|
9a6: 90 91 3a 01 lds r25, 0x013A ; 0x80013a <timer0_overflow_count+0x1>
|
|
9aa: a0 91 3b 01 lds r26, 0x013B ; 0x80013b <timer0_overflow_count+0x2>
|
|
9ae: b0 91 3c 01 lds r27, 0x013C ; 0x80013c <timer0_overflow_count+0x3>
|
|
9b2: 01 96 adiw r24, 0x01 ; 1
|
|
9b4: a1 1d adc r26, r1
|
|
9b6: b1 1d adc r27, r1
|
|
9b8: 80 93 39 01 sts 0x0139, r24 ; 0x800139 <timer0_overflow_count>
|
|
9bc: 90 93 3a 01 sts 0x013A, r25 ; 0x80013a <timer0_overflow_count+0x1>
|
|
9c0: a0 93 3b 01 sts 0x013B, r26 ; 0x80013b <timer0_overflow_count+0x2>
|
|
9c4: b0 93 3c 01 sts 0x013C, r27 ; 0x80013c <timer0_overflow_count+0x3>
|
|
}
|
|
9c8: bf 91 pop r27
|
|
9ca: af 91 pop r26
|
|
9cc: 9f 91 pop r25
|
|
9ce: 8f 91 pop r24
|
|
9d0: 3f 91 pop r19
|
|
9d2: 2f 91 pop r18
|
|
9d4: 0f 90 pop r0
|
|
9d6: 0f be out 0x3f, r0 ; 63
|
|
9d8: 0f 90 pop r0
|
|
9da: 1f 90 pop r1
|
|
9dc: 18 95 reti
|
|
|
|
000009de <__vector_7>:
|
|
#endif
|
|
|
|
|
|
#ifdef USE_TIMER2
|
|
ISR(TIMER2_COMPA_vect)
|
|
{
|
|
9de: 1f 92 push r1
|
|
9e0: 0f 92 push r0
|
|
9e2: 0f b6 in r0, 0x3f ; 63
|
|
9e4: 0f 92 push r0
|
|
9e6: 11 24 eor r1, r1
|
|
9e8: 2f 93 push r18
|
|
9ea: 3f 93 push r19
|
|
9ec: 4f 93 push r20
|
|
9ee: 5f 93 push r21
|
|
9f0: 6f 93 push r22
|
|
9f2: 7f 93 push r23
|
|
9f4: 8f 93 push r24
|
|
9f6: 9f 93 push r25
|
|
9f8: af 93 push r26
|
|
9fa: bf 93 push r27
|
|
9fc: ef 93 push r30
|
|
9fe: ff 93 push r31
|
|
|
|
if (timer2_toggle_count != 0)
|
|
a00: 80 91 df 01 lds r24, 0x01DF ; 0x8001df <timer2_toggle_count>
|
|
a04: 90 91 e0 01 lds r25, 0x01E0 ; 0x8001e0 <timer2_toggle_count+0x1>
|
|
a08: a0 91 e1 01 lds r26, 0x01E1 ; 0x8001e1 <timer2_toggle_count+0x2>
|
|
a0c: b0 91 e2 01 lds r27, 0x01E2 ; 0x8001e2 <timer2_toggle_count+0x3>
|
|
a10: 89 2b or r24, r25
|
|
a12: 8a 2b or r24, r26
|
|
a14: 8b 2b or r24, r27
|
|
a16: 59 f1 breq .+86 ; 0xa6e <__vector_7+0x90>
|
|
{
|
|
// toggle the pin
|
|
*timer2_pin_port ^= timer2_pin_mask;
|
|
a18: 90 91 da 01 lds r25, 0x01DA ; 0x8001da <timer2_pin_mask>
|
|
a1c: e0 91 db 01 lds r30, 0x01DB ; 0x8001db <timer2_pin_port>
|
|
a20: f0 91 dc 01 lds r31, 0x01DC ; 0x8001dc <timer2_pin_port+0x1>
|
|
a24: 80 81 ld r24, Z
|
|
a26: 89 27 eor r24, r25
|
|
a28: 80 83 st Z, r24
|
|
|
|
if (timer2_toggle_count > 0)
|
|
a2a: 80 91 df 01 lds r24, 0x01DF ; 0x8001df <timer2_toggle_count>
|
|
a2e: 90 91 e0 01 lds r25, 0x01E0 ; 0x8001e0 <timer2_toggle_count+0x1>
|
|
a32: a0 91 e1 01 lds r26, 0x01E1 ; 0x8001e1 <timer2_toggle_count+0x2>
|
|
a36: b0 91 e2 01 lds r27, 0x01E2 ; 0x8001e2 <timer2_toggle_count+0x3>
|
|
a3a: 18 16 cp r1, r24
|
|
a3c: 19 06 cpc r1, r25
|
|
a3e: 1a 06 cpc r1, r26
|
|
a40: 1b 06 cpc r1, r27
|
|
a42: 0c f0 brlt .+2 ; 0xa46 <__vector_7+0x68>
|
|
a44: 3d c0 rjmp .+122 ; 0xac0 <__vector_7+0xe2>
|
|
timer2_toggle_count--;
|
|
a46: 80 91 df 01 lds r24, 0x01DF ; 0x8001df <timer2_toggle_count>
|
|
a4a: 90 91 e0 01 lds r25, 0x01E0 ; 0x8001e0 <timer2_toggle_count+0x1>
|
|
a4e: a0 91 e1 01 lds r26, 0x01E1 ; 0x8001e1 <timer2_toggle_count+0x2>
|
|
a52: b0 91 e2 01 lds r27, 0x01E2 ; 0x8001e2 <timer2_toggle_count+0x3>
|
|
a56: 01 97 sbiw r24, 0x01 ; 1
|
|
a58: a1 09 sbc r26, r1
|
|
a5a: b1 09 sbc r27, r1
|
|
a5c: 80 93 df 01 sts 0x01DF, r24 ; 0x8001df <timer2_toggle_count>
|
|
a60: 90 93 e0 01 sts 0x01E0, r25 ; 0x8001e0 <timer2_toggle_count+0x1>
|
|
a64: a0 93 e1 01 sts 0x01E1, r26 ; 0x8001e1 <timer2_toggle_count+0x2>
|
|
a68: b0 93 e2 01 sts 0x01E2, r27 ; 0x8001e2 <timer2_toggle_count+0x3>
|
|
a6c: 29 c0 rjmp .+82 ; 0xac0 <__vector_7+0xe2>
|
|
else
|
|
{
|
|
// need to call noTone() so that the tone_pins[] entry is reset, so the
|
|
// timer gets initialized next time we call tone().
|
|
// XXX: this assumes timer 2 is always the first one used.
|
|
noTone(tone_pins[0]);
|
|
a6e: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__data_start>
|
|
{
|
|
int8_t _timer = -1;
|
|
|
|
for (int i = 0; i < AVAILABLE_TONE_PINS; i++) {
|
|
if (tone_pins[i] == _pin) {
|
|
_timer = pgm_read_byte(tone_pin_to_timer_PGM + i);
|
|
a72: ec e7 ldi r30, 0x7C ; 124
|
|
a74: f0 e0 ldi r31, 0x00 ; 0
|
|
a76: e4 91 lpm r30, Z
|
|
tone_pins[i] = 255;
|
|
a78: 9f ef ldi r25, 0xFF ; 255
|
|
a7a: 90 93 00 01 sts 0x0100, r25 ; 0x800100 <__data_start>
|
|
// XXX: this function only works properly for timer 2 (the only one we use
|
|
// currently). for the others, it should end the tone, but won't restore
|
|
// proper PWM functionality for the timer.
|
|
void disableTimer(uint8_t _timer)
|
|
{
|
|
switch (_timer)
|
|
a7e: e1 30 cpi r30, 0x01 ; 1
|
|
a80: b9 f0 breq .+46 ; 0xab0 <__vector_7+0xd2>
|
|
a82: 98 f0 brcs .+38 ; 0xaaa <__vector_7+0xcc>
|
|
a84: e2 30 cpi r30, 0x02 ; 2
|
|
a86: c9 f4 brne .+50 ; 0xaba <__vector_7+0xdc>
|
|
break;
|
|
#endif
|
|
|
|
case 2:
|
|
#if defined(TIMSK2) && defined(OCIE2A)
|
|
bitWrite(TIMSK2, OCIE2A, 0); // disable interrupt
|
|
a88: 90 91 70 00 lds r25, 0x0070 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
|
|
a8c: 9d 7f andi r25, 0xFD ; 253
|
|
a8e: 90 93 70 00 sts 0x0070, r25 ; 0x800070 <__TEXT_REGION_LENGTH__+0x7e0070>
|
|
#endif
|
|
#if defined(TCCR2A) && defined(WGM20)
|
|
TCCR2A = (1 << WGM20);
|
|
a92: 91 e0 ldi r25, 0x01 ; 1
|
|
a94: 90 93 b0 00 sts 0x00B0, r25 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
|
|
#endif
|
|
#if defined(TCCR2B) && defined(CS22)
|
|
TCCR2B = (TCCR2B & 0b11111000) | (1 << CS22);
|
|
a98: 90 91 b1 00 lds r25, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
|
|
a9c: 98 7f andi r25, 0xF8 ; 248
|
|
a9e: 94 60 ori r25, 0x04 ; 4
|
|
aa0: 90 93 b1 00 sts 0x00B1, r25 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
|
|
#endif
|
|
#if defined(OCR2A)
|
|
OCR2A = 0;
|
|
aa4: 10 92 b3 00 sts 0x00B3, r1 ; 0x8000b3 <__TEXT_REGION_LENGTH__+0x7e00b3>
|
|
aa8: 08 c0 rjmp .+16 ; 0xaba <__vector_7+0xdc>
|
|
{
|
|
switch (_timer)
|
|
{
|
|
case 0:
|
|
#if defined(TIMSK0)
|
|
TIMSK0 = 0;
|
|
aaa: 10 92 6e 00 sts 0x006E, r1 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
|
|
aae: 05 c0 rjmp .+10 ; 0xaba <__vector_7+0xdc>
|
|
#endif
|
|
break;
|
|
|
|
#if defined(TIMSK1) && defined(OCIE1A)
|
|
case 1:
|
|
bitWrite(TIMSK1, OCIE1A, 0);
|
|
ab0: 90 91 6f 00 lds r25, 0x006F ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
|
|
ab4: 9d 7f andi r25, 0xFD ; 253
|
|
ab6: 90 93 6f 00 sts 0x006F, r25 ; 0x80006f <__TEXT_REGION_LENGTH__+0x7e006f>
|
|
}
|
|
}
|
|
|
|
disableTimer(_timer);
|
|
|
|
digitalWrite(_pin, 0);
|
|
aba: 60 e0 ldi r22, 0x00 ; 0
|
|
abc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
// XXX: this assumes timer 2 is always the first one used.
|
|
noTone(tone_pins[0]);
|
|
// disableTimer(2);
|
|
// *timer2_pin_port &= ~(timer2_pin_mask); // keep pin low after stop
|
|
}
|
|
}
|
|
ac0: ff 91 pop r31
|
|
ac2: ef 91 pop r30
|
|
ac4: bf 91 pop r27
|
|
ac6: af 91 pop r26
|
|
ac8: 9f 91 pop r25
|
|
aca: 8f 91 pop r24
|
|
acc: 7f 91 pop r23
|
|
ace: 6f 91 pop r22
|
|
ad0: 5f 91 pop r21
|
|
ad2: 4f 91 pop r20
|
|
ad4: 3f 91 pop r19
|
|
ad6: 2f 91 pop r18
|
|
ad8: 0f 90 pop r0
|
|
ada: 0f be out 0x3f, r0 ; 63
|
|
adc: 0f 90 pop r0
|
|
ade: 1f 90 pop r1
|
|
ae0: 18 95 reti
|
|
|
|
00000ae2 <__vector_19>:
|
|
#elif defined(USART_UDRE_vect)
|
|
ISR(USART_UDRE_vect)
|
|
#else
|
|
#error "Don't know what the Data Register Empty vector is called for Serial"
|
|
#endif
|
|
{
|
|
ae2: 1f 92 push r1
|
|
ae4: 0f 92 push r0
|
|
ae6: 0f b6 in r0, 0x3f ; 63
|
|
ae8: 0f 92 push r0
|
|
aea: 11 24 eor r1, r1
|
|
aec: 2f 93 push r18
|
|
aee: 3f 93 push r19
|
|
af0: 4f 93 push r20
|
|
af2: 5f 93 push r21
|
|
af4: 6f 93 push r22
|
|
af6: 7f 93 push r23
|
|
af8: 8f 93 push r24
|
|
afa: 9f 93 push r25
|
|
afc: af 93 push r26
|
|
afe: bf 93 push r27
|
|
b00: ef 93 push r30
|
|
b02: ff 93 push r31
|
|
Serial._tx_udr_empty_irq();
|
|
b04: 8d e3 ldi r24, 0x3D ; 61
|
|
b06: 91 e0 ldi r25, 0x01 ; 1
|
|
b08: 0e 94 f6 03 call 0x7ec ; 0x7ec <_ZN14HardwareSerial17_tx_udr_empty_irqEv>
|
|
}
|
|
b0c: ff 91 pop r31
|
|
b0e: ef 91 pop r30
|
|
b10: bf 91 pop r27
|
|
b12: af 91 pop r26
|
|
b14: 9f 91 pop r25
|
|
b16: 8f 91 pop r24
|
|
b18: 7f 91 pop r23
|
|
b1a: 6f 91 pop r22
|
|
b1c: 5f 91 pop r21
|
|
b1e: 4f 91 pop r20
|
|
b20: 3f 91 pop r19
|
|
b22: 2f 91 pop r18
|
|
b24: 0f 90 pop r0
|
|
b26: 0f be out 0x3f, r0 ; 63
|
|
b28: 0f 90 pop r0
|
|
b2a: 1f 90 pop r1
|
|
b2c: 18 95 reti
|
|
|
|
00000b2e <__vector_18>:
|
|
#elif defined(USART_RXC_vect)
|
|
ISR(USART_RXC_vect) // ATmega8
|
|
#else
|
|
#error "Don't know what the Data Received vector is called for Serial"
|
|
#endif
|
|
{
|
|
b2e: 1f 92 push r1
|
|
b30: 0f 92 push r0
|
|
b32: 0f b6 in r0, 0x3f ; 63
|
|
b34: 0f 92 push r0
|
|
b36: 11 24 eor r1, r1
|
|
b38: 2f 93 push r18
|
|
b3a: 8f 93 push r24
|
|
b3c: 9f 93 push r25
|
|
b3e: ef 93 push r30
|
|
b40: ff 93 push r31
|
|
|
|
// Actual interrupt handlers //////////////////////////////////////////////////////////////
|
|
|
|
void HardwareSerial::_rx_complete_irq(void)
|
|
{
|
|
if (bit_is_clear(*_ucsra, UPE0)) {
|
|
b42: e0 91 4d 01 lds r30, 0x014D ; 0x80014d <Serial+0x10>
|
|
b46: f0 91 4e 01 lds r31, 0x014E ; 0x80014e <Serial+0x11>
|
|
b4a: 80 81 ld r24, Z
|
|
b4c: e0 91 53 01 lds r30, 0x0153 ; 0x800153 <Serial+0x16>
|
|
b50: f0 91 54 01 lds r31, 0x0154 ; 0x800154 <Serial+0x17>
|
|
b54: 82 fd sbrc r24, 2
|
|
b56: 12 c0 rjmp .+36 ; 0xb7c <__vector_18+0x4e>
|
|
// No Parity error, read byte and store it in the buffer if there is
|
|
// room
|
|
unsigned char c = *_udr;
|
|
b58: 90 81 ld r25, Z
|
|
rx_buffer_index_t i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_RX_BUFFER_SIZE;
|
|
b5a: 80 91 56 01 lds r24, 0x0156 ; 0x800156 <Serial+0x19>
|
|
b5e: 8f 5f subi r24, 0xFF ; 255
|
|
b60: 8f 73 andi r24, 0x3F ; 63
|
|
|
|
// if we should be storing the received character into the location
|
|
// just before the tail (meaning that the head would advance to the
|
|
// current location of the tail), we're about to overflow the buffer
|
|
// and so we don't write the character or advance the head.
|
|
if (i != _rx_buffer_tail) {
|
|
b62: 20 91 57 01 lds r18, 0x0157 ; 0x800157 <Serial+0x1a>
|
|
b66: 82 17 cp r24, r18
|
|
b68: 51 f0 breq .+20 ; 0xb7e <__vector_18+0x50>
|
|
_rx_buffer[_rx_buffer_head] = c;
|
|
b6a: e0 91 56 01 lds r30, 0x0156 ; 0x800156 <Serial+0x19>
|
|
b6e: f0 e0 ldi r31, 0x00 ; 0
|
|
b70: e3 5c subi r30, 0xC3 ; 195
|
|
b72: fe 4f sbci r31, 0xFE ; 254
|
|
b74: 95 8f std Z+29, r25 ; 0x1d
|
|
_rx_buffer_head = i;
|
|
b76: 80 93 56 01 sts 0x0156, r24 ; 0x800156 <Serial+0x19>
|
|
b7a: 01 c0 rjmp .+2 ; 0xb7e <__vector_18+0x50>
|
|
}
|
|
} else {
|
|
// Parity error, read byte but discard it
|
|
*_udr;
|
|
b7c: 80 81 ld r24, Z
|
|
Serial._rx_complete_irq();
|
|
}
|
|
b7e: ff 91 pop r31
|
|
b80: ef 91 pop r30
|
|
b82: 9f 91 pop r25
|
|
b84: 8f 91 pop r24
|
|
b86: 2f 91 pop r18
|
|
b88: 0f 90 pop r0
|
|
b8a: 0f be out 0x3f, r0 ; 63
|
|
b8c: 0f 90 pop r0
|
|
b8e: 1f 90 pop r1
|
|
b90: 18 95 reti
|
|
|
|
00000b92 <main>:
|
|
|
|
void setupUSB() __attribute__((weak));
|
|
void setupUSB() { }
|
|
|
|
int main(void)
|
|
{
|
|
b92: cf 93 push r28
|
|
b94: df 93 push r29
|
|
b96: cd b7 in r28, 0x3d ; 61
|
|
b98: de b7 in r29, 0x3e ; 62
|
|
b9a: a1 97 sbiw r28, 0x21 ; 33
|
|
b9c: 0f b6 in r0, 0x3f ; 63
|
|
b9e: f8 94 cli
|
|
ba0: de bf out 0x3e, r29 ; 62
|
|
ba2: 0f be out 0x3f, r0 ; 63
|
|
ba4: cd bf out 0x3d, r28 ; 61
|
|
|
|
void init()
|
|
{
|
|
// this needs to be called before setup() or some functions won't
|
|
// work there
|
|
sei();
|
|
ba6: 78 94 sei
|
|
|
|
// on the ATmega168, timer 0 is also used for fast hardware pwm
|
|
// (using phase-correct PWM would mean that timer 0 overflowed half as often
|
|
// resulting in different millis() behavior on the ATmega8 and ATmega168)
|
|
#if defined(TCCR0A) && defined(WGM01)
|
|
sbi(TCCR0A, WGM01);
|
|
ba8: 84 b5 in r24, 0x24 ; 36
|
|
baa: 82 60 ori r24, 0x02 ; 2
|
|
bac: 84 bd out 0x24, r24 ; 36
|
|
sbi(TCCR0A, WGM00);
|
|
bae: 84 b5 in r24, 0x24 ; 36
|
|
bb0: 81 60 ori r24, 0x01 ; 1
|
|
bb2: 84 bd out 0x24, r24 ; 36
|
|
// this combination is for the standard atmega8
|
|
sbi(TCCR0, CS01);
|
|
sbi(TCCR0, CS00);
|
|
#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
|
|
// this combination is for the standard 168/328/1280/2560
|
|
sbi(TCCR0B, CS01);
|
|
bb4: 85 b5 in r24, 0x25 ; 37
|
|
bb6: 82 60 ori r24, 0x02 ; 2
|
|
bb8: 85 bd out 0x25, r24 ; 37
|
|
sbi(TCCR0B, CS00);
|
|
bba: 85 b5 in r24, 0x25 ; 37
|
|
bbc: 81 60 ori r24, 0x01 ; 1
|
|
bbe: 85 bd out 0x25, r24 ; 37
|
|
|
|
// enable timer 0 overflow interrupt
|
|
#if defined(TIMSK) && defined(TOIE0)
|
|
sbi(TIMSK, TOIE0);
|
|
#elif defined(TIMSK0) && defined(TOIE0)
|
|
sbi(TIMSK0, TOIE0);
|
|
bc0: 80 91 6e 00 lds r24, 0x006E ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
|
|
bc4: 81 60 ori r24, 0x01 ; 1
|
|
bc6: 80 93 6e 00 sts 0x006E, r24 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
|
|
// this is better for motors as it ensures an even waveform
|
|
// note, however, that fast pwm mode can achieve a frequency of up
|
|
// 8 MHz (with a 16 MHz clock) at 50% duty cycle
|
|
|
|
#if defined(TCCR1B) && defined(CS11) && defined(CS10)
|
|
TCCR1B = 0;
|
|
bca: 10 92 81 00 sts 0x0081, r1 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
|
|
// set timer 1 prescale factor to 64
|
|
sbi(TCCR1B, CS11);
|
|
bce: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
bd2: 82 60 ori r24, 0x02 ; 2
|
|
bd4: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
#if F_CPU >= 8000000L
|
|
sbi(TCCR1B, CS10);
|
|
bd8: 80 91 81 00 lds r24, 0x0081 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
bdc: 81 60 ori r24, 0x01 ; 1
|
|
bde: 80 93 81 00 sts 0x0081, r24 ; 0x800081 <__TEXT_REGION_LENGTH__+0x7e0081>
|
|
sbi(TCCR1, CS10);
|
|
#endif
|
|
#endif
|
|
// put timer 1 in 8-bit phase correct pwm mode
|
|
#if defined(TCCR1A) && defined(WGM10)
|
|
sbi(TCCR1A, WGM10);
|
|
be2: 80 91 80 00 lds r24, 0x0080 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
|
|
be6: 81 60 ori r24, 0x01 ; 1
|
|
be8: 80 93 80 00 sts 0x0080, r24 ; 0x800080 <__TEXT_REGION_LENGTH__+0x7e0080>
|
|
|
|
// set timer 2 prescale factor to 64
|
|
#if defined(TCCR2) && defined(CS22)
|
|
sbi(TCCR2, CS22);
|
|
#elif defined(TCCR2B) && defined(CS22)
|
|
sbi(TCCR2B, CS22);
|
|
bec: 80 91 b1 00 lds r24, 0x00B1 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
|
|
bf0: 84 60 ori r24, 0x04 ; 4
|
|
bf2: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 <__TEXT_REGION_LENGTH__+0x7e00b1>
|
|
|
|
// configure timer 2 for phase correct pwm (8-bit)
|
|
#if defined(TCCR2) && defined(WGM20)
|
|
sbi(TCCR2, WGM20);
|
|
#elif defined(TCCR2A) && defined(WGM20)
|
|
sbi(TCCR2A, WGM20);
|
|
bf6: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
|
|
bfa: 81 60 ori r24, 0x01 ; 1
|
|
bfc: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 <__TEXT_REGION_LENGTH__+0x7e00b0>
|
|
#endif
|
|
|
|
#if defined(ADCSRA)
|
|
// set a2d prescaler so we are inside the desired 50-200 KHz range.
|
|
#if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
|
|
sbi(ADCSRA, ADPS2);
|
|
c00: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
c04: 84 60 ori r24, 0x04 ; 4
|
|
c06: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
sbi(ADCSRA, ADPS1);
|
|
c0a: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
c0e: 82 60 ori r24, 0x02 ; 2
|
|
c10: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
sbi(ADCSRA, ADPS0);
|
|
c14: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
c18: 81 60 ori r24, 0x01 ; 1
|
|
c1a: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
cbi(ADCSRA, ADPS2);
|
|
cbi(ADCSRA, ADPS1);
|
|
sbi(ADCSRA, ADPS0);
|
|
#endif
|
|
// enable a2d conversions
|
|
sbi(ADCSRA, ADEN);
|
|
c1e: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
c22: 80 68 ori r24, 0x80 ; 128
|
|
c24: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
// here so they can be used as normal digital i/o; they will be
|
|
// reconnected in Serial.begin()
|
|
#if defined(UCSRB)
|
|
UCSRB = 0;
|
|
#elif defined(UCSR0B)
|
|
UCSR0B = 0;
|
|
c28: 10 92 c1 00 sts 0x00C1, r1 ; 0x8000c1 <__TEXT_REGION_LENGTH__+0x7e00c1>
|
|
|
|
void HardwareSerial::begin(unsigned long baud, byte config)
|
|
{
|
|
// Try u2x mode first
|
|
uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
|
|
*_ucsra = 1 << U2X0;
|
|
c2c: e0 91 4d 01 lds r30, 0x014D ; 0x80014d <Serial+0x10>
|
|
c30: f0 91 4e 01 lds r31, 0x014E ; 0x80014e <Serial+0x11>
|
|
c34: 82 e0 ldi r24, 0x02 ; 2
|
|
c36: 80 83 st Z, r24
|
|
*_ucsra = 0;
|
|
baud_setting = (F_CPU / 8 / baud - 1) / 2;
|
|
}
|
|
|
|
// assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
|
|
*_ubrrh = baud_setting >> 8;
|
|
c38: e0 91 49 01 lds r30, 0x0149 ; 0x800149 <Serial+0xc>
|
|
c3c: f0 91 4a 01 lds r31, 0x014A ; 0x80014a <Serial+0xd>
|
|
c40: 10 82 st Z, r1
|
|
*_ubrrl = baud_setting;
|
|
c42: e0 91 4b 01 lds r30, 0x014B ; 0x80014b <Serial+0xe>
|
|
c46: f0 91 4c 01 lds r31, 0x014C ; 0x80014c <Serial+0xf>
|
|
c4a: 8f ec ldi r24, 0xCF ; 207
|
|
c4c: 80 83 st Z, r24
|
|
|
|
_written = false;
|
|
c4e: 10 92 55 01 sts 0x0155, r1 ; 0x800155 <Serial+0x18>
|
|
|
|
//set the data bits, parity, and stop bits
|
|
#if defined(__AVR_ATmega8__)
|
|
config |= 0x80; // select UCSRC register (shared with UBRRH)
|
|
#endif
|
|
*_ucsrc = config;
|
|
c52: e0 91 51 01 lds r30, 0x0151 ; 0x800151 <Serial+0x14>
|
|
c56: f0 91 52 01 lds r31, 0x0152 ; 0x800152 <Serial+0x15>
|
|
c5a: 86 e0 ldi r24, 0x06 ; 6
|
|
c5c: 80 83 st Z, r24
|
|
|
|
sbi(*_ucsrb, RXEN0);
|
|
c5e: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
|
|
c62: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
|
|
c66: 80 81 ld r24, Z
|
|
c68: 80 61 ori r24, 0x10 ; 16
|
|
c6a: 80 83 st Z, r24
|
|
sbi(*_ucsrb, TXEN0);
|
|
c6c: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
|
|
c70: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
|
|
c74: 80 81 ld r24, Z
|
|
c76: 88 60 ori r24, 0x08 ; 8
|
|
c78: 80 83 st Z, r24
|
|
sbi(*_ucsrb, RXCIE0);
|
|
c7a: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
|
|
c7e: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
|
|
c82: 80 81 ld r24, Z
|
|
c84: 80 68 ori r24, 0x80 ; 128
|
|
c86: 80 83 st Z, r24
|
|
cbi(*_ucsrb, UDRIE0);
|
|
c88: e0 91 4f 01 lds r30, 0x014F ; 0x80014f <Serial+0x12>
|
|
c8c: f0 91 50 01 lds r31, 0x0150 ; 0x800150 <Serial+0x13>
|
|
c90: 80 81 ld r24, Z
|
|
c92: 8f 7d andi r24, 0xDF ; 223
|
|
c94: 80 83 st Z, r24
|
|
|
|
void setup() {
|
|
// put your setup code here, to run once:
|
|
Serial.begin(9600);
|
|
|
|
pinMode(LED1, OUTPUT);
|
|
c96: 8e e0 ldi r24, 0x0E ; 14
|
|
c98: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED2, OUTPUT);
|
|
c9c: 8f e0 ldi r24, 0x0F ; 15
|
|
c9e: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED3, OUTPUT);
|
|
ca2: 80 e1 ldi r24, 0x10 ; 16
|
|
ca4: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED4, OUTPUT);
|
|
ca8: 81 e1 ldi r24, 0x11 ; 17
|
|
caa: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED5, OUTPUT);
|
|
cae: 82 e1 ldi r24, 0x12 ; 18
|
|
cb0: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED6, OUTPUT);
|
|
cb4: 83 e1 ldi r24, 0x13 ; 19
|
|
cb6: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED7, OUTPUT);
|
|
cba: 87 e0 ldi r24, 0x07 ; 7
|
|
cbc: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
pinMode(LED8, OUTPUT);
|
|
cc0: 88 e0 ldi r24, 0x08 ; 8
|
|
cc2: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
|
|
pinMode(SPKR, OUTPUT);
|
|
cc6: 85 e0 ldi r24, 0x05 ; 5
|
|
cc8: 0e 94 88 00 call 0x110 ; 0x110 <pinMode.constprop.17>
|
|
return write(s.c_str(), s.length());
|
|
}
|
|
|
|
size_t Print::print(const char str[])
|
|
{
|
|
return write(str);
|
|
ccc: 83 e1 ldi r24, 0x13 ; 19
|
|
cce: 91 e0 ldi r25, 0x01 ; 1
|
|
cd0: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
|
|
return x.printTo(*this);
|
|
}
|
|
|
|
size_t Print::println(void)
|
|
{
|
|
return write("\r\n");
|
|
cd4: 88 e2 ldi r24, 0x28 ; 40
|
|
cd6: 91 e0 ldi r25, 0x01 ; 1
|
|
cd8: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
|
|
return write(s.c_str(), s.length());
|
|
}
|
|
|
|
size_t Print::print(const char str[])
|
|
{
|
|
return write(str);
|
|
cdc: 8b e2 ldi r24, 0x2B ; 43
|
|
cde: 91 e0 ldi r25, 0x01 ; 1
|
|
ce0: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
|
|
return x.printTo(*this);
|
|
}
|
|
|
|
size_t Print::println(void)
|
|
{
|
|
return write("\r\n");
|
|
ce4: 88 e2 ldi r24, 0x28 ; 40
|
|
ce6: 91 e0 ldi r25, 0x01 ; 1
|
|
ce8: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
|
|
|
|
Serial.println("Flammable Gas Sensor");
|
|
Serial.println("Begin");
|
|
|
|
int yy = 0;
|
|
for(yy=200;yy<1200;yy+=150){
|
|
cec: 08 ec ldi r16, 0xC8 ; 200
|
|
cee: 10 e0 ldi r17, 0x00 ; 0
|
|
tone(SPKR,yy,100);
|
|
cf0: c8 01 movw r24, r16
|
|
cf2: 0e 94 a7 00 call 0x14e ; 0x14e <_Z4tonehjm.constprop.15>
|
|
delay(100);
|
|
cf6: 64 e6 ldi r22, 0x64 ; 100
|
|
cf8: 70 e0 ldi r23, 0x00 ; 0
|
|
cfa: 80 e0 ldi r24, 0x00 ; 0
|
|
cfc: 90 e0 ldi r25, 0x00 ; 0
|
|
cfe: 0e 94 47 03 call 0x68e ; 0x68e <delay>
|
|
|
|
Serial.println("Flammable Gas Sensor");
|
|
Serial.println("Begin");
|
|
|
|
int yy = 0;
|
|
for(yy=200;yy<1200;yy+=150){
|
|
d02: 0a 56 subi r16, 0x6A ; 106
|
|
d04: 1f 4f sbci r17, 0xFF ; 255
|
|
d06: 02 3e cpi r16, 0xE2 ; 226
|
|
d08: 24 e0 ldi r18, 0x04 ; 4
|
|
d0a: 12 07 cpc r17, r18
|
|
d0c: 89 f7 brne .-30 ; 0xcf0 <main+0x15e>
|
|
tone(SPKR,yy,100);
|
|
delay(50);
|
|
}*/
|
|
|
|
|
|
digitalWrite(LED1,HIGH);
|
|
d0e: 61 e0 ldi r22, 0x01 ; 1
|
|
d10: 8e e0 ldi r24, 0x0E ; 14
|
|
d12: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
d16: 61 e0 ldi r22, 0x01 ; 1
|
|
d18: 8f e0 ldi r24, 0x0F ; 15
|
|
d1a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
d1e: 61 e0 ldi r22, 0x01 ; 1
|
|
d20: 80 e1 ldi r24, 0x10 ; 16
|
|
d22: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,HIGH);
|
|
d26: 61 e0 ldi r22, 0x01 ; 1
|
|
d28: 81 e1 ldi r24, 0x11 ; 17
|
|
d2a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
|
|
delay(500);
|
|
d2e: 64 ef ldi r22, 0xF4 ; 244
|
|
d30: 71 e0 ldi r23, 0x01 ; 1
|
|
d32: 80 e0 ldi r24, 0x00 ; 0
|
|
d34: 90 e0 ldi r25, 0x00 ; 0
|
|
d36: 0e 94 47 03 call 0x68e ; 0x68e <delay>
|
|
digitalWrite(LED1,LOW);
|
|
d3a: 60 e0 ldi r22, 0x00 ; 0
|
|
d3c: 8e e0 ldi r24, 0x0E ; 14
|
|
d3e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,LOW);
|
|
d42: 60 e0 ldi r22, 0x00 ; 0
|
|
d44: 8f e0 ldi r24, 0x0F ; 15
|
|
d46: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,LOW);
|
|
d4a: 60 e0 ldi r22, 0x00 ; 0
|
|
d4c: 80 e1 ldi r24, 0x10 ; 16
|
|
d4e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,LOW);
|
|
d52: 60 e0 ldi r22, 0x00 ; 0
|
|
d54: 81 e1 ldi r24, 0x11 ; 17
|
|
d56: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
|
|
digitalWrite(LED5,HIGH);
|
|
d5a: 61 e0 ldi r22, 0x01 ; 1
|
|
d5c: 82 e1 ldi r24, 0x12 ; 18
|
|
d5e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,HIGH);
|
|
d62: 61 e0 ldi r22, 0x01 ; 1
|
|
d64: 83 e1 ldi r24, 0x13 ; 19
|
|
d66: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,HIGH);
|
|
d6a: 61 e0 ldi r22, 0x01 ; 1
|
|
d6c: 87 e0 ldi r24, 0x07 ; 7
|
|
d6e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,HIGH);
|
|
d72: 61 e0 ldi r22, 0x01 ; 1
|
|
d74: 88 e0 ldi r24, 0x08 ; 8
|
|
d76: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
|
|
delay(500);
|
|
d7a: 64 ef ldi r22, 0xF4 ; 244
|
|
d7c: 71 e0 ldi r23, 0x01 ; 1
|
|
d7e: 80 e0 ldi r24, 0x00 ; 0
|
|
d80: 90 e0 ldi r25, 0x00 ; 0
|
|
d82: 0e 94 47 03 call 0x68e ; 0x68e <delay>
|
|
digitalWrite(LED5,LOW);
|
|
d86: 60 e0 ldi r22, 0x00 ; 0
|
|
d88: 82 e1 ldi r24, 0x12 ; 18
|
|
d8a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,LOW);
|
|
d8e: 60 e0 ldi r22, 0x00 ; 0
|
|
d90: 83 e1 ldi r24, 0x13 ; 19
|
|
d92: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
d96: 60 e0 ldi r22, 0x00 ; 0
|
|
d98: 87 e0 ldi r24, 0x07 ; 7
|
|
d9a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
d9e: 60 e0 ldi r22, 0x00 ; 0
|
|
da0: 88 e0 ldi r24, 0x08 ; 8
|
|
da2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
// to 0 (the default).
|
|
#if defined(ADMUX)
|
|
#if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
|
|
ADMUX = (analog_reference << 4) | (pin & 0x07);
|
|
#else
|
|
ADMUX = (analog_reference << 6) | (pin & 0x07);
|
|
da6: 86 e4 ldi r24, 0x46 ; 70
|
|
da8: b8 2e mov r11, r24
|
|
|
|
// prevent crash if called with base == 1
|
|
if (base < 2) base = 10;
|
|
|
|
do {
|
|
char c = n % base;
|
|
daa: 9a e0 ldi r25, 0x0A ; 10
|
|
dac: c9 2e mov r12, r25
|
|
dae: d1 2c mov r13, r1
|
|
db0: e1 2c mov r14, r1
|
|
db2: f1 2c mov r15, r1
|
|
db4: b0 92 7c 00 sts 0x007C, r11 ; 0x80007c <__TEXT_REGION_LENGTH__+0x7e007c>
|
|
// without a delay, we seem to read from the wrong channel
|
|
//delay(1);
|
|
|
|
#if defined(ADCSRA) && defined(ADCL)
|
|
// start the conversion
|
|
sbi(ADCSRA, ADSC);
|
|
db8: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
dbc: 80 64 ori r24, 0x40 ; 64
|
|
dbe: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
|
|
// ADSC is cleared when the conversion finishes
|
|
while (bit_is_set(ADCSRA, ADSC));
|
|
dc2: 80 91 7a 00 lds r24, 0x007A ; 0x80007a <__TEXT_REGION_LENGTH__+0x7e007a>
|
|
dc6: 86 fd sbrc r24, 6
|
|
dc8: fc cf rjmp .-8 ; 0xdc2 <main+0x230>
|
|
|
|
// we have to read ADCL first; doing so locks both ADCL
|
|
// and ADCH until ADCH is read. reading ADCL second would
|
|
// cause the results of each conversion to be discarded,
|
|
// as ADCL and ADCH would be locked when it completed.
|
|
low = ADCL;
|
|
dca: 20 91 78 00 lds r18, 0x0078 ; 0x800078 <__TEXT_REGION_LENGTH__+0x7e0078>
|
|
high = ADCH;
|
|
dce: 80 91 79 00 lds r24, 0x0079 ; 0x800079 <__TEXT_REGION_LENGTH__+0x7e0079>
|
|
}
|
|
|
|
void loop() {
|
|
// put your main code here, to run repeatedly:
|
|
|
|
gasVAL = analogRead(Sensor);
|
|
dd2: 30 e0 ldi r19, 0x00 ; 0
|
|
dd4: 38 2b or r19, r24
|
|
dd6: 30 93 33 01 sts 0x0133, r19 ; 0x800133 <__data_end+0x1>
|
|
dda: 20 93 32 01 sts 0x0132, r18 ; 0x800132 <__data_end>
|
|
return print((long) n, base);
|
|
}
|
|
|
|
size_t Print::print(unsigned int n, int base)
|
|
{
|
|
return print((unsigned long) n, base);
|
|
dde: 40 e0 ldi r20, 0x00 ; 0
|
|
de0: 50 e0 ldi r21, 0x00 ; 0
|
|
size_t Print::printNumber(unsigned long n, uint8_t base)
|
|
{
|
|
char buf[8 * sizeof(long) + 1]; // Assumes 8-bit chars plus zero byte.
|
|
char *str = &buf[sizeof(buf) - 1];
|
|
|
|
*str = '\0';
|
|
de2: 19 a2 std Y+33, r1 ; 0x21
|
|
de4: 8e 01 movw r16, r28
|
|
de6: 0f 5d subi r16, 0xDF ; 223
|
|
de8: 1f 4f sbci r17, 0xFF ; 255
|
|
// prevent crash if called with base == 1
|
|
if (base < 2) base = 10;
|
|
|
|
do {
|
|
char c = n % base;
|
|
n /= base;
|
|
dea: ca 01 movw r24, r20
|
|
dec: b9 01 movw r22, r18
|
|
dee: a7 01 movw r20, r14
|
|
df0: 96 01 movw r18, r12
|
|
df2: 0e 94 7d 08 call 0x10fa ; 0x10fa <__udivmodsi4>
|
|
|
|
*--str = c < 10 ? c + '0' : c + 'A' - 10;
|
|
df6: 60 5d subi r22, 0xD0 ; 208
|
|
df8: f8 01 movw r30, r16
|
|
dfa: 62 93 st -Z, r22
|
|
dfc: 8f 01 movw r16, r30
|
|
*str = '\0';
|
|
|
|
// prevent crash if called with base == 1
|
|
if (base < 2) base = 10;
|
|
|
|
do {
|
|
dfe: 21 15 cp r18, r1
|
|
e00: 31 05 cpc r19, r1
|
|
e02: 41 05 cpc r20, r1
|
|
e04: 51 05 cpc r21, r1
|
|
e06: 89 f7 brne .-30 ; 0xdea <main+0x258>
|
|
n /= base;
|
|
|
|
*--str = c < 10 ? c + '0' : c + 'A' - 10;
|
|
} while(n);
|
|
|
|
return write(str);
|
|
e08: cf 01 movw r24, r30
|
|
e0a: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
|
|
return x.printTo(*this);
|
|
}
|
|
|
|
size_t Print::println(void)
|
|
{
|
|
return write("\r\n");
|
|
e0e: 88 e2 ldi r24, 0x28 ; 40
|
|
e10: 91 e0 ldi r25, 0x01 ; 1
|
|
e12: 0e 94 91 04 call 0x922 ; 0x922 <_ZN5Print5writeEPKc.constprop.14>
|
|
Serial.println(gasVAL);
|
|
lightLED(gasVAL);
|
|
e16: 80 91 32 01 lds r24, 0x0132 ; 0x800132 <__data_end>
|
|
e1a: 90 91 33 01 lds r25, 0x0133 ; 0x800133 <__data_end+0x1>
|
|
|
|
}
|
|
|
|
void lightLED( uint16_t reading){
|
|
|
|
if (reading >= 750){
|
|
e1e: 8e 3e cpi r24, 0xEE ; 238
|
|
e20: f2 e0 ldi r31, 0x02 ; 2
|
|
e22: 9f 07 cpc r25, r31
|
|
e24: 18 f1 brcs .+70 ; 0xe6c <main+0x2da>
|
|
digitalWrite(LED1,HIGH);
|
|
e26: 61 e0 ldi r22, 0x01 ; 1
|
|
e28: 8e e0 ldi r24, 0x0E ; 14
|
|
e2a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
e2e: 61 e0 ldi r22, 0x01 ; 1
|
|
e30: 8f e0 ldi r24, 0x0F ; 15
|
|
e32: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
e36: 61 e0 ldi r22, 0x01 ; 1
|
|
e38: 80 e1 ldi r24, 0x10 ; 16
|
|
e3a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,HIGH);
|
|
e3e: 61 e0 ldi r22, 0x01 ; 1
|
|
e40: 81 e1 ldi r24, 0x11 ; 17
|
|
e42: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,HIGH);
|
|
e46: 61 e0 ldi r22, 0x01 ; 1
|
|
e48: 82 e1 ldi r24, 0x12 ; 18
|
|
e4a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,HIGH);
|
|
e4e: 61 e0 ldi r22, 0x01 ; 1
|
|
e50: 83 e1 ldi r24, 0x13 ; 19
|
|
e52: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,HIGH);
|
|
e56: 61 e0 ldi r22, 0x01 ; 1
|
|
e58: 87 e0 ldi r24, 0x07 ; 7
|
|
e5a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,HIGH);
|
|
e5e: 61 e0 ldi r22, 0x01 ; 1
|
|
e60: 88 e0 ldi r24, 0x08 ; 8
|
|
e62: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,750,100);
|
|
e66: 8e ee ldi r24, 0xEE ; 238
|
|
e68: 92 e0 ldi r25, 0x02 ; 2
|
|
e6a: 26 c0 rjmp .+76 ; 0xeb8 <main+0x326>
|
|
}
|
|
else if (reading >= 700){
|
|
e6c: 8c 3b cpi r24, 0xBC ; 188
|
|
e6e: 22 e0 ldi r18, 0x02 ; 2
|
|
e70: 92 07 cpc r25, r18
|
|
e72: 28 f1 brcs .+74 ; 0xebe <main+0x32c>
|
|
digitalWrite(LED1,HIGH);
|
|
e74: 61 e0 ldi r22, 0x01 ; 1
|
|
e76: 8e e0 ldi r24, 0x0E ; 14
|
|
e78: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
e7c: 61 e0 ldi r22, 0x01 ; 1
|
|
e7e: 8f e0 ldi r24, 0x0F ; 15
|
|
e80: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
e84: 61 e0 ldi r22, 0x01 ; 1
|
|
e86: 80 e1 ldi r24, 0x10 ; 16
|
|
e88: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,HIGH);
|
|
e8c: 61 e0 ldi r22, 0x01 ; 1
|
|
e8e: 81 e1 ldi r24, 0x11 ; 17
|
|
e90: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,HIGH);
|
|
e94: 61 e0 ldi r22, 0x01 ; 1
|
|
e96: 82 e1 ldi r24, 0x12 ; 18
|
|
e98: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,HIGH);
|
|
e9c: 61 e0 ldi r22, 0x01 ; 1
|
|
e9e: 83 e1 ldi r24, 0x13 ; 19
|
|
ea0: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,HIGH);
|
|
ea4: 61 e0 ldi r22, 0x01 ; 1
|
|
ea6: 87 e0 ldi r24, 0x07 ; 7
|
|
ea8: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
eac: 60 e0 ldi r22, 0x00 ; 0
|
|
eae: 88 e0 ldi r24, 0x08 ; 8
|
|
eb0: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,700,100);
|
|
eb4: 8c eb ldi r24, 0xBC ; 188
|
|
eb6: 92 e0 ldi r25, 0x02 ; 2
|
|
eb8: 0e 94 a7 00 call 0x14e ; 0x14e <_Z4tonehjm.constprop.15>
|
|
ebc: e8 c0 rjmp .+464 ; 0x108e <main+0x4fc>
|
|
}
|
|
else if (reading >= 650){
|
|
ebe: 8a 38 cpi r24, 0x8A ; 138
|
|
ec0: e2 e0 ldi r30, 0x02 ; 2
|
|
ec2: 9e 07 cpc r25, r30
|
|
ec4: 18 f1 brcs .+70 ; 0xf0c <main+0x37a>
|
|
digitalWrite(LED1,HIGH);
|
|
ec6: 61 e0 ldi r22, 0x01 ; 1
|
|
ec8: 8e e0 ldi r24, 0x0E ; 14
|
|
eca: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
ece: 61 e0 ldi r22, 0x01 ; 1
|
|
ed0: 8f e0 ldi r24, 0x0F ; 15
|
|
ed2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
ed6: 61 e0 ldi r22, 0x01 ; 1
|
|
ed8: 80 e1 ldi r24, 0x10 ; 16
|
|
eda: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,HIGH);
|
|
ede: 61 e0 ldi r22, 0x01 ; 1
|
|
ee0: 81 e1 ldi r24, 0x11 ; 17
|
|
ee2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,HIGH);
|
|
ee6: 61 e0 ldi r22, 0x01 ; 1
|
|
ee8: 82 e1 ldi r24, 0x12 ; 18
|
|
eea: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,HIGH);
|
|
eee: 61 e0 ldi r22, 0x01 ; 1
|
|
ef0: 83 e1 ldi r24, 0x13 ; 19
|
|
ef2: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
ef6: 60 e0 ldi r22, 0x00 ; 0
|
|
ef8: 87 e0 ldi r24, 0x07 ; 7
|
|
efa: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
efe: 60 e0 ldi r22, 0x00 ; 0
|
|
f00: 88 e0 ldi r24, 0x08 ; 8
|
|
f02: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,650,100);
|
|
f06: 8a e8 ldi r24, 0x8A ; 138
|
|
f08: 92 e0 ldi r25, 0x02 ; 2
|
|
f0a: d6 cf rjmp .-84 ; 0xeb8 <main+0x326>
|
|
}
|
|
else if (reading >= 600){
|
|
f0c: 88 35 cpi r24, 0x58 ; 88
|
|
f0e: f2 e0 ldi r31, 0x02 ; 2
|
|
f10: 9f 07 cpc r25, r31
|
|
f12: 18 f1 brcs .+70 ; 0xf5a <main+0x3c8>
|
|
digitalWrite(LED1,HIGH);
|
|
f14: 61 e0 ldi r22, 0x01 ; 1
|
|
f16: 8e e0 ldi r24, 0x0E ; 14
|
|
f18: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
f1c: 61 e0 ldi r22, 0x01 ; 1
|
|
f1e: 8f e0 ldi r24, 0x0F ; 15
|
|
f20: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
f24: 61 e0 ldi r22, 0x01 ; 1
|
|
f26: 80 e1 ldi r24, 0x10 ; 16
|
|
f28: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,HIGH);
|
|
f2c: 61 e0 ldi r22, 0x01 ; 1
|
|
f2e: 81 e1 ldi r24, 0x11 ; 17
|
|
f30: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,HIGH);
|
|
f34: 61 e0 ldi r22, 0x01 ; 1
|
|
f36: 82 e1 ldi r24, 0x12 ; 18
|
|
f38: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,LOW);
|
|
f3c: 60 e0 ldi r22, 0x00 ; 0
|
|
f3e: 83 e1 ldi r24, 0x13 ; 19
|
|
f40: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
f44: 60 e0 ldi r22, 0x00 ; 0
|
|
f46: 87 e0 ldi r24, 0x07 ; 7
|
|
f48: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
f4c: 60 e0 ldi r22, 0x00 ; 0
|
|
f4e: 88 e0 ldi r24, 0x08 ; 8
|
|
f50: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,600,100);
|
|
f54: 88 e5 ldi r24, 0x58 ; 88
|
|
f56: 92 e0 ldi r25, 0x02 ; 2
|
|
f58: af cf rjmp .-162 ; 0xeb8 <main+0x326>
|
|
}
|
|
else if (reading >= 550){
|
|
f5a: 86 32 cpi r24, 0x26 ; 38
|
|
f5c: 22 e0 ldi r18, 0x02 ; 2
|
|
f5e: 92 07 cpc r25, r18
|
|
f60: 18 f1 brcs .+70 ; 0xfa8 <main+0x416>
|
|
digitalWrite(LED1,HIGH);
|
|
f62: 61 e0 ldi r22, 0x01 ; 1
|
|
f64: 8e e0 ldi r24, 0x0E ; 14
|
|
f66: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
f6a: 61 e0 ldi r22, 0x01 ; 1
|
|
f6c: 8f e0 ldi r24, 0x0F ; 15
|
|
f6e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
f72: 61 e0 ldi r22, 0x01 ; 1
|
|
f74: 80 e1 ldi r24, 0x10 ; 16
|
|
f76: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,HIGH);
|
|
f7a: 61 e0 ldi r22, 0x01 ; 1
|
|
f7c: 81 e1 ldi r24, 0x11 ; 17
|
|
f7e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,LOW);
|
|
f82: 60 e0 ldi r22, 0x00 ; 0
|
|
f84: 82 e1 ldi r24, 0x12 ; 18
|
|
f86: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,LOW);
|
|
f8a: 60 e0 ldi r22, 0x00 ; 0
|
|
f8c: 83 e1 ldi r24, 0x13 ; 19
|
|
f8e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
f92: 60 e0 ldi r22, 0x00 ; 0
|
|
f94: 87 e0 ldi r24, 0x07 ; 7
|
|
f96: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
f9a: 60 e0 ldi r22, 0x00 ; 0
|
|
f9c: 88 e0 ldi r24, 0x08 ; 8
|
|
f9e: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,550,100);
|
|
fa2: 86 e2 ldi r24, 0x26 ; 38
|
|
fa4: 92 e0 ldi r25, 0x02 ; 2
|
|
fa6: 88 cf rjmp .-240 ; 0xeb8 <main+0x326>
|
|
}
|
|
else if (reading >= 500){
|
|
fa8: 84 3f cpi r24, 0xF4 ; 244
|
|
faa: e1 e0 ldi r30, 0x01 ; 1
|
|
fac: 9e 07 cpc r25, r30
|
|
fae: 18 f1 brcs .+70 ; 0xff6 <main+0x464>
|
|
digitalWrite(LED1,HIGH);
|
|
fb0: 61 e0 ldi r22, 0x01 ; 1
|
|
fb2: 8e e0 ldi r24, 0x0E ; 14
|
|
fb4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
fb8: 61 e0 ldi r22, 0x01 ; 1
|
|
fba: 8f e0 ldi r24, 0x0F ; 15
|
|
fbc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,HIGH);
|
|
fc0: 61 e0 ldi r22, 0x01 ; 1
|
|
fc2: 80 e1 ldi r24, 0x10 ; 16
|
|
fc4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,LOW);
|
|
fc8: 60 e0 ldi r22, 0x00 ; 0
|
|
fca: 81 e1 ldi r24, 0x11 ; 17
|
|
fcc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,LOW);
|
|
fd0: 60 e0 ldi r22, 0x00 ; 0
|
|
fd2: 82 e1 ldi r24, 0x12 ; 18
|
|
fd4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,LOW);
|
|
fd8: 60 e0 ldi r22, 0x00 ; 0
|
|
fda: 83 e1 ldi r24, 0x13 ; 19
|
|
fdc: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
fe0: 60 e0 ldi r22, 0x00 ; 0
|
|
fe2: 87 e0 ldi r24, 0x07 ; 7
|
|
fe4: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
fe8: 60 e0 ldi r22, 0x00 ; 0
|
|
fea: 88 e0 ldi r24, 0x08 ; 8
|
|
fec: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,500,100);
|
|
ff0: 84 ef ldi r24, 0xF4 ; 244
|
|
ff2: 91 e0 ldi r25, 0x01 ; 1
|
|
ff4: 61 cf rjmp .-318 ; 0xeb8 <main+0x326>
|
|
}
|
|
else if (reading >= 410){
|
|
ff6: 8a 39 cpi r24, 0x9A ; 154
|
|
ff8: f1 e0 ldi r31, 0x01 ; 1
|
|
ffa: 9f 07 cpc r25, r31
|
|
ffc: 18 f1 brcs .+70 ; 0x1044 <main+0x4b2>
|
|
digitalWrite(LED1,HIGH);
|
|
ffe: 61 e0 ldi r22, 0x01 ; 1
|
|
1000: 8e e0 ldi r24, 0x0E ; 14
|
|
1002: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,HIGH);
|
|
1006: 61 e0 ldi r22, 0x01 ; 1
|
|
1008: 8f e0 ldi r24, 0x0F ; 15
|
|
100a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,LOW);
|
|
100e: 60 e0 ldi r22, 0x00 ; 0
|
|
1010: 80 e1 ldi r24, 0x10 ; 16
|
|
1012: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,LOW);
|
|
1016: 60 e0 ldi r22, 0x00 ; 0
|
|
1018: 81 e1 ldi r24, 0x11 ; 17
|
|
101a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,LOW);
|
|
101e: 60 e0 ldi r22, 0x00 ; 0
|
|
1020: 82 e1 ldi r24, 0x12 ; 18
|
|
1022: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,LOW);
|
|
1026: 60 e0 ldi r22, 0x00 ; 0
|
|
1028: 83 e1 ldi r24, 0x13 ; 19
|
|
102a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
102e: 60 e0 ldi r22, 0x00 ; 0
|
|
1030: 87 e0 ldi r24, 0x07 ; 7
|
|
1032: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
1036: 60 e0 ldi r22, 0x00 ; 0
|
|
1038: 88 e0 ldi r24, 0x08 ; 8
|
|
103a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
tone(SPKR,410,100);
|
|
103e: 8a e9 ldi r24, 0x9A ; 154
|
|
1040: 91 e0 ldi r25, 0x01 ; 1
|
|
1042: 3a cf rjmp .-396 ; 0xeb8 <main+0x326>
|
|
}
|
|
else if (reading >= 300){
|
|
1044: 8c 32 cpi r24, 0x2C ; 44
|
|
1046: 91 40 sbci r25, 0x01 ; 1
|
|
1048: 10 f0 brcs .+4 ; 0x104e <main+0x4bc>
|
|
digitalWrite(LED1,HIGH);
|
|
104a: 61 e0 ldi r22, 0x01 ; 1
|
|
104c: 01 c0 rjmp .+2 ; 0x1050 <main+0x4be>
|
|
digitalWrite(LED6,LOW);
|
|
digitalWrite(LED7,LOW);
|
|
digitalWrite(LED8,LOW);
|
|
}
|
|
else if (reading >= 0){
|
|
digitalWrite(LED1,LOW);
|
|
104e: 60 e0 ldi r22, 0x00 ; 0
|
|
1050: 8e e0 ldi r24, 0x0E ; 14
|
|
1052: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED2,LOW);
|
|
1056: 60 e0 ldi r22, 0x00 ; 0
|
|
1058: 8f e0 ldi r24, 0x0F ; 15
|
|
105a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED3,LOW);
|
|
105e: 60 e0 ldi r22, 0x00 ; 0
|
|
1060: 80 e1 ldi r24, 0x10 ; 16
|
|
1062: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED4,LOW);
|
|
1066: 60 e0 ldi r22, 0x00 ; 0
|
|
1068: 81 e1 ldi r24, 0x11 ; 17
|
|
106a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED5,LOW);
|
|
106e: 60 e0 ldi r22, 0x00 ; 0
|
|
1070: 82 e1 ldi r24, 0x12 ; 18
|
|
1072: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED6,LOW);
|
|
1076: 60 e0 ldi r22, 0x00 ; 0
|
|
1078: 83 e1 ldi r24, 0x13 ; 19
|
|
107a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED7,LOW);
|
|
107e: 60 e0 ldi r22, 0x00 ; 0
|
|
1080: 87 e0 ldi r24, 0x07 ; 7
|
|
1082: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
digitalWrite(LED8,LOW);
|
|
1086: 60 e0 ldi r22, 0x00 ; 0
|
|
1088: 88 e0 ldi r24, 0x08 ; 8
|
|
108a: 0e 94 d5 02 call 0x5aa ; 0x5aa <digitalWrite>
|
|
// put your main code here, to run repeatedly:
|
|
|
|
gasVAL = analogRead(Sensor);
|
|
Serial.println(gasVAL);
|
|
lightLED(gasVAL);
|
|
delay(30);
|
|
108e: 6e e1 ldi r22, 0x1E ; 30
|
|
1090: 70 e0 ldi r23, 0x00 ; 0
|
|
1092: 80 e0 ldi r24, 0x00 ; 0
|
|
1094: 90 e0 ldi r25, 0x00 ; 0
|
|
1096: 0e 94 47 03 call 0x68e ; 0x68e <delay>
|
|
|
|
setup();
|
|
|
|
for (;;) {
|
|
loop();
|
|
if (serialEventRun) serialEventRun();
|
|
109a: 0e 94 87 04 call 0x90e ; 0x90e <_Z14serialEventRunv>
|
|
109e: 8a ce rjmp .-748 ; 0xdb4 <main+0x222>
|
|
|
|
000010a0 <_GLOBAL__sub_I___vector_18>:
|
|
size_t printNumber(unsigned long, uint8_t);
|
|
size_t printFloat(double, uint8_t);
|
|
protected:
|
|
void setWriteError(int err = 1) { write_error = err; }
|
|
public:
|
|
Print() : write_error(0) {}
|
|
10a0: ed e3 ldi r30, 0x3D ; 61
|
|
10a2: f1 e0 ldi r31, 0x01 ; 1
|
|
10a4: 13 82 std Z+3, r1 ; 0x03
|
|
10a6: 12 82 std Z+2, r1 ; 0x02
|
|
public:
|
|
virtual int available() = 0;
|
|
virtual int read() = 0;
|
|
virtual int peek() = 0;
|
|
|
|
Stream() {_timeout=1000;}
|
|
10a8: 88 ee ldi r24, 0xE8 ; 232
|
|
10aa: 93 e0 ldi r25, 0x03 ; 3
|
|
10ac: a0 e0 ldi r26, 0x00 ; 0
|
|
10ae: b0 e0 ldi r27, 0x00 ; 0
|
|
10b0: 84 83 std Z+4, r24 ; 0x04
|
|
10b2: 95 83 std Z+5, r25 ; 0x05
|
|
10b4: a6 83 std Z+6, r26 ; 0x06
|
|
10b6: b7 83 std Z+7, r27 ; 0x07
|
|
volatile uint8_t *ucsrc, volatile uint8_t *udr) :
|
|
_ubrrh(ubrrh), _ubrrl(ubrrl),
|
|
_ucsra(ucsra), _ucsrb(ucsrb), _ucsrc(ucsrc),
|
|
_udr(udr),
|
|
_rx_buffer_head(0), _rx_buffer_tail(0),
|
|
_tx_buffer_head(0), _tx_buffer_tail(0)
|
|
10b8: 85 e0 ldi r24, 0x05 ; 5
|
|
10ba: 91 e0 ldi r25, 0x01 ; 1
|
|
10bc: 91 83 std Z+1, r25 ; 0x01
|
|
10be: 80 83 st Z, r24
|
|
10c0: 85 ec ldi r24, 0xC5 ; 197
|
|
10c2: 90 e0 ldi r25, 0x00 ; 0
|
|
10c4: 95 87 std Z+13, r25 ; 0x0d
|
|
10c6: 84 87 std Z+12, r24 ; 0x0c
|
|
10c8: 84 ec ldi r24, 0xC4 ; 196
|
|
10ca: 90 e0 ldi r25, 0x00 ; 0
|
|
10cc: 97 87 std Z+15, r25 ; 0x0f
|
|
10ce: 86 87 std Z+14, r24 ; 0x0e
|
|
10d0: 80 ec ldi r24, 0xC0 ; 192
|
|
10d2: 90 e0 ldi r25, 0x00 ; 0
|
|
10d4: 91 8b std Z+17, r25 ; 0x11
|
|
10d6: 80 8b std Z+16, r24 ; 0x10
|
|
10d8: 81 ec ldi r24, 0xC1 ; 193
|
|
10da: 90 e0 ldi r25, 0x00 ; 0
|
|
10dc: 93 8b std Z+19, r25 ; 0x13
|
|
10de: 82 8b std Z+18, r24 ; 0x12
|
|
10e0: 82 ec ldi r24, 0xC2 ; 194
|
|
10e2: 90 e0 ldi r25, 0x00 ; 0
|
|
10e4: 95 8b std Z+21, r25 ; 0x15
|
|
10e6: 84 8b std Z+20, r24 ; 0x14
|
|
10e8: 86 ec ldi r24, 0xC6 ; 198
|
|
10ea: 90 e0 ldi r25, 0x00 ; 0
|
|
10ec: 97 8b std Z+23, r25 ; 0x17
|
|
10ee: 86 8b std Z+22, r24 ; 0x16
|
|
10f0: 11 8e std Z+25, r1 ; 0x19
|
|
10f2: 12 8e std Z+26, r1 ; 0x1a
|
|
10f4: 13 8e std Z+27, r1 ; 0x1b
|
|
10f6: 14 8e std Z+28, r1 ; 0x1c
|
|
10f8: 08 95 ret
|
|
|
|
000010fa <__udivmodsi4>:
|
|
10fa: a1 e2 ldi r26, 0x21 ; 33
|
|
10fc: 1a 2e mov r1, r26
|
|
10fe: aa 1b sub r26, r26
|
|
1100: bb 1b sub r27, r27
|
|
1102: fd 01 movw r30, r26
|
|
1104: 0d c0 rjmp .+26 ; 0x1120 <__udivmodsi4_ep>
|
|
|
|
00001106 <__udivmodsi4_loop>:
|
|
1106: aa 1f adc r26, r26
|
|
1108: bb 1f adc r27, r27
|
|
110a: ee 1f adc r30, r30
|
|
110c: ff 1f adc r31, r31
|
|
110e: a2 17 cp r26, r18
|
|
1110: b3 07 cpc r27, r19
|
|
1112: e4 07 cpc r30, r20
|
|
1114: f5 07 cpc r31, r21
|
|
1116: 20 f0 brcs .+8 ; 0x1120 <__udivmodsi4_ep>
|
|
1118: a2 1b sub r26, r18
|
|
111a: b3 0b sbc r27, r19
|
|
111c: e4 0b sbc r30, r20
|
|
111e: f5 0b sbc r31, r21
|
|
|
|
00001120 <__udivmodsi4_ep>:
|
|
1120: 66 1f adc r22, r22
|
|
1122: 77 1f adc r23, r23
|
|
1124: 88 1f adc r24, r24
|
|
1126: 99 1f adc r25, r25
|
|
1128: 1a 94 dec r1
|
|
112a: 69 f7 brne .-38 ; 0x1106 <__udivmodsi4_loop>
|
|
112c: 60 95 com r22
|
|
112e: 70 95 com r23
|
|
1130: 80 95 com r24
|
|
1132: 90 95 com r25
|
|
1134: 9b 01 movw r18, r22
|
|
1136: ac 01 movw r20, r24
|
|
1138: bd 01 movw r22, r26
|
|
113a: cf 01 movw r24, r30
|
|
113c: 08 95 ret
|
|
|
|
0000113e <__divmodsi4>:
|
|
113e: 05 2e mov r0, r21
|
|
1140: 97 fb bst r25, 7
|
|
1142: 1e f4 brtc .+6 ; 0x114a <__divmodsi4+0xc>
|
|
1144: 00 94 com r0
|
|
1146: 0e 94 b6 08 call 0x116c ; 0x116c <__negsi2>
|
|
114a: 57 fd sbrc r21, 7
|
|
114c: 07 d0 rcall .+14 ; 0x115c <__divmodsi4_neg2>
|
|
114e: 0e 94 7d 08 call 0x10fa ; 0x10fa <__udivmodsi4>
|
|
1152: 07 fc sbrc r0, 7
|
|
1154: 03 d0 rcall .+6 ; 0x115c <__divmodsi4_neg2>
|
|
1156: 4e f4 brtc .+18 ; 0x116a <__divmodsi4_exit>
|
|
1158: 0c 94 b6 08 jmp 0x116c ; 0x116c <__negsi2>
|
|
|
|
0000115c <__divmodsi4_neg2>:
|
|
115c: 50 95 com r21
|
|
115e: 40 95 com r20
|
|
1160: 30 95 com r19
|
|
1162: 21 95 neg r18
|
|
1164: 3f 4f sbci r19, 0xFF ; 255
|
|
1166: 4f 4f sbci r20, 0xFF ; 255
|
|
1168: 5f 4f sbci r21, 0xFF ; 255
|
|
|
|
0000116a <__divmodsi4_exit>:
|
|
116a: 08 95 ret
|
|
|
|
0000116c <__negsi2>:
|
|
116c: 90 95 com r25
|
|
116e: 80 95 com r24
|
|
1170: 70 95 com r23
|
|
1172: 61 95 neg r22
|
|
1174: 7f 4f sbci r23, 0xFF ; 255
|
|
1176: 8f 4f sbci r24, 0xFF ; 255
|
|
1178: 9f 4f sbci r25, 0xFF ; 255
|
|
117a: 08 95 ret
|
|
|
|
0000117c <__umulhisi3>:
|
|
117c: a2 9f mul r26, r18
|
|
117e: b0 01 movw r22, r0
|
|
1180: b3 9f mul r27, r19
|
|
1182: c0 01 movw r24, r0
|
|
1184: a3 9f mul r26, r19
|
|
1186: 70 0d add r23, r0
|
|
1188: 81 1d adc r24, r1
|
|
118a: 11 24 eor r1, r1
|
|
118c: 91 1d adc r25, r1
|
|
118e: b2 9f mul r27, r18
|
|
1190: 70 0d add r23, r0
|
|
1192: 81 1d adc r24, r1
|
|
1194: 11 24 eor r1, r1
|
|
1196: 91 1d adc r25, r1
|
|
1198: 08 95 ret
|
|
|
|
0000119a <__tablejump2__>:
|
|
119a: ee 0f add r30, r30
|
|
119c: ff 1f adc r31, r31
|
|
119e: 05 90 lpm r0, Z+
|
|
11a0: f4 91 lpm r31, Z
|
|
11a2: e0 2d mov r30, r0
|
|
11a4: 09 94 ijmp
|
|
|
|
000011a6 <abort>:
|
|
11a6: 81 e0 ldi r24, 0x01 ; 1
|
|
11a8: 90 e0 ldi r25, 0x00 ; 0
|
|
11aa: f8 94 cli
|
|
11ac: 0c 94 d8 08 jmp 0x11b0 ; 0x11b0 <_exit>
|
|
|
|
000011b0 <_exit>:
|
|
11b0: f8 94 cli
|
|
|
|
000011b2 <__stop_program>:
|
|
11b2: ff cf rjmp .-2 ; 0x11b2 <__stop_program>
|