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-
- <h1>Compiler Options</h1>
-
- <p class="whs1">The Compiler
- Options page provides all the fitter options settings for the device family
- the fitter has selected.</p>
-
- <h1 class="whs2">Fitter Options</h1>
-
- <p class="whs3"><a href="#Basic Tab"
- style="font-family: arial, sans-serif; font-size: 10pt;"><span
- style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Basic Tab</a></FONT></span></p>
-
- <p class="whs4"><a href="#XPLA Advanced Options"
- style="font-family: arial, sans-serif; font-size: 10pt;"><span
- style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">XPLA3 Advanced
- Options</a></FONT></span></p>
-
- <p class="whs5"><a href="#CoolRunner-II Advanced Options"
- style="font-family: arial, sans-serif; font-size: 10pt;"><span
- style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">CoolRunner-II
- Advanced Options</a></FONT></span></p>
-
- <p class="whs6"><a href="#XC9500/XL/XV Advanced Options"
- style="font-family: arial, sans-serif; font-size: 10pt;">XC9500/XL/XV
- Advanced Options</a></p>
-
- <h2 class="whs7"><a name="Basic Tab"></a>Basic
- Tab</h2>
-
- <p class=whs1
- style="font-family: arial, sans-serif; font-size: 10pt;">The CPLD devices
- have the following fitter <span style="font-weight: bold;"><B><b>Implementation
- Options </B></span><span style="font-weight: bold;"><B>available</B></span></b> in
- the <span style="font-weight: bold;"><B>Basic</B></span> tab:</p>
-
- <ul>
-
- <li class=kadov-h4><h4 class="whs8">Use
- Multi-Level Logic Optimization</h4></li>
- </ul>
-
- <p class="whs9">This option simplifies the total number
- of logic expressions in a design, and then collapses the logic in order
- to meet user objectives such as density, speed and timing constraints.
- This optimization targets CPLD architecture, making it possible to collapse
- to the macrocell limits, reduce levels of logic, and minimize the total
- number of p-terms.</p>
-
- <p class="whs10">Multi-level Logic Optimization optimizes
- all combinatorial logic arcs spanning from an input pad or register output
- to an output pad or register input.</p>
-
- <p class="whs11">Multi-level Logic Optimization operates
- on combinatorial logic according to the following rules.</p>
-
- <p class="whs12">If timing constraints are set, the program
- optimizes for speed to meet timing constraints.</p>
-
- <p class="whs13">If timing constraints are not set, the
- program optimizes either for speed or density, depending on the user setting
- for the <span style="font-weight: bold;"><B>Use Timing Optimization</B></span>
- option.</p>
-
- <ul>
-
- <ul class=whs1
- style="list-style: disc;"
- type=disc>
-
- <ul class=whs2
- style="list-style: circle;"
- type=circle>
-
- <li class=kadov-p><p class="whs14">If
- <span style="font-weight: bold;"><B>Use Timing Optimization</B></span> is turned
- on, the combinatorial logic will be mapped for speed.</p></li>
-
- <li class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial; font-size: 10pt;">If
- <span style="font-weight: bold;"><B>Use Timing Optimization</B></span> is turned
- off, the combinatorial logic will be mapped for density. The goal of optimization
- will then be to reduce the total number of p-terms.</p></li>
- </ul>
- </ul>
- </ul>
-
- <p class="whs15"><font style="font-family: arial; font-size: 10pt;"
- face=arial
- size=2><span style="font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Logic
- marked with the </FONT></span><span style="font-weight: bold;"><B><b style="font-size: 10pt;">NOREDUCE</b></B></span><span
- style="font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;"> property will not be extracted or optimized.</FONT></span></font></p>
-
- <p class=whs3
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;
- margin-left: 40px;"><span style="font-family: arial; font-weight: normal;">By
- default, this option is on.</span> </p>
-
- <ul>
-
- <li class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;"><b style="font-weight: bold;"><span
- style="font-weight: bold;"><B>Use Timing Constraints -- </B></span><span style="font-weight: normal;">This
- option instructs the fitter use Timing Constraints when fitting the design.
- <!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}-->If this
- box is not checked, the fitter will ignore timing constraints, if necessary.</span></b></p></li>
-
- <li class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial, sans-serif; font-size: 10pt;"><b
- style="font-weight: bold;"><span style="font-weight: bold;"><B>Enable WYSIWYG
- Mode -- (CoolRunner only) </B></span><span style="font-weight: normal;">T</span></b>he
- goal of the WYSIWYG options is to have a netlist reflect the user's specifications,
- as much as possible. All the nodes declared in the HDL design are preserved.
- By default, this property is set to Off (Checkbox is not checked) When
- this property is On (checkbox is checked), XST:</p></li>
-
- <ul>
-
- <li style="list-style: circle;"
- type=circle
- class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial, sans-serif; font-size: 10pt;">Preserves
- all the user internal signals (nodes)</p></li>
-
- <li style="list-style: circle;"
- type=circle
- class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial, sans-serif; font-size: 10pt;">Creates
- source_node constraints in NGC file for all these nodes.</p></li>
-
- <li style="list-style: circle;"
- type=circle
- class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial, sans-serif; font-size: 10pt;">Skips
- the design optimization (collapse, factorization). Only the Boolean equation
- minimization is performed.</p></li>
- </ul>
-
- <li class=kadov-p-Cwhs3><p class=whs3
- style="font-family: arial, sans-serif; font-size: 10pt;"><b><span
- style="font-weight: bold;"><B>Optimization Style</B></span></b>-- The Optimization
- Method allows you to select from one of two basic optimization strategies:
- <span style="font-weight: bold;"><B><b>Density</b></B></span> or <span style="font-weight: bold;"><B><b>Speed</b></B></span>.
- <span style="font-weight: bold;"><B><b>Density</b></B></span> focuses on solely
- on density, and <span style="font-weight: bold;"><B><b>Speed</b></B></span> focuses
- solely on speed.</p></li>
-
- <li class=kadov-p><p class="whs16"><span
- style="font-weight: bold;"><B>Location Constraints</B></span> -- The Try selection
- will attempt to fit the design with the pin assignments specified in the
- design source. If the design cannot be fit with these pin assignments,
- the fitter will remove the location constraints and attempt to fit the
- design with no location constraints. A warning message will tell the user
- if the location constraints have been removed.</p></li>
-
- <ul class=whs5
- style="list-style: circle;"
- type=circle>
-
- <li class=kadov-p><p class="whs17">The
- <span style="font-weight: bold;"><B><b>Try</b></B></span> selection will attempt
- to fit the design with the pin assignments specified in the design source.
- If the design cannot be fit with these pin assignments, the fitter will
- ignore the pin assignments.</p></li>
- </ul>
-
- <li style="list-style: circle;"
- type=circle
- class=kadov-p-Cwhs6><p class=whs6
- style="font-family: arial, sans-serif; font-size: 10pt;">The
- <span style="font-weight: bold;"><B>On </B></span>selection will attempt to fit
- the design with the pin assignments specified in the design source. If
- the design cannot be fit with these pin assignments, the fitter will notify
- the user that the device could not fit. It will not unlock the pins under
- this option.</p></li>
-
- <li style="list-style: circle;"
- type=circle
- class=kadov-p-Cwhs7><p class=whs7
- style="font-family: arial, sans-serif; font-size: 10pt;">The
- <span style="font-weight: bold;"><B>Off</B></span> selection will attempt to
- fit the design and will ignore the pin assignments specified in the design
- source. If the design can be fit with no pre-assigned pins, the fitter
- will assign pins, which can be viewed in the fitter report (filename.fit).
- The user should take these pin assignments and incorporate them back into
- the design source file. The user will be notified whether the fitting
- operation was successful.</p></li>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;"><b><span style="font-weight: bold;"><B>Output
- Slew Rate -- </B></span></b><span style="font-weight: normal;">Use this option
- to control the default output slew rate. You can control the transition
- time of device output pins by setting the slew rate to Slow or Fast. Limiting
- the slew rate (Slow) reduces output switching surges in the device. The
- default is Fast.</span></p></li>
- </ul>
-
- <p class="whs18"><span style="font-weight: bold;"><B>Note</B></span>:
- Any explicit slew rate control properties in the design or constraints
- file take precedence over this Output Slew Rate setting. </p>
-
- <ul>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;"><b style="font-weight: bold;"><span
- style="font-weight: bold;"><B>FF Initial State -- </B></span><span style="font-weight: normal;">Sets
- the initial state for all Flip-Flops. <!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}-->The
- options are Low, High and FPGA.</span></b></p></li>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;"><b><span style="font-weight: bold;"><B>Collapsing
- P-Term Limit -- </B></span></b><span style="font-weight: normal;">This option
- controls the degree to which the fitter flattens a design netlist. A logic
- gate can collapse forward into a subsequent gate only if the number of
- product terms in the resulting logic function does not exceed the p-term
- limit. If the path delay of a logic function is not acceptable, increase
- the p-term limit to allow the larger functions to be further flattened.
- Choose a number from 3 to 48.</span> </p></li>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;"><b><span style="font-weight: bold;"><B>Collapsing
- Input Limit -- </B></span></b><span style="font-weight: normal;">This is a
- secondary option for controlling the degree to which the fitter flattens
- a design netlist. A logic gate can collapse forward into a subsequent
- gate only if the number of inputs in the resulting logic function does
- not exceed the input limit. If the design fails to fit the target device
- because flattening uses up too many of the function block inputs, decrease
- the input limit to prevent flattening of certain high fan-in functions.
- </span><!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}--></p></li>
- </ul>
-
- <h2 class="whs19"><b><span
- style="font-weight: bold;"><B><a name="XPLA Advanced Options"></a>XPLA Advanced
- Options</B></span></b></h2>
-
- <p class="whs20"><b><span style="font-weight: normal;">The
- following options are available under XPLA </span><span style="font-weight: bold;"><B>Implementation
- Options</B></span><span style="font-weight: normal;">, </span><span style="font-weight: bold;"><B>Advanced</B></span><span
- style="font-weight: normal;"> tab.</span></b></p>
-
- <ul>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;">Enable Fast
- Input Registers -<span style="font-weight: normal;">- Enables the use
- of the Fast Input path in XPLA3 devices.</span></p></li>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif;
- font-size: 10pt;
- font-weight: bold;">Enable Use
- of Foldback NANDs -- <span style="font-weight: normal;">When selected,
- the software will use foldback NANDs. This increases the capability to
- fit a design, sometimes at the expense of speed.</span></p></li>
-
- <li class=kadov-p-Cwhs8><p class=whs8
- style="font-family: arial, sans-serif; font-size: 10pt;"><span
- style="font-weight: bold;"><B>Reserve JTAG Pins for ISP -- </B></span>Checking
- this box will instruct the fitter to reserve JTAG pins.</p></li>
- </ul>
-
- <h2 class="whs21"><a name="CoolRunner-II Advanced Options"></a>CoolRunner-II
- Advanced Options</h2>
-
- <p class="whs22">The following
- options are found under the Advanced tab for CoolRunner-II devices.</p>
-
- <ul type="disc" class="whs23">
-
- <li class=kadov-h4><h4 class="whs24">Use
- Global Clock(s) -- <span style="font-weight: normal;">Select this option
- to allow the fitter to assign input pins used as clocks to dedicated global
- clock (GCK) pins of the device. If this option is disabled, only pins
- identified with the BUFG=CLK property in the design (or UCF file) will
- be assigned to GCK device pins. By default, this option is on.</span>
- </h4></li>
-
- <li class=kadov-p><p class="whs25"><span
- style="font-weight: bold;"><B>Use Global Output Enable(s)</B></span> -- Select
- this option to allow the fitter to assign input pins used as output enable
- control to dedicated global OE (GTS) pins of the device. If this option
- is disabled, only pins identified with the BUFG=OE property in the design
- (or UCF file) will be assigned to GTS device pins. By default, this option
- is on. </p></li>
-
- <li class=kadov-p><p class="whs26"><span
- style="font-weight: bold;"><B>Use Global Set/Reset</B></span> -- Select this
- option to allow the fitter to assign input pins used as register asynchronous
- reset or preset control to the dedicated global set/reset (GSR) pin of
- the device. If this option is disabled, only a pin identified with the
- BUFG=SR property in the design (or UCF file) will be assigned to the GSR
- device pin. By default, this option is on.</p></li>
-
- <li class=kadov-p><p class="whs27"><span
- style="font-weight: bold;"><B>Enable Fast Input Registers</B></span> -- Enables
- fast input registers.</p></li>
-
- <li class=kadov-p><p class="whs28"><span
- style="font-weight: bold;"><B>Ignore DATA_GATE Attributes</B></span> -- Data
- Gate is a power saving property that can be used in CoolRunner-II designs.
- <!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}-->This option
- allows you to turn Data Gate off in case you want the fitter to ignore
- data gate.</p></li>
-
- <li class=kadov-p><p class="whs29"><span
- style="font-weight: bold;"><B>Tristate Outputs Termination Node</B></span> --
- The Tristate Output Termination Mode globally sets all tristate outputs
- to the specified termination mode. By default, this field is set to Pullup..
- <!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}-->The options
- are Pullup, Keeper and Float.</p></li>
-
- <li class=kadov-p><p class="whs30"><span
- style="font-weight: bold;"><B>Create Programmable Ground Pins on Unused I/O</B></span>
- -- The Create Programmable GND Pins on Unused I/O property controls the
- option to indicate that you want all unused I/O pads to be configured
- as ground pins. This can reduce ground bounce. By default, this option
- is set to ground. <!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}-->The
- options are Ground, Pullup, Keeper and Float.</p></li>
-
- <li class=kadov-p>
- <p class="whs31"><span style="font-weight: bold;"><B>Default
- Output Voltage Standard</B></span> -- set a default voltage standard for CoolRunner-II
- device pins.</p>
-
- <p class="whs32">IOSTANDARD
- names supported by CoolRunner-II are:</p>
-
- <!--(Table)=====================================================-->
- <table x-use-null-cells width="84.797%" cellspacing="0" class="whs33">
- <col class="whs34">
- <col class="whs35">
- <col class="whs36">
- <col class="whs37">
-
- <tr valign=top>
- <td width="20.209%" class="whs38">
- <p class="whs39">I/O Standard</td>
- <td width="16.192%" class="whs40">
- <p align="center" class="whs41">VCC<span style="vertical-align: Sub;">IO</span></td>
- <td width="22.217%" class="whs42">
- <p align="center" class="whs43">Input V<span style="vertical-align: Sub;">REF</span></td>
- <td width="41.383%" class="whs44">
- <p align="center" class="whs45">Board Termination Voltage (V<span style="vertical-align: Sub;">TT</span>)</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs46">
- <p class="whs47">LVTTL </td>
- <td width="16.192%" class="whs48">
- <p align="center" class="whs49">3.3V</td>
- <td width="22.217%" class="whs50">
- <p align="center" class="whs51">N/A</td>
- <td width="41.383%" class="whs52">
- <p align="center" class="whs53">N/A</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs54">
- <p class="whs55">LVCMOS33</td>
- <td width="16.192%" class="whs56">
- <p align="center" class="whs57">3.3V</td>
- <td width="22.217%" class="whs58">
- <p align="center" class="whs59">N/A</td>
- <td width="41.383%" class="whs60">
- <p align="center" class="whs61">N/A</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs62">
- <p class="whs63">LVCMOS25</td>
- <td width="16.192%" class="whs64">
- <p align="center" class="whs65">2.5V</td>
- <td width="22.217%" class="whs66">
- <p align="center" class="whs67">N/A</td>
- <td width="41.383%" class="whs68">
- <p align="center" class="whs69">N/A</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs70">
- <p class="whs71">LVCMOS18</td>
- <td width="16.192%" class="whs72">
- <p align="center" class="whs73">1.8V</td>
- <td width="22.217%" class="whs74">
- <p align="center" class="whs75">N/A</td>
- <td width="41.383%" class="whs76">
- <p align="center" class="whs77">N/A</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs78">
- <p class="whs79">LVCMOS15</td>
- <td width="16.192%" class="whs80">
- <p align="center" class="whs81">1.5V</td>
- <td width="22.217%" class="whs82">
- <p align="center" class="whs83">N/A</td>
- <td width="41.383%" class="whs84">
- <p align="center" class="whs85">N/A</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs86">
- <p class="whs87">HSTL_I</td>
- <td width="16.192%" class="whs88">
- <p align="center" class="whs89">1.5V</td>
- <td width="22.217%" class="whs90">
- <p align="center" class="whs91">0.75V</td>
- <td width="41.383%" class="whs92">
- <p align="center" class="whs93">0.75V</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs94">
- <p class="whs95">SSTL2_I</td>
- <td width="16.192%" class="whs96">
- <p align="center" class="whs97">2.5V</td>
- <td width="22.217%" class="whs98">
- <p align="center" class="whs99">1.25V</td>
- <td width="41.383%" class="whs100">
- <p align="center" class="whs101">1.25V</td></tr>
-
- <tr valign=top>
- <td width="20.209%" class="whs102">
- <p class="whs103">SSTL3_I</td>
- <td width="16.192%" class="whs104">
- <p align="center" class="whs105">3.3V</td>
- <td width="22.217%" class="whs106">
- <p align="center" class="whs107">1.5V</td>
- <td width="41.383%" class="whs108">
- <p align="center" class="whs109">1.5V</td></tr>
- </table>
-
- <p class="whs110">The software
- automatically groups outputs with similar IOSTANDARD settings into the
- same bank when no location constraints are specified. </p>
- </li>
- </ul>
-
- <h2 class="whs111"><a name="XC9500/XL/XV Advanced Options"></a>XC9500/XL/XV
- Advanced Options</h2>
-
- <p class="whs112">The following
- options are found under the Advanced tab for XC9500/XL/XV. <!--kadov_tag{{<spaces>}}--> <!--kadov_tag{{</spaces>}}-->Note
- that additional options for XC9500 only are also described below.</p>
-
- <ul type="disc" class="whs113">
-
- <li class=kadov-h4><h4 class="whs114">Use
- Global Clock(s) -- <span style="font-weight: normal;">Select this option
- to allow the fitter to assign input pins used as clocks to dedicated global
- clock (GCK) pins of the device. If this option is disabled, only pins
- identified with the BUFG=CLK property in the design (or UCF file) will
- be assigned to GCK device pins. By default, this option is on.</span>
- </h4></li>
-
- <li class=kadov-p><p class="whs115"><span
- style="font-weight: bold;"><B>Use Global Output Enable(s)</B></span> -- Select
- this option to allow the fitter to assign input pins used as output enable
- control to dedicated global OE (GTS) pins of the device. If this option
- is disabled, only pins identified with the BUFG=OE property in the design
- (or UCF file) will be assigned to GTS device pins. By default, this option
- is on. </p></li>
-
- <li class=kadov-p><p class="whs116"><span
- style="font-weight: bold;"><B>Use Global Set/Reset</B></span> -- Select this
- option to allow the fitter to assign input pins used as register asynchronous
- reset or preset control to the dedicated global set/reset (GSR) pin of
- the device. If this option is disabled, only a pin identified with the
- BUFG=SR property in the design (or UCF file) will be assigned to the GSR
- device pin. By default, this option is on.</p></li>
-
- <li class=kadov-p><p class="whs117"><span
- style="font-weight: bold;"><B>Create Programmable Ground Pins on Unused I/O</B></span>
- -- Select this option to indicate that you want all unused I/O pads to
- be configured as ground pins. This can reduce ground bounce. By default,
- this option is off.</p></li>
-
- <li class=kadov-p><p class="whs118"><span
- style="font-weight: bold;"><B>Macrocell Power Setting</B></span> -- Use this
- option to control device power consumption. Select Low or Standard to
- set the default power mode for the macrocells used to implement the design.
- Select Timing Driven to automatically reduce power on paths covered by
- timing specifications that can meet speed requirements while operating
- in low power. The default is Standard, which results in highest speed.</p></li>
- </ul>
-
- <p class="whs119">Note: Any explicit power control (PWR_MODE)
- properties in the design or constraints file take precedence over this
- Macrocell Power Setting. </p>
-
- <ul type="disc" class="whs120">
-
- <li class=kadov-p><p class="whs121"><span
- style="font-weight: bold;"><B>Enable FASTConnect/UIM Optimization (XC9500
- only)</B></span> -- Enables optimization of the FASTConnect/UIM for XC9500
- devices.</p></li>
-
- <li class=kadov-h4><h4 class="whs122">Use
- Local Feedback (XC9500 only)</h4></li>
- </ul>
-
- <p class="whs123">Select this option to enable the software
- to use local macrocell feedback whenever possible. The local feedback
- path, running from each macrocell output to an input of the same function
- block, has shorter propagation delay than the global feedback path. The
- fitter always tries to use local macrocell feedback (if possible) to satisfy
- timing constraints. This option allows the fitter to use local feedback
- to generally improve timing on remaining paths. Using local feedback can
- speed up your design but could also make it difficult to maintain the
- same timing after a design change. By default, this option is on.</p>
-
-
- <!--(HR)============================================================-->
- <hr class=whs4
- style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
- align=center>
-
-
- <p class="whs124"><b><span style="font-weight: bold;"><B>Note:
- </B></span></b>To force the fitter to use local feedback, manually map both
- the source and load functions into the same function block using the property
- <span style="font-weight: bold;"><B><b>LOC=FB</b></B></span><span style="font-style: italic;"><I><i>nn</i></I></span>,
- then apply a timespec across the path. </p>
-
-
- <!--(HR)============================================================-->
- <hr class=whs5
- style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
- align=center>
-
-
- <p class="whs125"><span><FONT SIZE=2 style="font-size:10pt;"><b style="font-weight: bold;">Note:
- </b></FONT></span>The XC9536 device does not have local feedback.</p>
-
-
- <!--(HR)============================================================-->
- <hr class=whs6
- style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
- align=center>
-
-
- <ul type="disc" class="whs126">
-
- <li class=kadov-h4><h4 class="whs127">Use
- Pin Feedback (XC9500 only)</h4></li>
- </ul>
-
- <p class="whs128">Select this option to enable the software
- to use I/O pin feedback whenever possible. The pin feedback path has slightly
- shorter propagation delay than the global feedback path. If this option
- is enabled, the software uses the pin feedback path instead of the global
- feedback path for macrocell signals that do not drive 3-state outputs
- or slew-rate-limited outputs, and where the associated I/O pin is not
- used as input-only. By default, this option is on.</p>
-
- </body>
-
- </html>
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