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3 years ago
  1. \relax
  2. \@writefile{toc}{\contentsline {section}{\numberline {1}60Hz Divider}{1}}
  3. \@writefile{toc}{\contentsline {subsection}{\numberline {1.1}Overview}{1}}
  4. \@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces 60 Hz Logic Divider to 1Hz\relax }}{2}}
  5. \@writefile{toc}{\contentsline {subsection}{\numberline {1.2}Initial Notes: Counting the Hz}{2}}
  6. \@writefile{toc}{\contentsline {subsection}{\numberline {1.3}MAX7219 8 digit 7 LED segment Display Driver}{2}}
  7. \@writefile{toc}{\contentsline {subsection}{\numberline {1.4}CPLD Programming}{3}}
  8. \@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.1}6KHz clock}{3}}
  9. \@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.2}UART output}{3}}
  10. \@writefile{toc}{\contentsline {subsection}{\numberline {1.5}Divide by N Counters}{4}}
  11. \@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces This divide by 6 counter, appears to not line up with what the TTL Cookbook has for a similar 7490 one.\relax }}{4}}
  12. \@writefile{toc}{\contentsline {subsection}{\numberline {1.6}Attiny 6KHz Clock}{5}}
  13. \@writefile{toc}{\contentsline {subsection}{\numberline {1.7}Parsing of CPLD UART Stream}{5}}
  14. \@writefile{toc}{\contentsline {subsection}{\numberline {1.8}Max7219 8 digit 7-Segment Display via Uno}{6}}
  15. \@writefile{toc}{\contentsline {section}{\numberline {2}Project Rev A Complete}{7}}