Electronics_Projects_2020/60hz_Divider/docs/17.toc

\contentsline {section}{\numberline {1}60Hz Divider}{1}
\contentsline {subsection}{\numberline {1.1}Overview}{1}
\contentsline {subsection}{\numberline {1.2}Initial Notes: Counting the Hz}{2}
\contentsline {subsection}{\numberline {1.3}MAX7219 8 digit 7 LED segment Display Driver}{2}
\contentsline {subsection}{\numberline {1.4}CPLD Programming}{3}
\contentsline {subsubsection}{\numberline {1.4.1}6KHz clock}{3}
\contentsline {subsubsection}{\numberline {1.4.2}UART output}{3}
\contentsline {subsection}{\numberline {1.5}Divide by N Counters}{4}
\contentsline {subsection}{\numberline {1.6}Attiny 6KHz Clock}{5}
\contentsline {subsection}{\numberline {1.7}Parsing of CPLD UART Stream}{5}
\contentsline {subsection}{\numberline {1.8}Max7219 8 digit 7-Segment Display via Uno}{6}
\contentsline {section}{\numberline {2}Project Rev A Complete}{7}