Electronics_Projects_2020/Lattice_Icestorm/code/test2/build.sh

#!/bin/bash -x
#adapted from https://github.com/leedowthwaite/HelloIce
#changes: separate folder for dev files
#simplified bash script
#added vhdl2verilog per: https://github.com/4ilo/Ice40-vhdl-example

mkdir txtbin
echo convert vhdl to verilog
	./vhd2vl_bin $1.vhd $1.v
echo Using yosys to synthesize design
	yosys -p "synth_ice40 -blif txtbin/$1.blif" ./$1.v 
echo Place and route with arachne-pnr
	arachne-pnr -d 1k -p icestick.pcf txtbin/$1.blif -o txtbin/$1.txt
echo Converting ASCII output to bitstream
	icepack txtbin/$1.txt txtbin/$1.bin
echo Sending bitstream to device
	iceprog ${ICEPROG_ARGS} txtbin/$1.bin