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27 lines
626 B
27 lines
626 B
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-- VHDL Instantiation Created from source file counta.vhd -- 01:07:15 07/14/2020
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--
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-- Notes:
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-- 1) This instantiation template has been automatically generated using types
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-- std_logic and std_logic_vector for the ports of the instantiated module
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-- 2) To use this template to instantiate this entity, cut-and-paste and then edit
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COMPONENT counta
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PORT(
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XSTALIN : IN std_logic;
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HZIN : IN std_logic;
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SWITCH : IN std_logic;
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LED : OUT std_logic_vector(7 downto 0);
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TX : OUT std_logic
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);
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END COMPONENT;
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Inst_counta: counta PORT MAP(
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XSTALIN => ,
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HZIN => ,
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SWITCH => ,
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LED => ,
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TX =>
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);
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