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\OT1/cmr/m/n/10.95 Reference: http://maxembedded.com/2011/06/port-operations-in \OT1/cmr/m/n/10.95 Reference: http://maxembedded.com/2011/06/port-operations-in
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@ -67,8 +67,25 @@ Some of the lines have to be edited to allow for all digits to be read, and
also to lower intensity of display. I think also a component package (dark also to lower intensity of display. I think also a component package (dark
grey clear plastic bag) in front of the leds with intensity 1 is about right. grey clear plastic bag) in front of the leds with intensity 1 is about right.
\subsection{CPLDs}
\begin{verbatim}
http://dangerousprototypes.com/docs/Xilinx_CPLDs:_XC9500_vs_CoolRunner-II
https://www.eevblog.com/forum/fpga/what-are-cplds-do-they-still-play-a-role-how-to-program-them/msg3084581/#msg3084581
https://www.seeedstudio.com/XC9572XL-CPLD-development-board-v1b-p-799.html
\end{verbatim}
dangerous prototypes has a few
including the xc2, the xc95, and the coolrunner.
i wanted xc95, so they have one for \$12. not bad.
looks like bus pirate can program... But I ended up using a Xilinx USB Platform Cable.
\subsection{CPLD Programming} \subsection{CPLD Programming}
Using the XC9500XL series. This chip has some limitations - which are good. Using the XC9500XL series. This chip has some limitations - which are good.
As you get faster clocks, you need bigger registers to handle parsing the clocks. Bigger registers, use more power. Maybe this is one reason why high clock speeds mean more power. As you get faster clocks, you need bigger registers to handle parsing the clocks. Bigger registers, use more power. Maybe this is one reason why high clock speeds mean more power.

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[]
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[]
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\documentclass[11pt]{article}
%Gummi|065|=)
\usepackage{graphicx}
\usepackage{caption}
\usepackage{xcolor}
\usepackage[vcentering,dvips]{geometry}
\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
%\maketitle
\tableofcontents
\textcolor{green!60!blue!70}{
\section{60Hz Divider}}
\subsection{Overview}
Let's count. There is a schematic in Practical Electronics For Beginners 4th edition. I've built that up, and will add some CPLD counter logic, along with a micro to output the SPI to a 7seg counter module.
The goal is relative accuracy. Not absolute. No GPS here. I'm going from 60 to 6,000 cycles.\footnote{Due to limitations of CPLD} This is just meant to be fun.
\begin{center}
\includegraphics[scale=0.15]{../pics/DSCN2964.JPG}
\captionof{figure}{60 Hz Logic Divider to 1Hz}
\end{center}
\subsection{Initial Notes: Counting the Hz}
pseudo code goal:
\begin{verbatim}
Using 1Hz signal
Start counting 1MHz every 1Hz
when next cycle is received,
display count
start counting again
\end{verbatim}
That's all the objective is here. Easy with a micro, but goal is to complete using cmos or 74 logic.
4553 x 5
74hct132
1MHz clock (or 6MHz clock), or some variation thereof
jk flip flop
74376 - quad jk flip flop
7476 - jk flip flop
1mhz clk will be main counter,
6 hz or 1 hz will be latch / reset
I ended up skipping the 74 CMOS, in favor of a CPLD. Practical Electronics also mentions this approach as favored. Even a micro alone could be used. Schematic entry in the CPLD could also be used.
\subsection{MAX7219 8 digit 7 LED segment Display Driver}
Basic code tested with this was the LedControl arduino library.
\begin{verbatim}
/*
Now we need a LedControl to work with.
***** These pin numbers will probably not work with your hardware *****
pin 12 is connected to the DataIn
pin 11 is connected to the CLK
pin 10 is connected to LOAD
We have only a single MAX72XX.
*/
\end{verbatim}
Some of the lines have to be edited to allow for all digits to be read, and
also to lower intensity of display. I think also a component package (dark
grey clear plastic bag) in front of the leds with intensity 1 is about right.
\subsection{CPLDs}
\begin{verbatim}
http://dangerousprototypes.com/docs/Xilinx_CPLDs:_XC9500_vs_CoolRunner-II
https://www.eevblog.com/forum/fpga/what-are-cplds-do-they-still-play-a-role-how-to-program-them/msg3084581/#msg3084581
https://www.seeedstudio.com/XC9572XL-CPLD-development-board-v1b-p-799.html
\end{verbatim}
Dangerous prototypes has a few
Including the xc2, the xc95, and the coolrunner.
I wanted xc95, so they have one for \$12. not bad.
Looks like bus pirate can program... But I ended up using a Xilinx USB Platform Cable.
\subsubsection{Programming}
Using the XC9500XL series. This chip has some limitations - which are good.
As you get faster clocks, you need bigger registers to handle parsing the clocks. Bigger registers, use more power. Maybe this is one reason why high clock speeds mean more power.
\subsubsection{6KHz clock}
Due to limitations on the XC9500XL FPGA logic blocks, I ended up limiting the counter registers to 12+1 bits\footnote{Possibly I could use multiple smaller registers in a type of cascade, but let's not bother with that for now. I had 600KHz resolution, until I added the UART out/}, so I have around 6,000 (assuming 60Hz), resolution. With this, I need a 6KHz clock. I could do this with the uno, but let's throw an attiny in there because it's a good tool for this kind of purpose and resolution. It should be able to function as a rough 6KHz timer, easily.
\subsubsection{UART output}
I set the CPLD to use the rising edge of the 6KHz clock and to shift the counter value out... Unsuprisingly, the baud rate is 6000. I found this by using my Open Bench Logic Sniffer\footnote{Phantom 3 in Repairs 2019}. It's fairly quick to configure and get working. Auto detected the UART speed easy.
However, my uart value is 12 - 14 bits, and with uart being an 8 bit protocol, it makes this unconventional. May need to bit bang something. But before that...
\subsection{Divide by N Counters}
\begin{center}
\includegraphics[scale=0.2]{../pics/DSCN2958.JPG}
\captionof{figure}{This divide by 6 counter, appears to not line up with what the TTL Cookbook has for a similar 7490 one.}
\end{center}
The schematics appear to be incorrect for the divide by 6 counter in the Practical Electronics for Beginners book. Having looked at my built up circuit carefully, I see a 20Hz output from the 60Hz. I managed to get my hands on a copy of the TTL Cookbook by Don Lancaster recently, and that details correct divide by 6 and 10 counters (which are different from what's on my proto board), and while I could fix the divide by 6 counter, instead, I'm going to build another divide by 2 counter, and leave the original incorrect one there as a warning (it's also easier to just build a new one).
As it is, I'm getting 2Hz output on the pulse pin... Oops. Practical Untested Electronics for Beginners. Hax. Everything in life is hax. The earlier you realize that, the better you will feel about your own work.\footnote{It's possible they put the error in on purpose. It's really hard to tell...}
\subsection{Attiny 6KHz Clock}
A small victory here: I setup an Attiny10 with an external oscillator (programmable CMOS, not Quartz) of 1.536MHz. I then set prescaler at 256 to get
6000. Set micro fuse to enable CKOUT pin, and now I have a 6KHz clock from the 20 cent micro plus. Neat usage of the attiny10 here, thanks
to my other project using it. The CPLD works with it, no problem.
\subsection{Parsing of CPLD UART Stream}
Back to the 14 bit stream...
I have the UART stream feeding into the Atmega328/Uno. For the code, I was unsure how to handle it at first, but then I realized a simple shift in would fit.
\textbf{Situation:} I have a serial UART stream at 6000 baud from the CPLD. However, it's not exactly UART. In fact, it has values of 6000, which are over 8 bit. So I have a 14 bit serial stream. There is no stop bit after the 8 bits, and no two 8 bit bytes. So hardware serial will not work. \footnote{I didn't want to deal with coding the UART into the CPLD. There are also size limitations.}
\textbf{Solution:} I have a serial 14 bit stream at 6000 baud. The answer is to tie the 6000 Hz CLK to a pin on the Uno, and implement a shift in, so that every clock up, the value is read on the Serial / 14 bit pin. I do have a start bit, and I am not outputting all the time, so this will be one 14 bit value every second.
\textbf{Problems:} The Uno's digitalRead timing is not 100\% As a result, some values are being read incorrectly. 5996 shows up as 5048 or similar. I need to go back and access the Input direct via register reads to speed things up. A Pin register access similar to:
\begin{verbatim}
Example Code Snippet
Let's demonstrate the use of the DDRx,
PORTx and PINx registers from the
following code snippet:
DDRC = 0x0F;
PORTC = 0x0C;
// lets assume a 4V supply comes to PORTC.6 and Vcc = 5V
if (PINC == 0b01000000)
PORTC = 0x0B;
else
PORTC = 0x00;
\end{verbatim}
Reference: http://maxembedded.com/2011/06/port-operations-in-avr/
may fix these issues. In the meantime, because the errors are consistent, I setup some LUTs\footnote{Lookup tables, i.e. hard coded fixes. e.g. 5048 now converts to 5996.}.
\subsection{Max7219 8 digit 7-Segment Display via Uno}
I didn't have any trouble getting the 7 segment to display with the Uno and the Max7219. Note that I avoided outputting the values via the CPLD. The Uno is just quicker to code this output. I used the LedControl library. I had to adopt a quick function to break down the values. The Max7219 does not take in variables, so instead, you feed it single digits. Therefore I needed to extract a single digit from the tens, hundreds, and thousands. See below:
\begin{verbatim}
//https://playground.arduino.cc/Main/LedControl/#Seg7Control
void printNumber(int v) {
int ones;
int tens;
int hundreds;
int thousands;
boolean negative;
if(v < -9999 || v > 9999)
return;
if(v<0) {
negative=true;
v=v*-1;
}
ones=v%10;
v=v/10;
tens=v%10;
v=v/10;
hundreds=v%10;
v=v/10;
thousands=v;
/*if(negative) {
//print character '-' in the leftmost column
lc.setChar(0,4,'-',false);
}
else {
//print a blank in the sign column
lc.setChar(0,4,' ',false);
}*/
//Now print the number digit by digit
lc.setDigit(0,3,(byte)thousands,false);
lc.setDigit(0,2,(byte)hundreds,false);
lc.setDigit(0,1,(byte)tens,false);
lc.setDigit(0,0,(byte)ones,false);
}
\end{verbatim}
Note that I commented out the negative sign on this. My values are always positive.
\includegraphics[scale=0.30]{../pics/DSCN0170.JPG}
\captionof{figure}{Rev A. 60Hz to 4 digits, is updated once per second.}
\subsection{Project Rev A Complete}
With the above complete, I have an initial prototype. The issues with this are the following:
\begin{itemize}
\item Uno reads 14 bit serial stream wrong (timing issues)
\item 7 segment display slightly bright
\item Should add readout of 120 Volts (can get from transformer)
\item Plywood should be replaced with fiberglass
\end{itemize}
It turns out that 4 digits on the display is the minimum for a project like this to be viable. 3 digits wouldn't be enough resolution, and 5 digits is not necessary (although nice). The values differ here from about 5996 to 6003 cycles per second.
Other than that, it is working, and will be setup and watched for a bit to enjoy the readout.
\subsection{Related:}
\begin{itemize}
\item https://shepherdingelectrons.blogspot.com/2020/07/uart-transceiver-for-breadboard-computer.html
\end{itemize}
This guide shows a UART created in TTL 74 logic. What's relevant to this project, is how he managed syncing the clocks.
%todo insert picture
\end{document}

+ 221
- 0
60hz_Divider/docs/23.tex~ View File

@ -0,0 +1,221 @@
\documentclass[11pt]{article}
%Gummi|065|=)
\usepackage{graphicx}
\usepackage{caption}
\usepackage{xcolor}
\usepackage[vcentering,dvips]{geometry}
\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
%\maketitle
\tableofcontents
\textcolor{green!60!blue!70}{
\section{60Hz Divider}}
\subsection{Overview}
Let's count. There is a schematic in Practical Electronics For Beginners 4th edition. I've built that up, and will add some CPLD counter logic, along with a micro to output the SPI to a 7seg counter module.
The goal is relative accuracy. Not absolute. No GPS here. I'm going from 60 to 6,000 cycles.\footnote{Due to limitations of CPLD} This is just meant to be fun.
\begin{center}
\includegraphics[scale=0.15]{../pics/DSCN2964.JPG}
\captionof{figure}{60 Hz Logic Divider to 1Hz}
\end{center}
\subsection{Initial Notes: Counting the Hz}
pseudo code goal:
\begin{verbatim}
Using 1Hz signal
Start counting 1MHz every 1Hz
when next cycle is received,
display count
start counting again
\end{verbatim}
That's all the objective is here. Easy with a micro, but goal is to complete using cmos or 74 logic.
4553 x 5
74hct132
1MHz clock (or 6MHz clock), or some variation thereof
jk flip flop
74376 - quad jk flip flop
7476 - jk flip flop
1mhz clk will be main counter,
6 hz or 1 hz will be latch / reset
I ended up skipping the 74 CMOS, in favor of a CPLD. Practical Electronics also mentions this approach as favored. Even a micro alone could be used. Schematic entry in the CPLD could also be used.
\subsection{MAX7219 8 digit 7 LED segment Display Driver}
Basic code tested with this was the LedControl arduino library.
\begin{verbatim}
/*
Now we need a LedControl to work with.
***** These pin numbers will probably not work with your hardware *****
pin 12 is connected to the DataIn
pin 11 is connected to the CLK
pin 10 is connected to LOAD
We have only a single MAX72XX.
*/
\end{verbatim}
Some of the lines have to be edited to allow for all digits to be read, and
also to lower intensity of display. I think also a component package (dark
grey clear plastic bag) in front of the leds with intensity 1 is about right.
\subsection{CPLDs}
\begin{verbatim}
http://dangerousprototypes.com/docs/Xilinx_CPLDs:_XC9500_vs_CoolRunner-II
https://www.eevblog.com/forum/fpga/what-are-cplds-do-they-still-play-a-role-how-to-program-them/msg3084581/#msg3084581
https://www.seeedstudio.com/XC9572XL-CPLD-development-board-v1b-p-799.html
\end{verbatim}
dangerous prototypes has a few
including the xc2, the xc95, and the coolrunner.
i wanted xc95, so they have one for \$12. not bad.
looks like bus pirate can program... But I ended up using a Xilinx USB Platform Cable.
\subsection{CPLD Programming}
Using the XC9500XL series. This chip has some limitations - which are good.
As you get faster clocks, you need bigger registers to handle parsing the clocks. Bigger registers, use more power. Maybe this is one reason why high clock speeds mean more power.
\subsubsection{6KHz clock}
Due to limitations on the XC9500XL FPGA logic blocks, I ended up limiting the counter registers to 12+1 bits\footnote{Possibly I could use multiple smaller registers in a type of cascade, but let's not bother with that for now. I had 600KHz resolution, until I added the UART out/}, so I have around 6,000 (assuming 60Hz), resolution. With this, I need a 6KHz clock. I could do this with the uno, but let's throw an attiny in there because it's a good tool for this kind of purpose and resolution. It should be able to function as a rough 6KHz timer, easily.
\subsubsection{UART output}
I set the CPLD to use the rising edge of the 6KHz clock and to shift the counter value out... Unsuprisingly, the baud rate is 6000. I found this by using my Open Bench Logic Sniffer\footnote{Phantom 3 in Repairs 2019}. It's fairly quick to configure and get working. Auto detected the UART speed easy.
However, my uart value is 12 - 14 bits, and with uart being an 8 bit protocol, it makes this unconventional. May need to bit bang something. But before that...
\subsection{Divide by N Counters}
\begin{center}
\includegraphics[scale=0.2]{../pics/DSCN2958.JPG}
\captionof{figure}{This divide by 6 counter, appears to not line up with what the TTL Cookbook has for a similar 7490 one.}
\end{center}
The schematics appear to be incorrect for the divide by 6 counter in the Practical Electronics for Beginners book. Having looked at my built up circuit carefully, I see a 20Hz output from the 60Hz. I managed to get my hands on a copy of the TTL Cookbook by Don Lancaster recently, and that details correct divide by 6 and 10 counters (which are different from what's on my proto board), and while I could fix the divide by 6 counter, instead, I'm going to build another divide by 2 counter, and leave the original incorrect one there as a warning (it's also easier to just build a new one).
As it is, I'm getting 2Hz output on the pulse pin... Oops. Practical Untested Electronics for Beginners. Hax. Everything in life is hax. The earlier you realize that, the better you will feel about your own work.\footnote{It's possible they put the error in on purpose. It's really hard to tell...}
\subsection{Attiny 6KHz Clock}
A small victory here: I setup an Attiny10 with an external oscillator (programmable CMOS, not Quartz) of 1.536MHz. I then set prescaler at 256 to get
6000. Set micro fuse to enable CKOUT pin, and now I have a 6KHz clock from the 20 cent micro plus. Neat usage of the attiny10 here, thanks
to my other project using it. The CPLD works with it, no problem.
\subsection{Parsing of CPLD UART Stream}
Back to the 14 bit stream...
I have the UART stream feeding into the Atmega328/Uno. For the code, I was unsure how to handle it at first, but then I realized a simple shift in would fit.
\textbf{Situation:} I have a serial UART stream at 6000 baud from the CPLD. However, it's not exactly UART. In fact, it has values of 6000, which are over 8 bit. So I have a 14 bit serial stream. There is no stop bit after the 8 bits, and no two 8 bit bytes. So hardware serial will not work. \footnote{I didn't want to deal with coding the UART into the CPLD. There are also size limitations.}
\textbf{Solution:} I have a serial 14 bit stream at 6000 baud. The answer is to tie the 6000 Hz CLK to a pin on the Uno, and implement a shift in, so that every clock up, the value is read on the Serial / 14 bit pin. I do have a start bit, and I am not outputting all the time, so this will be one 14 bit value every second.
\textbf{Problems:} The Uno's digitalRead timing is not 100\% As a result, some values are being read incorrectly. 5996 shows up as 5048 or similar. I need to go back and access the Input direct via register reads to speed things up. A Pin register access similar to:
\begin{verbatim}
Example Code Snippet
Let's demonstrate the use of the DDRx,
PORTx and PINx registers from the
following code snippet:
DDRC = 0x0F;
PORTC = 0x0C;
// lets assume a 4V supply comes to PORTC.6 and Vcc = 5V
if (PINC == 0b01000000)
PORTC = 0x0B;
else
PORTC = 0x00;
\end{verbatim}
Reference: http://maxembedded.com/2011/06/port-operations-in-avr/
may fix these issues. In the meantime, because the errors are consistent, I setup some LUTs\footnote{Lookup tables, i.e. hard coded fixes. e.g. 5048 now converts to 5996.}.
\subsection{Max7219 8 digit 7-Segment Display via Uno}
I didn't have any trouble getting the 7 segment to display with the Uno and the Max7219. Note that I avoided outputting the values via the CPLD. The Uno is just quicker to code this output. I used the LedControl library. I had to adopt a quick function to break down the values. The Max7219 does not take in variables, so instead, you feed it single digits. Therefore I needed to extract a single digit from the tens, hundreds, and thousands. See below:
\begin{verbatim}
//https://playground.arduino.cc/Main/LedControl/#Seg7Control
void printNumber(int v) {
int ones;
int tens;
int hundreds;
int thousands;
boolean negative;
if(v < -9999 || v > 9999)
return;
if(v<0) {
negative=true;
v=v*-1;
}
ones=v%10;
v=v/10;
tens=v%10;
v=v/10;
hundreds=v%10;
v=v/10;
thousands=v;
/*if(negative) {
//print character '-' in the leftmost column
lc.setChar(0,4,'-',false);
}
else {
//print a blank in the sign column
lc.setChar(0,4,' ',false);
}*/
//Now print the number digit by digit
lc.setDigit(0,3,(byte)thousands,false);
lc.setDigit(0,2,(byte)hundreds,false);
lc.setDigit(0,1,(byte)tens,false);
lc.setDigit(0,0,(byte)ones,false);
}
\end{verbatim}
Note that I commented out the negative sign on this. My values are always positive.
\includegraphics[scale=0.30]{../pics/DSCN0170.JPG}
\captionof{figure}{Rev A. 60Hz to 4 digits, is updated once per second.}
\subsection{Project Rev A Complete}
With the above complete, I have an initial prototype. The issues with this are the following:
\begin{itemize}
\item Uno reads 14 bit serial stream wrong (timing issues)
\item 7 segment display slightly bright
\item Should add readout of 120 Volts (can get from transformer)
\item Plywood should be replaced with fiberglass
\end{itemize}
It turns out that 4 digits on the display is the minimum for a project like this to be viable. 3 digits wouldn't be enough resolution, and 5 digits is not necessary (although nice). The values differ here from about 5996 to 6003 cycles per second.
Other than that, it is working, and will be setup and watched for a bit to enjoy the readout.
\subsection{Related:}
\begin{itemize}
\item https://shepherdingelectrons.blogspot.com/2020/07/uart-transceiver-for-breadboard-computer.html
\end{itemize}
This guide shows a UART created in TTL 74 logic. What's relevant to this project, is how he managed syncing the clocks.
%todo insert picture
\end{document}

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\contentsline {section}{\numberline {1}60Hz Divider}{1}%
\contentsline {subsection}{\numberline {1.1}Overview}{1}%
\contentsline {subsection}{\numberline {1.2}Initial Notes: Counting the Hz}{2}%
\contentsline {subsection}{\numberline {1.3}MAX7219 8 digit 7 LED segment Display Driver}{2}%
\contentsline {subsection}{\numberline {1.4}CPLDs}{3}%
\contentsline {subsubsection}{\numberline {1.4.1}Programming}{3}%
\contentsline {subsubsection}{\numberline {1.4.2}6KHz clock}{4}%
\contentsline {subsubsection}{\numberline {1.4.3}UART output}{4}%
\contentsline {subsection}{\numberline {1.5}Divide by N Counters}{4}%
\contentsline {subsection}{\numberline {1.6}Attiny 6KHz Clock}{5}%
\contentsline {subsection}{\numberline {1.7}Parsing of CPLD UART Stream}{5}%
\contentsline {subsection}{\numberline {1.8}Max7219 8 digit 7-Segment Display via Uno}{7}%
\contentsline {subsection}{\numberline {1.9}Project Rev A Complete}{8}%
\contentsline {subsection}{\numberline {1.10}Related:}{9}%

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<h1 id="firstHeading" class="firstHeading">CPLD: Complex programmable logic devices</h1>
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<th style="text-align: center; color: #fff; border: 1px solid #1E7B8E; background-color:#1E7B8E; font-size: 11px;" colspan="2">Project Summary
</th></tr>
<tr>
<td colspan="2">
</td></tr>
<tr>
<th> Name:
</th><td> CPLD: Complex programmable logic devices
</td></tr>
<tr>
<th> Buy it:
</th><td> <a href="http://www.seeedstudio.com/depot/xc2c64a-coolrunnerii-cpld-development-board-p-800.html?cPath=174" class="external text" rel="nofollow">Get one for $15 at Seeed Studio</a>
</td></tr>
<tr>
<th> Price:
</th><td> $15
</td></tr>
<tr>
<th> Status:
</th><td> <a href="/docs/Project_status#Development_status" title="Project status">Mature</a>
</td></tr>
<tr>
<th> Manufacturing:
</th><td> <a href="/docs/Project_status#Manufacturing" title="Project status">Shipping</a>
</td></tr>
<tr>
<th> Forum:
</th><td> <a href="http://dangerousprototypes.com/forum/viewforum.php?f=51" class="external text" rel="nofollow">CPLD: Complex programmable logic devices Forum</a>
</td></tr></table><a href="/docs/File:Xc9572-cpld-breakoutvib.jpg" class="image"><img alt="Xc9572-cpld-breakoutvib.jpg" src="/docs/images/6/6c/Xc9572-cpld-breakoutvib.jpg" width="490" height="277" /></a>
<p>Ever get stuck choosing the right logic chip combination or voltage level translator? Give up the hunt and create your own custom logic chip. CPLDs can give you the logic you need, with the pinout you want, while saving board space and board revisions.
</p><p>Development boards from Dangerous Prototypes will help you build your first custom logic chip using simple schematic entry, Verilog, or VHDL.
</p>
<ul><li>XC9572XL or XC2C64A CPLDs
</li><li>On-board power supply for core and pins
</li><li>Selectable 3.3volt or external supply for pins (1.8volt to 3.3volt)
</li><li>LEDs for output, push button for input
</li><li>Easy to program with the Bus Pirate
</li><li>Open source (CC-BY-SA)
</li></ul>
<p><b><a href="http://www.seeedstudio.com/depot/xc2c64a-coolrunnerii-cpld-development-board-p-800.html" class="external text" rel="nofollow">CoolRunner-II</a> and <a href="http://www.seeedstudio.com/depot/xc9572xl-cpld-development-board-p-799.html" class="external text" rel="nofollow">XC9572XL</a> versions available for $15.</b>
</p>
<table id="toc" class="toc"><tr><td><div id="toctitle"><h2>Contents</h2></div>
<ul>
<li class="toclevel-1 tocsection-1"><a href="#Downloads"><span class="tocnumber">1</span> <span class="toctext">Downloads</span></a></li>
<li class="toclevel-1 tocsection-2"><a href="#Hardware"><span class="tocnumber">2</span> <span class="toctext">Hardware</span></a>
<ul>
<li class="toclevel-2 tocsection-3"><a href="#XC9500XL"><span class="tocnumber">2.1</span> <span class="toctext">XC9500XL</span></a></li>
<li class="toclevel-2 tocsection-4"><a href="#CoolRunnerII"><span class="tocnumber">2.2</span> <span class="toctext">CoolRunnerII</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-5"><a href="#CPLD_development_tutorials"><span class="tocnumber">3</span> <span class="toctext">CPLD development tutorials</span></a>
<ul>
<li class="toclevel-2 tocsection-6"><a href="#Schematic_entry"><span class="tocnumber">3.1</span> <span class="toctext">Schematic entry</span></a></li>
<li class="toclevel-2 tocsection-7"><a href="#Verilog"><span class="tocnumber">3.2</span> <span class="toctext">Verilog</span></a></li>
<li class="toclevel-2 tocsection-8"><a href="#VHDL"><span class="tocnumber">3.3</span> <span class="toctext">VHDL</span></a></li>
<li class="toclevel-2 tocsection-9"><a href="#Plunify"><span class="tocnumber">3.4</span> <span class="toctext">Plunify</span></a></li>
<li class="toclevel-2 tocsection-10"><a href="#ISE_Webpack"><span class="tocnumber">3.5</span> <span class="toctext">ISE Webpack</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-11"><a href="#Example_devices"><span class="tocnumber">4</span> <span class="toctext">Example devices</span></a>
<ul>
<li class="toclevel-2 tocsection-12"><a href="#Schematic"><span class="tocnumber">4.1</span> <span class="toctext">Schematic</span></a></li>
<li class="toclevel-2 tocsection-13"><a href="#VHDL_2"><span class="tocnumber">4.2</span> <span class="toctext">VHDL</span></a></li>
<li class="toclevel-2 tocsection-14"><a href="#Verilog_2"><span class="tocnumber">4.3</span> <span class="toctext">Verilog</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-15"><a href="#Programming"><span class="tocnumber">5</span> <span class="toctext">Programming</span></a>
<ul>
<li class="toclevel-2 tocsection-16"><a href="#Additional_methods"><span class="tocnumber">5.1</span> <span class="toctext">Additional methods</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-17"><a href="#Links"><span class="tocnumber">6</span> <span class="toctext">Links</span></a>
<ul>
<li class="toclevel-2 tocsection-18"><a href="#Verilog_3"><span class="tocnumber">6.1</span> <span class="toctext">Verilog</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-19"><a href="#Resources"><span class="tocnumber">7</span> <span class="toctext">Resources</span></a></li>
<li class="toclevel-1 tocsection-20"><a href="#License"><span class="tocnumber">8</span> <span class="toctext">License</span></a></li>
</ul>
</td></tr></table><script>if (window.showTocToggle) { var tocShowText = "show"; var tocHideText = "hide"; showTocToggle(); } </script>
<h2> <span class="mw-headline" id="Downloads">Downloads</span></h2>
<ul><li><a href="https://github.com/DangerousPrototypes/Downloads/blob/master/CPLD.Breakout.Package.v1.0.zip" class="external text" rel="nofollow">Download CPLD Breakout Package</a>
</li><li><a href="https://github.com/DangerousPrototypes/CPLD_Breakout" class="external text" rel="nofollow">Browse the project's GitHub</a>
</li></ul>
<h2> <span class="mw-headline" id="Hardware">Hardware</span></h2>
<ul><li><a href="/docs/Xilinx_CPLDs:_XC9500_vs_CoolRunner-II" title="Xilinx CPLDs: XC9500 vs CoolRunner-II">Xilinx CPLDs: XC9500 vs CoolRunner-II</a>
</li></ul>
<h3> <span class="mw-headline" id="XC9500XL">XC9500XL</span></h3>
<p><a href="/docs/File:Xc9572-cpld-breakoutvib.jpg" class="image"><img alt="Xc9572-cpld-breakoutvib.jpg" src="/docs/images/thumb/6/6c/Xc9572-cpld-breakoutvib.jpg/150px-Xc9572-cpld-breakoutvib.jpg" width="150" height="85" /></a>
</p><p>The Xilinx XC9500XL family has some of the cheapest and readily available CPLDs out there. Inputs are 5volt tolerant and they can be run from a single 3.3volt supply.
</p>
<ul><li><a href="/docs/XC9500XL_CPLD_breakout_board" title="XC9500XL CPLD breakout board">XC9500XL CPLD development board</a> hardware design
</li><li><a href="/docs/XC9572XL_CPLD_dev-board_introduction" title="XC9572XL CPLD dev-board introduction">XC9572XL CPLD dev-board introduction</a>
</li><li><a href="/docs/Xilinx_XC9500XL_CPLD_quick_start" title="Xilinx XC9500XL CPLD quick start">XC9500XL CPLD quick start</a>
</li><li><a href="/docs/XC9572XL_dev-board_v1_errors" title="XC9572XL dev-board v1 errors">XC9572XL dev-board v1 errors</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds054.pdf" class="external text" rel="nofollow">XC9500XL family manual</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds057.pdf" class="external text" rel="nofollow">XC9572XL device datasheet</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds058.pdf" class="external text" rel="nofollow">XC9536XL device datasheet</a> (smaller version of XC9572XL)
</li></ul>
<h3> <span class="mw-headline" id="CoolRunnerII">CoolRunnerII</span></h3>
<p><a href="/docs/File:Xc2c64a_cpld_breakout-vib.jpg" class="image"><img alt="Xc2c64a cpld breakout-vib.jpg" src="/docs/images/thumb/7/70/Xc2c64a_cpld_breakout-vib.jpg/150px-Xc2c64a_cpld_breakout-vib.jpg" width="150" height="84" /></a>
</p><p>The CoolRunner-II family is newer than the XC9500XL, and has a few extra features like multiple IO voltage banks for voltage translation, internal pull-up resistors and pin keepers and a clock divider. Requires a 1.8volt core supply and a 1.2-3.3volt IO pin supply.
</p>
<ul><li><a href="/docs/CoolRunner-II_CPLD_breakout_board" title="CoolRunner-II CPLD breakout board">CoolRunner-II CPLD development board</a> hardware design
</li><li><a href="/docs/XC2C64A_CPLD_dev-board_introduction" title="XC2C64A CPLD dev-board introduction">XC2C64A CPLD dev-board introduction</a>
</li><li><a href="/docs/Xilinx_CoolRunner-II_CPLD_quick_start" title="Xilinx CoolRunner-II CPLD quick start">CoolRunner-II CPLD quick start</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds090.pdf" class="external text" rel="nofollow">CoolRunner-II family manual</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds311.pdf" class="external text" rel="nofollow">XC2C64A device datasheet</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds310.pdf" class="external text" rel="nofollow">XC2C32A device datasheet</a> (smaller version of XC2C64A used on Bus Blaster v2)
</li></ul>
<h2> <span class="mw-headline" id="CPLD_development_tutorials">CPLD development tutorials</span></h2>
<p>This tutorial shows how to use simple schematics to design the logic in a Xilinx CoolRunner-II or XC9500 CPLD.
</p>
<ul><li><a href="http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.html" class="external text" rel="nofollow">Free Xilinx ISE Webpack download</a>
</li></ul>
<p>Tutorial files:
</p>
<ul><li>See <a href="https://github.com/DangerousPrototypes/Downloads/blob/master/CPLDdev.package.v1.1.zip" class="external text" rel="nofollow">CPLDdev.package.v1.1.zip</a>
</li></ul>
<p>The Bus Pirate XSVF player and a .bat file are included with every example. Modify the COM post and click to load.
</p>
<h3> <span class="mw-headline" id="Schematic_entry">Schematic entry</span></h3>
<ul><li><a href="/docs/CPLD_intro_1:_Light_a_LED" title="CPLD intro 1: Light a LED">CPLD intro 1: Light a LED</a>
</li><li><a href="/docs/CPLD_intro_2:_Toggle_a_LED_with_a_button" title="CPLD intro 2: Toggle a LED with a button">CPLD intro 2: Toggle a LED with a button</a>
</li><li><a href="/docs/CPLD_intro_3:_Inverse_LED_toggle" title="CPLD intro 3: Inverse LED toggle">CPLD intro 3: Inverse LED toggle</a>
</li></ul>
<h3> <span class="mw-headline" id="Verilog">Verilog</span></h3>
<ul><li><a href="/docs/CPLD_Verilog_intro_1:_Light_a_LED" title="CPLD Verilog intro 1: Light a LED">CPLD Verilog intro 1: Light a LED</a>
</li><li><a href="/docs/CPLD_Verilog_intro_2:_Toggle_a_LED_with_a_button" title="CPLD Verilog intro 2: Toggle a LED with a button">CPLD Verilog intro 2: Toggle a LED with a button</a>
</li><li><a href="/docs/CPLD_Verilog_intro_3:_Inverse_LED_toggle" title="CPLD Verilog intro 3: Inverse LED toggle">CPLD Verilog intro 3: Inverse LED toggle</a>
</li></ul>
<h3> <span class="mw-headline" id="VHDL">VHDL</span></h3>
<ul><li><a href="/docs/CPLD_VHDL_intro_1:_Light_a_LED" title="CPLD VHDL intro 1: Light a LED">CPLD VHDL intro 1: Light a LED</a>
</li><li><a href="/docs/CPLD_VHDL_intro_2:_Toggle_a_LED_with_a_button" title="CPLD VHDL intro 2: Toggle a LED with a button">CPLD VHDL intro 2: Toggle a LED with a button</a>
</li><li><a href="/docs/CPLD_VHDL_intro_3:_Inverse_LED_toggle" title="CPLD VHDL intro 3: Inverse LED toggle">CPLD VHDL intro 3: Inverse LED toggle</a>
</li><li><a href="/docs/CPLD_intro_4:_replacing_simple_logic_vhdl" title="CPLD intro 4: replacing simple logic vhdl">CPLD VHDL intro 4: Replacing simple logic</a>
</li></ul>
<h3> <span class="mw-headline" id="Plunify">Plunify</span></h3>
<p><a href="http://www.plunify.com" class="external text" rel="nofollow">Plunify</a> is a cloud-based compiler for <s>Xilinx</s> and Altera chips. <s>The CPLD examples are already loaded, all you have to do is sign up for a free account and copy the tutorial from the <i>add IP</i> tab.</s> Unfortunately it no longer supports Xilinx chips.
</p>
<ul><li><a href="http://www.youtube.com/watch?v=WWFyVMZUMRE" class="external text" rel="nofollow">How-to video: use Plunify with the CPLD examples</a>
</li><li><a href="/docs/Plunify_online_compiler_overview" title="Plunify online compiler overview">Plunify online compiler overview</a>
</li></ul>
<h3> <span class="mw-headline" id="ISE_Webpack">ISE Webpack</span></h3>
<ul><li><a href="/docs/Export_(X)SVF_from_Xilinx_ISE_Webpack" title="Export (X)SVF from Xilinx ISE Webpack">Export (X)SVF from Xilinx ISE Webpack</a>
</li><li><a href="/docs/CPLD:_simulate_designs" title="CPLD: simulate designs">CPLD: simulate designs</a>
</li><li><a href="/docs/Enable_CoolRunner-II_CPLD_pull-up_resistors" title="Enable CoolRunner-II CPLD pull-up resistors">Enable CoolRunner-II CPLD pull-up resistors</a>
</li></ul>
<h2> <span class="mw-headline" id="Example_devices">Example devices</span></h2>
<ul><li><a href="https://github.com/DangerousPrototypes/Downloads/blob/master/CPLDdev.package.v1.1.zip" class="external text" rel="nofollow">CPLDdev.package.v1.1.zip</a>
</li><li><a href="https://github.com/DangerousPrototypes/CPLD_Breakout/tree/master/package/Device_examples" class="external text" rel="nofollow">Latest in SVN</a>
</li></ul>
<h3> <span class="mw-headline" id="Schematic">Schematic</span></h3>
<ul><li><a href="/docs/CPLD_example:_Dual_74xx595s" title="CPLD example: Dual 74xx595s">CPLD example: Dual 74xx595s</a>
</li><li><a href="/docs/CPLD_example:_Dual_latch" title="CPLD example: Dual latch">CPLD example: Dual latch</a>
</li><li><a href="/docs/CPLD_example:_FIFO" title="CPLD example: FIFO">CPLD example: FIFO</a>
</li><li><a href="/docs/CPLD_example:_Motor_Phase_Interlock" title="CPLD example: Motor Phase Interlock">CPLD example: Motor Phase Interlock</a>
</li><li><a href="/docs/CPLD_example:_Priority_Decoder" title="CPLD example: Priority Decoder">CPLD example: Priority Decoder</a>
</li><li><a href="/docs/CPLD_example:_PWM_Generator" title="CPLD example: PWM Generator">CPLD example: PWM Generator</a>
</li><li><a href="/docs/CPLD_example:_Addressable_Latch" title="CPLD example: Addressable Latch">CPLD example: Addressable Latch</a>
</li></ul>
<h3> <span class="mw-headline" id="VHDL_2">VHDL</span></h3>
<ul><li>Our <a href="/docs/7400_series_library_in_VHDL" title="7400 series library in VHDL">7400 series library in VHDL</a>
</li><li><a href="http://opencores.org/project,mcpu" class="external text" rel="nofollow">32 macrocell CPU</a> at OpenCores.org
</li><li><a href="/docs/CPLD_ring_oscillator" title="CPLD ring oscillator">CPLD ring oscillator</a> a clock source without a crystal
</li></ul>
<h3> <span class="mw-headline" id="Verilog_2">Verilog</span></h3>
<ul><li><a href="/docs/Lulu:_Yet_another_logic_analyzer" title="Lulu: Yet another logic analyzer">Logic analyzer example in 72 macrocells</a>
</li></ul>
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<ul><li><a href="/docs/Bus_Pirate_JTAG_XSVF_player" title="Bus Pirate JTAG XSVF player">CPLD programming with Bus Pirate, XSVF loader, and XSVF files</a>
</li><li><a href="/docs/CPLD_programming_with_Bus_Blaster,_urJTAG,_and_SVF_files" title="CPLD programming with Bus Blaster, urJTAG, and SVF files">CPLD programming with Bus Blaster, urJTAG, and SVF files</a> (currently CoolRunner-II only)
</li><li><a href="/docs/JTAG_SVF_to_XSVF_file_converter" title="JTAG SVF to XSVF file converter">JTAG SVF to XSVF file converter</a>
</li></ul>
<h3> <span class="mw-headline" id="Additional_methods">Additional methods</span></h3>
<ul><li><a href="http://www.xilinx.com/itp/3_1i/pdf/docs/jtg/jtg.pdf" class="external text" rel="nofollow">Parallel cables with IMPACT</a>
</li><li><a href="http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf" class="external text" rel="nofollow">XSVF player for any microcontroller</a> (used in Bus Pirate XSVF player)
</li><li><a href="http://www.clifford.at/libxsvf/" class="external text" rel="nofollow">lib(X)SVF</a>
</li><li><a href="http://rmdir.de/~michael/xilinx/" class="external text" rel="nofollow">FT2232 programmers and IMPACT with alternate driver</a>
</li></ul>
<h2> <span class="mw-headline" id="Links">Links</span></h2>
<h3> <span class="mw-headline" id="Verilog_3">Verilog</span></h3>
<ul><li><a href="http://www.asic-world.com/verilog/synthesis.html" class="external text" rel="nofollow">Synthesis tutorial</a> (a favorite tutorial)
</li><li><a href="http://www.asic-world.com/tidbits/index.html" class="external text" rel="nofollow">Verilog concepts</a> (wire, reg, blocking, etc)
</li></ul>
<h2> <span class="mw-headline" id="Resources">Resources</span></h2>
<ul><li><a href="/docs/Xilinx_CPLD_breakout_development_scraps" title="Xilinx CPLD breakout development scraps">Xilinx CPLD breakout development scraps</a>
</li><li><a href="/docs/CPLD_development_board_manufacturing_resources" title="CPLD development board manufacturing resources">CPLD development board manufacturing resources</a>
</li></ul>
<h2> <span class="mw-headline" id="License">License</span></h2>
<ul><li>Hardware: CC-BY-SA
</li><li>CPLD demos projects: CC-0
</li></ul>
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<table id="toc" class="toc"><tr><td><div id="toctitle"><h2>Contents</h2></div>
<ul>
<li class="toclevel-1 tocsection-1"><a href="#Overview"><span class="tocnumber">1</span> <span class="toctext">Overview</span></a></li>
<li class="toclevel-1 tocsection-2"><a href="#Schematic"><span class="tocnumber">2</span> <span class="toctext">Schematic</span></a>
<ul>
<li class="toclevel-2 tocsection-3"><a href="#XC9572A"><span class="tocnumber">2.1</span> <span class="toctext">XC9572A</span></a></li>
<li class="toclevel-2 tocsection-4"><a href="#XC2C64A"><span class="tocnumber">2.2</span> <span class="toctext">XC2C64A</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-5"><a href="#UCF"><span class="tocnumber">3</span> <span class="toctext">UCF</span></a></li>
</ul>
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<h2> <span class="mw-headline" id="Overview">Overview</span></h2>
<p>In tutorial 3 we build on the simple push button example in tutorial 2. We'll add logic that inverts the output of button 1 on LED D2.
</p>
<table class="wikitable" border="1">
<caption> Tutorial 3 truth table
</caption><tr>
<th> Button PB </th><th> LED D1</th><th>LED D2
</th></tr>
<tr>
<td> Pressed</td><td> OFF </td><td> ON
</td></tr>
<tr>
<td> NOT pressed </td><td>ON</td><td>OFF
</td></tr></table>
<h2> <span class="mw-headline" id="Schematic">Schematic</span></h2>
<p><a href="/docs/File:Cpld-tutorial-external-circuit.png" class="image"><img alt="Cpld-tutorial-external-circuit.png" src="/docs/images/thumb/d/d4/Cpld-tutorial-external-circuit.png/250px-Cpld-tutorial-external-circuit.png" width="250" height="77" /></a>
</p><p>In this demo we'll use both LEDs and the push button connected to the CPLD.
</p>
<table class="wikitable" border="1">
<caption> CPLD dev board connections
</caption><tr>
<th> IO </th><th> pin connection
</th></tr>
<tr>
<td> LED D1 </td><td>P39
</td></tr>
<tr>
<td> LED D2 </td><td>P38
</td></tr>
<tr>
<td> Button BP </td><td> P18
</td></tr></table>
<pre>The XC2C64A CPLD has internal pullup resistors
R1 is unpopulated on the XC2C64A development board
</pre>
<h3> <span class="mw-headline" id="XC9572A">XC9572A</span></h3>
<p><a href="/docs/File:Cpld-demo3.png" class="image"><img alt="Cpld-demo3.png" src="/docs/images/thumb/9/9d/Cpld-demo3.png/480px-Cpld-demo3.png" width="480" height="97" /></a>
</p><p>This designs adds a second LED and connects it to the push button through an inverter.
</p>
<ul><li>Input from BUTTON enters the CPLD through an input buffer (IBUF)
</li><li>The BUTTON signal connects to LED (D1) through an output buffer (OBUF) as before
</li><li>INV is a new schematic element that inverts the BUTTON signal before it connects to a second output buffer (OBUF) and LED_INV (D2)
</li></ul>
<h3> <span class="mw-headline" id="XC2C64A">XC2C64A</span></h3>
<p><a href="/docs/File:Cpld-xc2c-ledinv.png" class="image"><img alt="Cpld-xc2c-ledinv.png" src="/docs/images/thumb/0/01/Cpld-xc2c-ledinv.png/480px-Cpld-xc2c-ledinv.png" width="480" height="119" /></a>
</p><p>The XC2C64A version is the same, except we use the internal pull-up resistor instead of R1 on the development board.
</p>
<h2> <span class="mw-headline" id="UCF">UCF</span></h2>
<pre>#PIN MAP OF DANGEROUSPROTOTYPES.COM CPLD BREAKOUT BOARDS
#lICENSE: CC-0 (CREATIVE COMMONS 0)
#http://dangerousprototypes.com/docs/XC9500XL_CPLD_breakout_board
#http://dangerousprototypes.com/docs/CoolRunner-II_CPLD_breakout_board
NET &quot;LED&quot; LOC = &quot;P39&quot;;
NET &quot;BUTTON&quot; LOC = &quot;P18&quot;;
NET &quot;LED_INV&quot; LOC = &quot;P38&quot;;</pre>
<p>Input and output markers in the schematic are mapped to actual CPLD pin numbers in the UCF file. This is an example UCF file that defines the three IO connections on the development boards.
</p>
<ul><li>The Pxx numbers are the actual pin number on the CPLD. Easy.
</li><li>ISE has a GUI utility to assign pin numbers, but it doesn't work with CoolRunner-II CPLDs.
</li></ul>
<p>We mapped the BUTTON input market to pin 18. The LED output marker connects to pin 39 (D1), and LED_INV connects to pin 38 (D2).
</p>
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<th> Name:
</th><td> XC9500XL CPLD breakout board
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<tr>
<th> Manufacturing:
</th><td> <a href="/docs/Project_status#Manufacturing" title="Project status">Shipping</a>
</td></tr>
<tr>
<th> Forum:
</th><td> <a href="http://dangerousprototypes.com/forum/viewforum.php?f=51" class="external text" rel="nofollow">XC9500XL CPLD breakout board Forum</a>
</td></tr></table><a href="/docs/File:Xc9572-cpld-breakoutvib.jpg" class="image"><img alt="Xc9572-cpld-breakoutvib.jpg" src="/docs/images/6/6c/Xc9572-cpld-breakoutvib.jpg" width="490" height="277" /></a>
<p>Ever get stuck choosing the right logic chip combination or voltage level translator? Give up the hunt and create your own custom logic chip. CPLDs can give you the logic you need, with the pinout you want, while saving board space and board revisions.
</p><p>The Xilinx XC9500XL family has some of the cheapest and readily-available CPLDs. This development board from Dangerous Prototypes will help you build your first custom logic chip using simple schematic entry, Verilog, or VHDL.
</p>
<ul><li>XC9572XL CPLD with 72 macrocells
</li><li>5volt tolerant inputs
</li><li>On-board 3.3volt power supply for core and pins
</li><li>Selectable 3.3volt or external supply for pins (1.8volt to 3.3volt)
</li><li>LEDs for output
</li><li>Push button for input
</li><li>Populated JTAG header
</li><li>Unpopulated oscillator footprint on the bottom
</li><li>Easy to program with the Bus Pirate
</li><li>Pre-programmed with <a href="/docs/CPLD_intro_3:_Inverse_LED_toggle" title="CPLD intro 3: Inverse LED toggle">LED inverse toggle demo</a>
</li><li>Open source (CC-BY-SA)
</li></ul>
<p><b><a href="http://www.seeedstudio.com/depot/xc9572xl-cpld-development-board-p-799.html?cPath=174" class="external text" rel="nofollow">Available for $15 at Seeed Studio</a></b>
</p>
<table id="toc" class="toc"><tr><td><div id="toctitle"><h2>Contents</h2></div>
<ul>
<li class="toclevel-1 tocsection-1"><a href="#Overview"><span class="tocnumber">1</span> <span class="toctext">Overview</span></a></li>
<li class="toclevel-1 tocsection-2"><a href="#Hardware"><span class="tocnumber">2</span> <span class="toctext">Hardware</span></a>
<ul>
<li class="toclevel-2 tocsection-3"><a href="#XC9572XL_CPLD"><span class="tocnumber">2.1</span> <span class="toctext">XC9572XL CPLD</span></a></li>
<li class="toclevel-2 tocsection-4"><a href="#Power_supply"><span class="tocnumber">2.2</span> <span class="toctext">Power supply</span></a></li>
<li class="toclevel-2 tocsection-5"><a href="#Button_and_LEDs"><span class="tocnumber">2.3</span> <span class="toctext">Button and LEDs</span></a></li>
<li class="toclevel-2 tocsection-6"><a href="#Pinout_table"><span class="tocnumber">2.4</span> <span class="toctext">Pinout table</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-7"><a href="#PCB"><span class="tocnumber">3</span> <span class="toctext">PCB</span></a>
<ul>
<li class="toclevel-2 tocsection-8"><a href="#Partslist"><span class="tocnumber">3.1</span> <span class="toctext">Partslist</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-9"><a href="#Programming"><span class="tocnumber">4</span> <span class="toctext">Programming</span></a></li>
<li class="toclevel-1 tocsection-10"><a href="#Get_one.21"><span class="tocnumber">5</span> <span class="toctext">Get one!</span></a></li>
<li class="toclevel-1 tocsection-11"><a href="#Resources"><span class="tocnumber">6</span> <span class="toctext">Resources</span></a></li>
<li class="toclevel-1 tocsection-12"><a href="#License"><span class="tocnumber">7</span> <span class="toctext">License</span></a></li>
</ul>
</td></tr></table><script>if (window.showTocToggle) { var tocShowText = "show"; var tocHideText = "hide"; showTocToggle(); } </script>
<h2> <span class="mw-headline" id="Overview">Overview</span></h2>
<p><a href="/docs/File:XC9572XL-CPLD-breakout-dia.png" class="image"><img alt="XC9572XL-CPLD-breakout-dia.png" src="/docs/images/thumb/2/2a/XC9572XL-CPLD-breakout-dia.png/490px-XC9572XL-CPLD-breakout-dia.png" width="490" height="500" /></a>
</p>
<h2> <span class="mw-headline" id="Hardware">Hardware</span></h2>
<p><a href="/docs/File:Cct-XC9572XL-CPLD-breakout-lv.png" class="image"><img alt="Cct-XC9572XL-CPLD-breakout-lv.png" src="/docs/images/thumb/c/cd/Cct-XC9572XL-CPLD-breakout-lv.png/490px-Cct-XC9572XL-CPLD-breakout-lv.png" width="490" height="366" /></a>
</p><p>Click for a full size schematic image. Schematic and PCB were designed with the freeware version of <a href="http://www.cadsoft.de" class="external text" rel="nofollow">Cadsoft Eagle</a>, download the latest project files from our <a href="http://code.google.com/p/dangerous-prototypes-open-hardware/source/browse/#svn%2Ftrunk%2FCPLD-breakout" class="external text" rel="nofollow">Google Code project SVN</a>.
</p>
<h3> <span class="mw-headline" id="XC9572XL_CPLD">XC9572XL CPLD</span></h3>
<p><a href="/docs/File:XC9572XL-CPLD-breakout-cpld.jpg" class="image"><img alt="XC9572XL-CPLD-breakout-cpld.jpg" src="/docs/images/6/6d/XC9572XL-CPLD-breakout-cpld.jpg" width="490" height="273" /></a>
</p><p>The XC9572XL (U1) is a 72 macrocell CPLD with 5volt tolerant pins. It is one of the smallest CPLDs made by Xilinx, and is readily available from Digikey for around $2.40.
</p><p>The CPLD core requires a 3.3volt supply to each VINT pin. This supply is provided by the on board 3.3volt regulator.
</p><p>The IO pins operate from a separate supply of 1.2volts to 3.3volts. An external supply can be connected to either IO pin, or place a jumper on VIO to connect the on board 3.3volt power supply.
</p><p>Each supply pin has a 0.1uF capacitor (C1,C2,C3,C4).
</p><p>The JTAG programming pins are brought to header JT. The JTAG interface is powered by the 3.3volt core supply.
</p>
<ul><li>For more see the <a href="/docs/Xilinx_XC9500XL_CPLD_quick_start" title="Xilinx XC9500XL CPLD quick start">Xilinx XC9500XL CPLD quick start</a>
</li></ul>
<h3> <span class="mw-headline" id="Power_supply">Power supply</span></h3>
<p>A 3.3volt regulator (U2) powers the CPLD core and (optionally) the IO pins. C5 and C6 are 3.3uF input and out capacitors. Capacitor C7 is an optional feedback bypass capacitor that can be used with some voltage regulators, it is not used here.
</p><p>The 3.3volt regulator is supplied through pin V+. The supply can be up to 5volts. Up to 100mA is available from the 3v3 pin when using the on-board regulator.
</p><p>LED PWR lights if the power supply is active.
</p>
<h3> <span class="mw-headline" id="Button_and_LEDs">Button and LEDs</span></h3>
<p><a href="/docs/File:XC9572XL-CPLD-breakout-userio.jpg" class="image"><img alt="XC9572XL-CPLD-breakout-userio.jpg" src="/docs/images/7/74/XC9572XL-CPLD-breakout-userio.jpg" width="490" height="313" /></a>
</p><p>Two LEDs (D1, D2) and a push button (PB) are included for a little user IO.
</p><p>LED D1 and D2 source current from the CPLD. Generally, designers sink current from CPLDs and FPGAs - the chip connects the LED to ground instead of power - because many parts can sink 20mA but only source a few. On this chip, however, the maximum current is a paltry 8mA for both source and sink. The LEDs have 2K resistors (R2,R3) that keep the current at an acceptable 2mA.
</p><p>A push button (PB) provides a way for user input. Resistor R1 holds the CPLD pin high when the button is not pressed. When the button is pressed the pin is connect to ground and taken low.
</p>
<h3> <span class="mw-headline" id="Pinout_table">Pinout table</span></h3>
<table class="wikitable" border="1">
<caption> Pinout
</caption><tr>
<th> FB4/2 </th><th>Description</th><th>Description</th><th> FB3/FB1
</th></tr>
<tr>
<td> GND </td><td>Ground connection </td><td>Ground connection </td><td>GND
</td></tr>
<tr>
<td> V+ </td><td>Supply voltage (max 5volts)</td><td>Supply voltage</td><td> V+
</td></tr>
<tr>
<td> 3V3</td><td>3.3volt output (max 100mA) </td><td>IO external supply (1.2-3.3volts) </td><td>IO
</td></tr>
<tr>
<td> IO</td><td>IO external supply</td><td>Push button</td><td> 18
</td></tr>
<tr>
<td> 19</td><td> </td><td> </td><td> 16
</td></tr>
<tr>
<td> 20</td><td> </td><td> </td><td> 14
</td></tr>
<tr>
<td> 21</td><td> </td><td> </td><td> 13
</td></tr>
<tr>
<td> 22</td><td> </td><td> </td><td> 12
</td></tr>
<tr>
<td> 23</td><td> </td><td> </td><td> 8
</td></tr>
<tr>
<td> 27</td><td> </td><td> </td><td> 6
</td></tr>
<tr>
<td> 28</td><td> </td><td> </td><td> 5
</td></tr>
<tr>
<td> 29</td><td> </td><td> </td><td> 3
</td></tr>
<tr>
<td> 30</td><td> </td><td> </td><td> 2
</td></tr>
<tr>
<td> 31</td><td> </td><td> </td><td> 1
</td></tr>
<tr>
<td> 32</td><td> </td><td> </td><td> 44
</td></tr>
<tr>
<td> 33</td><td> </td><td> </td><td> 43
</td></tr>
<tr>
<td> 34</td><td> </td><td> </td><td> 42
</td></tr>
<tr>
<td> 36</td><td> </td><td> </td><td> 41
</td></tr>
<tr>
<td> 37</td><td> </td><td> </td><td> 40
</td></tr>
<tr>
<td> 38</td><td>LED D2</td><td>LED D1</td><td> 39
</td></tr></table>
<h2> <span class="mw-headline" id="PCB">PCB</span></h2>
<p><a href="/docs/File:Pcb-XC9572XL-CPLD-breakout-lv.jpg" class="image"><img alt="Pcb-XC9572XL-CPLD-breakout-lv.jpg" src="/docs/images/9/9d/Pcb-XC9572XL-CPLD-breakout-lv.jpg" width="490" height="279" /></a>
</p><p>We used the freeware version of <a href="http://www.cadsoft.de/" class="external text" rel="nofollow">Cadsoft Eagle</a> to make the schematic and PCB. Download the latest board files from <a href="http://code.google.com/p/dangerous-prototypes-open-hardware/source/browse/#svn%2Ftrunk%2FCPLD-breakout" class="external text" rel="nofollow">SVN</a>.
</p>
<h3> <span class="mw-headline" id="Partslist">Partslist</span></h3>
<p><a href="/docs/File:Board-XC9572XL-CPLD-breakout-iv.png" class="image"><img alt="Board-XC9572XL-CPLD-breakout-iv.png" src="/docs/images/thumb/8/88/Board-XC9572XL-CPLD-breakout-iv.png/490px-Board-XC9572XL-CPLD-breakout-iv.png" width="490" height="295" /></a>
</p><p>Click for a full size placement image.
</p>
<table class="wikitable" border="1">
<caption> partlist
</caption><tr>
<th> Parts </th><th> Quantity </th><th> Value </th><th> Package
</th></tr>
<tr>
<td> C1,C2,C3,C4 </td><td> 4 </td><td> <a href="http://www.mouser.com/Search/ProductDetail.aspx?R=C0603C104K5RACTUvirtualkey64600000virtualkey80-C0603C104K5R" class="external text" rel="nofollow">0.1uF</a> </td><td> C603
</td></tr>
<tr>
<td> C5,C6 </td><td> 2 </td><td> <a href="http://www.mouser.com/ProductDetail/Kemet/T491A335K016AT7280/?qs=sGAEpiMZZMsh%252b1woXyUXj5o2u5v0rqXQreqCFpobM0A%3d" class="external text" rel="nofollow">3.3uF tantalum</a> </td><td> SMC_A
</td></tr>
<tr>
<td> D1, D2, PWR </td><td> 3 </td><td> <a href="http://www.mouser.com/Search/ProductDetail.aspx?R=598-8140-107Fvirtualkey64500000virtualkey645-598-8140-107F" class="external text" rel="nofollow">Yellow LED</a> </td><td> LED-805
</td></tr>
<tr>
<td> JTAG </td><td> 1 </td><td> 0.1” Pin header </td><td> 1X06
</td></tr>
<tr>
<td> PB </td><td> 1 </td><td> <a href="http://www.mouser.com/Search/ProductDetail.aspx?R=SKQGADE010virtualkey68800000virtualkey688-SKQGAD" class="external text" rel="nofollow">SMD button, small</a> </td><td> TACT_SWITCH_SMALL
</td></tr>
<tr>
<td> R1 </td><td> 1 </td><td> <a href="http://www.mouser.com/Search/ProductDetail.aspx?R=CR0603-JW-103GLFvirtualkey65210000virtualkey652-CR0603-JW-103GLF" class="external text" rel="nofollow">10K</a> </td><td> R603
</td></tr>
<tr>
<td> R2,R3, R4 </td><td> 3 </td><td> <a href="http://www.mouser.com/Search/ProductDetail.aspx?R=CRCW06032K00FKEAvirtualkey61300000virtualkey71-CRCW0603-2.0K-E3" class="external text" rel="nofollow">2K</a> </td><td> R603
</td></tr>
<tr>
<td> VIO </td><td> 1 </td><td> 0.1” Pin header </td><td> M1X2
</td></tr>
<tr>
<td> U1 </td><td> 1 </td><td> <a href="http://search.digikey.com/scripts/DkSearch/dksus.dll?vendor=0&amp;keywords=+122-1448-N" class="external text" rel="nofollow">XC9572XL_VQ44</a> </td><td> VQ44
</td></tr>
<tr>
<td> U2 </td><td> 1 </td><td> <a href="http://www.mouser.com/Search/ProductDetail.aspx?R=SI9183DT-33-T1-E3virtualkey61360000virtualkey781-SI9183DT-33-E3" class="external text" rel="nofollow">3.3volt LDO voltage regulator 150mA</a> </td><td> SOT-23-5
</td></tr></table>
<ul><li> <a href="http://www.mouser.com/ProjectManager/ProjectDetail.aspx?AccessID=46202208a9" class="external text" rel="nofollow">Shopping cart at Mouser</a>
</li></ul>
<p>The latest sources and distributors are in the <a href="http://dangerousprototypes.com/docs/Partlist" class="external text" rel="nofollow">master partlist</a>. See something missing? Please <a href="http://dangerousprototypes.com/forum" class="external text" rel="nofollow">let us know</a>.
</p><p><br />
Q1 on the bottom of the PCB is for an optional 3.3volt oscillator. It feeds into a global clock pin. Some suitable values are:
</p>
<ul><li><a href="http://www.mouser.com/ProductDetail/ABRACON/ASV-20000MHZ-EJ-T/?qs=H8AWquzS%2flNowiZ9Nk9Uyw%3d%3d" class="external text" rel="nofollow">20MHz</a>
</li><li><a href="http://www.mouser.com/ProductDetail/ABRACON/ASV-50000MHZ-EJ-T/?qs=H8AWquzS%2flOR%252bU4UILwQkw%3d%3d" class="external text" rel="nofollow">50MHz</a>
</li></ul>
<h2> <span class="mw-headline" id="Programming">Programming</span></h2>
<p><a href="/docs/CPLD:_Complex_programmable_logic_devices#Programming" title="CPLD: Complex programmable logic devices">Development and programming tutorials</a> are on the main CPLD page.
</p>
<h2> <span class="mw-headline" id="Get_one.21">Get one!</span></h2>
<p><a href="/docs/File:Xc9572-cpld-breakoutvib.jpg" class="image"><img alt="Xc9572-cpld-breakoutvib.jpg" src="/docs/images/6/6c/Xc9572-cpld-breakoutvib.jpg" width="490" height="277" /></a>
</p><p><a href="http://www.seeedstudio.com/depot/xc9572xl-cpld-development-board-p-799.html?cPath=174" class="external text" rel="nofollow">Get one for $15</a> at Seeed Studio.
</p><p>Your purchases keep the open source projects coming, we sincerely appreciate your support!
</p>
<h2> <span class="mw-headline" id="Resources">Resources</span></h2>
<ul><li><a href="/docs/CPLD:_Complex_programmable_logic_devices" title="CPLD: Complex programmable logic devices">CPLD breakout homepage</a> Programming, tutorials, devices, and more
</li><li><a href="/docs/Xilinx_XC9500XL_CPLD_quick_start" title="Xilinx XC9500XL CPLD quick start">XC9500XL CPLD quick start</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds054.pdf" class="external text" rel="nofollow">XC9500XL family manual</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds057.pdf" class="external text" rel="nofollow">XC9572XL device datasheet</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds058.pdf" class="external text" rel="nofollow">XC9536XL device datasheet</a> (smaller version of XC9572XL)
</li></ul>
<h2> <span class="mw-headline" id="License">License</span></h2>
<ul><li>CC-BY-SA
</li></ul>
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<h1 id="firstHeading" class="firstHeading">XC9572XL CPLD dev-board introduction</h1>
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<p><a href="/docs/File:XC9572XL_CPLD_dev-board.png" class="image"><img alt="XC9572XL CPLD dev-board.png" src="/docs/images/thumb/e/e0/XC9572XL_CPLD_dev-board.png/490px-XC9572XL_CPLD_dev-board.png" width="490" height="294" /></a>
</p><p>The development board comes programmed with the <a href="/docs/CPLD_intro_3:_Inverse_LED_toggle" title="CPLD intro 3: Inverse LED toggle">inverse LED toggle demo</a>.
</p>
<ol><li>Ensure that header VIO has a jumper to provide 3.3volts to the IO pins
</li><li>Power up the board:
<ol><li>Option 1: Connect a 5volt power supply to V+, connect one of the GND pins to the power supply ground
</li><li>Option 2: Connect a 3.3volt power supply to VTG on the JTAG header, connect one of the GND pins to the power supply ground
</li></ol>
</li><li>LED D1 will light
</li><li>Press the button (PB): LED D1 turns off and LED D2 turns on
</li></ol>
<h2> <span class="mw-headline" id="Overview">Overview</span></h2>
<ul><li>JTAG header - Program the CPLD through this header. VTG provides 3.3volt output to programmer
</li><li>VIO header - Connect IO to on-board 3.3volt supply
</li><li>D1 LED - User LED connected to pin 39
</li><li>D2 LED - User LED connected to pin 38
</li><li>PWR LED - Power LED, lights when the 3.3volt supply is active
</li><li>PB button - Push button for input, connected to CPLD pin 18
</li><li>GND pin - Ground connection, only one pin needs to be connected to the power supply ground
</li><li>V+ pin - Power supply for on-board 3.3volt regulator (5volts max)
</li><li>3V3 pin - 3.3volt output (max 100mA)
</li><li>IO pin - External supply for IO pins, make sure header VIO has NO jumper, only one IO pin needs to be connected to the power supply
</li></ul>
<h2> <span class="mw-headline" id="Pinout_table">Pinout table</span></h2>
<table class="wikitable" border="1">
<caption> Pinout
</caption><tr>
<th> FB4/2 </th><th>Description</th><th>Description</th><th> FB3/FB1
</th></tr>
<tr>
<td> GND </td><td>Ground connection </td><td>Ground connection </td><td>GND
</td></tr>
<tr>
<td> V+ </td><td>Supply voltage (max 5volts)</td><td>Supply voltage</td><td> V+
</td></tr>
<tr>
<td> 3V3</td><td>3.3volt output (max 100mA) </td><td>IO external supply (1.2-3.3volts) </td><td>IO
</td></tr>
<tr>
<td> IO</td><td>IO external supply</td><td>Push button</td><td> 18
</td></tr>
<tr>
<td> 19</td><td> </td><td> </td><td> 16
</td></tr>
<tr>
<td> 20</td><td> </td><td> </td><td> 14
</td></tr>
<tr>
<td> 21</td><td> </td><td> </td><td> 13
</td></tr>
<tr>
<td> 22</td><td> </td><td> </td><td> 12
</td></tr>
<tr>
<td> 23</td><td> </td><td> </td><td> 8
</td></tr>
<tr>
<td> 27</td><td> </td><td> </td><td> 6
</td></tr>
<tr>
<td> 28</td><td> </td><td> </td><td> 5
</td></tr>
<tr>
<td> 29</td><td> </td><td> </td><td> 3
</td></tr>
<tr>
<td> 30</td><td> </td><td> </td><td> 2
</td></tr>
<tr>
<td> 31</td><td> </td><td> </td><td> 1
</td></tr>
<tr>
<td> 32</td><td> </td><td> </td><td> 44
</td></tr>
<tr>
<td> 33</td><td> </td><td> </td><td> 43
</td></tr>
<tr>
<td> 34</td><td> </td><td> </td><td> 42
</td></tr>
<tr>
<td> 36</td><td> </td><td> </td><td> 41
</td></tr>
<tr>
<td> 37</td><td> </td><td> </td><td> 40
</td></tr>
<tr>
<td> 38</td><td>LED D2</td><td>LED D1</td><td> 39
</td></tr></table>
<h2> <span class="mw-headline" id="Functional_diagram">Functional diagram</span></h2>
<p><a href="/docs/File:XC9572XL-CPLD-breakout-dia.png" class="image"><img alt="XC9572XL-CPLD-breakout-dia.png" src="/docs/images/thumb/2/2a/XC9572XL-CPLD-breakout-dia.png/490px-XC9572XL-CPLD-breakout-dia.png" width="490" height="500" /></a>
</p>
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<h1 id="firstHeading" class="firstHeading">Xilinx XC9500XL CPLD quick start</h1>
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<table id="toc" class="toc"><tr><td><div id="toctitle"><h2>Contents</h2></div>
<ul>
<li class="toclevel-1 tocsection-1"><a href="#Features"><span class="tocnumber">1</span> <span class="toctext">Features</span></a>
<ul>
<li class="toclevel-2 tocsection-2"><a href="#Resources"><span class="tocnumber">1.1</span> <span class="toctext">Resources</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-3"><a href="#Development_and_programming"><span class="tocnumber">2</span> <span class="toctext">Development and programming</span></a>
<ul>
<li class="toclevel-2 tocsection-4"><a href="#JTAG_cables"><span class="tocnumber">2.1</span> <span class="toctext">JTAG cables</span></a></li>
<li class="toclevel-2 tocsection-5"><a href="#Loaders"><span class="tocnumber">2.2</span> <span class="toctext">Loaders</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-6"><a href="#Basic_circuit"><span class="tocnumber">3</span> <span class="toctext">Basic circuit</span></a>
<ul>
<li class="toclevel-2 tocsection-7"><a href="#Power"><span class="tocnumber">3.1</span> <span class="toctext">Power</span></a></li>
<li class="toclevel-2 tocsection-8"><a href="#Reset"><span class="tocnumber">3.2</span> <span class="toctext">Reset</span></a></li>
<li class="toclevel-2 tocsection-9"><a href="#JTAG_programming_connections"><span class="tocnumber">3.3</span> <span class="toctext">JTAG programming connections</span></a></li>
<li class="toclevel-2 tocsection-10"><a href="#Clock_source"><span class="tocnumber">3.4</span> <span class="toctext">Clock source</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-11"><a href="#Peripherals"><span class="tocnumber">4</span> <span class="toctext">Peripherals</span></a>
<ul>
<li class="toclevel-2 tocsection-12"><a href="#IO"><span class="tocnumber">4.1</span> <span class="toctext">IO</span></a></li>
</ul>
</li>
<li class="toclevel-1 tocsection-13"><a href="#Resources_2"><span class="tocnumber">5</span> <span class="toctext">Resources</span></a></li>
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<h2> <span class="mw-headline" id="Features">Features</span></h2>
<ul><li>2.5volt or 3.3volt IO, 3.3volt core supply required
</li><li>5volt tolerant IO pins
</li><li>Modern XC9500<u>XL</u> has a 3.3volt core, older XC9500 had a 5volt core
</li><li>Compare Xilinx <a href="/docs/Xilinx_CPLDs:_XC9500_vs_CoolRunner-II" title="Xilinx CPLDs: XC9500 vs CoolRunner-II">XC9500 and CoolRunner-II</a>
</li><li>Unlike most FPGA, CPLDs are static and store their configuration permanently
</li><li>Several devices in easy-to-solder TQFP-44 packages
</li><li>Available at Digikey, among others
</li></ul>
<h3> <span class="mw-headline" id="Resources">Resources</span></h3>
<ul><li><a href="http://www.xilinx.com/support/documentation/xc9500xl.htm" class="external text" rel="nofollow">XC9500XL homepage</a> (not much there)
</li><li><a href="/docs/XC9500XL_CPLD_breakout_board" title="XC9500XL CPLD breakout board">XC9500XL CPLD development board</a> hardware design
</li><li><a href="/docs/XC9572XL_CPLD_dev-board_introduction" title="XC9572XL CPLD dev-board introduction">XC9572XL CPLD dev-board introduction</a>
</li><li><strong class="selflink">XC9500XL CPLD quick start</strong>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds054.pdf" class="external text" rel="nofollow">XC9500XL family manual</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds057.pdf" class="external text" rel="nofollow">XC9572XL device datasheet</a>
</li><li><a href="http://www.xilinx.com/support/documentation/data_sheets/ds058.pdf" class="external text" rel="nofollow">XC9536XL device datasheet</a>
</li></ul>
<h2> <span class="mw-headline" id="Development_and_programming">Development and programming</span></h2>
<p>Xilinx has a free FPGA and CPLD development package called <a href="http://www.xilinx.com/tools/webpack.htm" class="external text" rel="nofollow">ISE WebPack</a>. This is the only development tool we're aware of.
</p>
<h3> <span class="mw-headline" id="JTAG_cables">JTAG cables</span></h3>
<p>XC9500XL uses a JTAG programming interface.
</p>
<ul><li>Parallel cable and ISE
</li><li>FT2232 JTAG
</li></ul>
<h3> <span class="mw-headline" id="Loaders">Loaders</span></h3>
<p>Load configurations into the CPLD or FPGA by 'playing' an (X)SVF encoded file with a JTAG cable.
</p>
<ul><li><a href="http://urjtag.sourceforge.net/" class="external text" rel="nofollow">UrJTAG</a> - load SVF with a number of programmers, including common FT2232 programmers
</li><li><a href="http://www.openocd.org" class="external text" rel="nofollow">OpenOCD</a> - detects FPGA/CPLDs, but doesn't do much with them
</li></ul>
<h2> <span class="mw-headline" id="Basic_circuit">Basic circuit</span></h2>
<p><a href="/docs/File:Quick-start-xc9572xl-baslc.png" class="image"><img alt="Quick-start-xc9572xl-baslc.png" src="/docs/images/thumb/2/2a/Quick-start-xc9572xl-baslc.png/480px-Quick-start-xc9572xl-baslc.png" width="480" height="312" /></a>
</p>
<h3> <span class="mw-headline" id="Power">Power</span></h3>
<p>Requires, at minimum, a 3.3volt supply.
</p>
<ul><li>3.3volts - core supply and JTAG pins (VDDINT)
</li><li>2.5volts or 3.3volts - IO supply for the IO pins, use your preferred interface voltage (VDDIO)
</li></ul>
<h3> <span class="mw-headline" id="Reset">Reset</span></h3>
<p>There is no default reset pin on the XC9500, but similar functionality can be programmed.
</p>
<ul><li>GSR pins have an optimized path to the Set/Reset signal of all macrocells. These pins can be used to synchronously reset all the macrocells in the CPLS with minimum extra resource. This feature must be enabled in the CPLD design, or the pins will be normal IO.
</li></ul>
<h3> <span class="mw-headline" id="JTAG_programming_connections">JTAG programming connections</span></h3>
<table class="wikitable" border="1">
<caption> 6x1 JTAG pinout
</caption><tr>
<th> Pin </th><th> Signal</th><th>Direction
</th></tr>
<tr>
<td> 1 </td><td> V+</td><td>
</td></tr>
<tr>
<td> 2 </td><td> GND</td><td>
</td></tr>
<tr>
<td> 3</td><td>TCK</td><td>Input
</td></tr>
<tr>
<td>4</td><td>TDO</td><td>Input
</td></tr>
<tr>
<td>5</td><td>TDI</td><td>Output
</td></tr>
<tr>
<td>6</td><td>TMS</td><td>Input
</td></tr></table>
<p>Common Xilinx JTAG pinout.
</p>
<h3> <span class="mw-headline" id="Clock_source">Clock source</span></h3>
<p>A clock source is only required if your design needs it. If you plan to use a clock, connect it to a GCK pin for best results.
</p>
<ul><li>GCK pins are optimized to distribute a clock signal to all macrocells with minimum skew and extra resources. If you plan to use a clock with the CPLD, connect it to one of these pins if possible. The GCK features must be applied in the CPLD design or the GCK pin will be an ordinary IO pin.
</li></ul>
<h2> <span class="mw-headline" id="Peripherals">Peripherals</span></h2>
<h3> <span class="mw-headline" id="IO">IO</span></h3>
<p>There are also some pins with special features, though they are not used unless specifically enabled in the CPLD synthesis:
</p>
<ul><li>GCK (global clock) - optimized to distribute a clock signal to all macrocells with minimum skew and extra resources
</li><li>GSR (global set reset) - optimized path to the Set/Reset signal of all macrocells, allows synchronous reset of the flip-flop in all cells with minimum extra resources
</li><li>GTS (global tri-state) - optimized to put all CPLD pins in a high impedance state
</li><li><a href="http://www.xilinx.com/support/answers/3122.htm" class="external text" rel="nofollow">More</a>
</li></ul>
<h2> <span class="mw-headline" id="Resources_2">Resources</span></h2>
<ul><li><a href="/docs/CPLD:_Complex_programmable_logic_devices#CPLD_development_tutorials" title="CPLD: Complex programmable logic devices">CPLD development tutorials</a>
</li></ul>
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\documentclass[11pt]{article}
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\author{Steak Electronics}
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\begin{document}
\maketitle
\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: (insertlibrebootlink)
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, the bootlog, and also the partitions page here which explains all this:
\\
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
\\
https://openwrt.org/docs/techref/flash
\subsubsection{The Common IT Company Rant}
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early electric cars by Tesla in the 2020's had their onboard flash fail. Flash is a problem, and a big one for the long game. Never trust flash.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco\footnote{I will ignore the backdoors these companies load into their firewalls for the NSA, although it may be noted here. Complete security is a myth. There is no safe space in life. ``There be no shelter here'' - Popular song.}. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. It doesn't make sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.\footnote{Good design again.}
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP is Ideal AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% future proof\footnote{WPA issues, or side channel attacks probably. However, unlikely if it's not accessible via LAN}, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before. It's also quite secure.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible. Avoid configuration overhead, and have something that does what its supposed to, and nothing else. Minimize the attach surface.}
\subsection{What is required for this to go right}
A lot is required for everything to go smoothly. I've touched on I hope most of the points, but experience flashing, soldering, soldering with hot air, proto board usage, tearing down enclosures, configuring Openwrt, using USB to Serial adapters, installing the WAP on the wall with a screw driver, and some drywall screws\footnote{This WAP also comes with separate magnetic bars that screw into the wall. The AP attaches via magnets to the bars, and is easily removable for service. Great design.}, and finally understanding this WAP was worth the trouble by reviewing the screenshots and having enough electronics experience to recognize quality when you see it.
Not least of all, you have to decipher all the docs as I did to come to this conclusion that flashing would be viable. It is here. It may not be next time. However, with this tool under my belt I'm better prepared for next time.\footnote{A note about the current support of this device in Openwrt. I've decided to not make a wiki page, as for whatever reason no one else did, and ``When in Rome, do as the Romans do''. I don't think there are a lot of devices out there, so will avoid promoting it. As they'd follow the fate of other devices which have had internet popularity make them unobtainable (In video game world, the classic example is the SNES game Earthbound). However, I felt an article on my unknown git/book wouldn't hurt. When you browse here, you get such articles.}
\end{document}

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\contentsline {section}{\numberline {1}Edimax WAP1750}{1}%
\contentsline {subsection}{\numberline {1.1}Flashing Openwrt on to the WAP1750}{2}%
\contentsline {subsection}{\numberline {1.2}Teardown Enclosure}{3}%
\contentsline {subsection}{\numberline {1.3}Remove Flash chip by desoldering with hot air}{3}%
\contentsline {subsection}{\numberline {1.4}Read flash with appropriate tool}{3}%
\contentsline {subsection}{\numberline {1.5}Patch existing image sysupgrade for Devolo 1700 series.}{4}%
\contentsline {subsubsection}{\numberline {1.5.1}The Common IT Company Rant}{5}%
\contentsline {subsection}{\numberline {1.6}Write flash with new image and Resolder chip to board}{6}%
\contentsline {subsection}{\numberline {1.7}Access board via FTDI / USB-Serial chip}{7}%
\contentsline {subsection}{\numberline {1.8}Dumb AP is Ideal AP}{7}%
\contentsline {subsection}{\numberline {1.9}What is required for this to go right}{8}%

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\date{}
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\maketitle
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\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it should be.
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cusses flash-
[]
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\documentclass[11pt]{article}
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\usepackage{xcolor}
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\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\end{document}

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\documentclass[11pt]{article}
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\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it should be.
\end{document}

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\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
\end{document}

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\documentclass[11pt]{article}
%Gummi|065|=)
\usepackage{graphicx}
\usepackage{caption}
\usepackage{xcolor}
\usepackage[vcentering,dvips]{geometry}
\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
\end{document}

+ 7
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\date{}
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%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
\end{document}

+ 104
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\documentclass[11pt]{article}
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\title{\textbf{}}
\author{Steak Electronics}
\date{}
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\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
\end{document}

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\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's nonsense. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. That makes no sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% secure, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more mesh, no more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible.}
\end{document}

+ 113
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@ -0,0 +1,113 @@
\documentclass[11pt]{article}
%Gummi|065|=)
\usepackage{graphicx}
\usepackage{caption}
\usepackage{xcolor}
\usepackage[vcentering,dvips]{geometry}
\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
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\documentclass[11pt]{article}
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\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
%\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's nonsense. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. That makes no sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% future proof\footnote{WPA issues, or side channel attacks probably. However, unlikely if it's not accessible via LAN}, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more mesh, no more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible.}
\end{document}

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\documentclass[11pt]{article}
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\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
\subsubsection{The Common IT Company Rant}
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's nonsense. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. That makes no sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP is Ideal AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% future proof\footnote{WPA issues, or side channel attacks probably. However, unlikely if it's not accessible via LAN}, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more mesh, no more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible. Avoid configuration overhead, and have something that does what its supposed to, and nothing else.}
\subsection{What is required for this to go right}
A lot is required for everything to go smoothly. I've touched on a lot of points, but experience flashing, soldering, soldering with hot air, proto board usage, tearing down enclosures, configuring Openwrt, using USB to Serial adapters, installing the WAP on the wall with a screw driver, and some drywall screws\footnote{This WAP also comes with separate magnetic bars that screw into the wall. The AP attaches via magnets to the bars, and is easily removable for service. Great design.}, and finally understanding this WAP was worth the trouble by reviewing the screenshots and having enough electronics experience to recognize quality when you see it.
Not least of all, you have to decipher all the docs as I did to come to this conclusion that flashing would be viable. It is here. It may not be next time. However, with this tool under my belt I'm better prepared for next time.\footnote{A note about the current support of this device in Openwrt. I've decided to not make a wiki page, as for whatever reason no one else did, and ``When in Rome, do as the Romans do''. I don't think there are a lot of devices out there, so will avoid promoting them. As they'd follow the fate of other devices which have had internet popularity make them unobtainable. However, I felt an article on my unknown git/book wouldn't hurt. When you browse here, you get such articles.}
\end{document}

+ 149
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@ -0,0 +1,149 @@
\documentclass[11pt]{article}
%Gummi|065|=)
\usepackage{graphicx}
\usepackage{caption}
\usepackage{xcolor}
\usepackage[vcentering,dvips]{geometry}
\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's nonsense. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. That makes no sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% future proof\footnote{WPA issues, or side channel attacks probably. However, unlikely if it's not accessible via LAN}, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more mesh, no more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible.}
\end{document}

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\contentsline {section}{\numberline {1}Edimax WAP1750}{1}%
\contentsline {subsection}{\numberline {1.1}Flashing Openwrt on to the WAP1750}{2}%
\contentsline {subsection}{\numberline {1.2}Teardown Enclosure}{3}%
\contentsline {subsection}{\numberline {1.3}Remove Flash chip by desoldering with hot air}{3}%
\contentsline {subsection}{\numberline {1.4}Read flash with appropriate tool}{3}%
\contentsline {subsection}{\numberline {1.5}Patch existing image sysupgrade for Devolo 1700 series.}{4}%
\contentsline {subsubsection}{\numberline {1.5.1}The Common IT Company Rant}{5}%
\contentsline {subsection}{\numberline {1.6}Write flash with new image and Resolder chip to board}{6}%
\contentsline {subsection}{\numberline {1.7}Access board via FTDI / USB-Serial chip}{7}%
\contentsline {subsection}{\numberline {1.8}Dumb AP is Ideal AP}{7}%
\contentsline {subsection}{\numberline {1.9}What is required for this to go right}{7}%

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\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: (insertlibrebootlink)
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, the bootlog, and also the partitions page here which explains all this:
\\
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
\\
https://openwrt.org/docs/techref/flash
\subsubsection{The Common IT Company Rant}
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early electric cars by Tesla in the 2020's had their onboard flash fail. Flash is a problem, and a big one for the long game. Never trust flash.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco\footnote{I will ignore the backdoors these companies load into their firewalls for the NSA, although it may be noted here. Complete security is a myth. There is no safe space in life. ``There be no shelter here'' - Popular song.}. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. It doesn't make sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.\footnote{Good design again.}
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP is Ideal AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% future proof\footnote{WPA issues, or side channel attacks probably. However, unlikely if it's not accessible via LAN}, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before. It's also quite secure.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible. Avoid configuration overhead, and have something that does what its supposed to, and nothing else. Minimize the attach surface.}
\subsection{What is required for this to go right}
A lot is required for everything to go smoothly. I've touched on I hope most of the points, but experience flashing, soldering, soldering with hot air, proto board usage, tearing down enclosures, configuring Openwrt, using USB to Serial adapters, installing the WAP on the wall with a screw driver, and some drywall screws\footnote{This WAP also comes with separate magnetic bars that screw into the wall. The AP attaches via magnets to the bars, and is easily removable for service. Great design.}, and finally understanding this WAP was worth the trouble by reviewing the screenshots and having enough electronics experience to recognize quality when you see it.
Not least of all, you have to decipher all the docs as I did to come to this conclusion that flashing would be viable. It is here. It may not be next time. However, with this tool under my belt I'm better prepared for next time.\footnote{A note about the current support of this device in Openwrt. I've decided to not make a wiki page, as for whatever reason no one else did, and ``When in Rome, do as the Romans do''. I don't think there are a lot of devices out there, so will avoid promoting it. As they'd follow the fate of other devices which have had internet popularity make them unobtainable (In video game world, the classic example is the SNES game Earthbound). However, I felt an article on my unknown git/book wouldn't hurt. When you browse here, you get such articles.}
\end{document}

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\documentclass[11pt]{article}
%Gummi|065|=)
\usepackage{graphicx}
\usepackage{caption}
\usepackage{xcolor}
\usepackage[vcentering,dvips]{geometry}
\geometry{papersize={6in,9in},total={4.5in,6.8in}}
\title{\textbf{}}
\author{Steak Electronics}
\date{}
\begin{document}
\maketitle
\tableofcontents
\textcolor{green!60!blue!70}{
\section{Edimax WAP1750}}
\begin{verbatim}
From:
https://openwrt.org/toh/devolo/devolo_wifi_pro_1750e
\end{verbatim}
\footnote{Always type out full URL in links. Don't put hyperlinks. This is done, so that when you print out a webpage, the URLs are still readable.}
The devolo WiFi pro 1750e is a wall mountable access point with:
Dual band 2.4 and 5 GHz WiFi (3 by 3 IEEE 802.11n 450Mbps, 3 by3 IEEE 802.11ac 1299Mpbs)
\begin{itemize}
\item 2x 1Gbit ethernet ports (with Power over Ethernet support)
\item 1x USB 2.0 port
\item External serial console port (Currently unsupported but internal 4-pin internal Dupont connector is functional)
\item 1x GPIO attached piezo beeper
\end{itemize}
The access point is manufactured by OEM Acelink Technologies Co., Ltd. as a EW-7679WAC and was originally sold by Edimax as a WAP1750. The Edimax unit was reviewed by SmallNetBuilder.
\subsection{Flashing Openwrt on to the WAP1750}
At the moment, this page:
\\
https://openwrt.org/toh/devolo/devolo\_wifi\_pro\_1750e
discusses flashing new firmware via SSH. However, the WAP1750 has a custom console, and while it's running GPLv2 GNU Linux, somehow it managed to lock down the software, so that simply shelling into it, is no longer possible. I'm sure that is a sin. GPLv2 does not mean people can take it and then abuse it for commercial use. It's a community good.
None the less, it can be turned into an upgradeable router via the following means:
\begin{itemize}
\item Teardown enclosure
\item Remove flash chip by desoldering with hot air
\item Read flash with appropriate tool (Flashrom, TL866A).
\item Patch existing image sysupgrade for Devolo 1700 series.
\item Write flash with new image
\item Resolder chip to board
\item Access board via FTDI / USB-Serial chip
\end{itemize}
Simple enough, right? It is simple. But it's not simple. At least 5 years of hobbyist electronics and I'm able to do this, but for the layman... Only with a guide. And let's also talk about the issues that arose during the above steps. It's never as easy as it would be in a normal world. Earth is not normal. Earth is tilted.
\subsection{Teardown Enclosure}
The first time, I went careful with a plastic spudger. This device is actually well designed as far as teardowns go. The second time, I got angry and snapped off the front plate with a screwdriver. In fact, the screwdriver approach (here) was superior. Much faster. Although scratches are left. Scratches only hurt those who favor form over function. Fools.
\subsection{Remove Flash chip by desoldering with hot air}
Once you teardown into the board, you'll examine the ICs. The flash is nowhere to be seen. Is it onboard the CPU? No, it's on the bottom of the board. So it must be lifted out of the enclosure. With hot air desoldering, you must also use lead solder first on the pins. This guide is not a tutorial on hot air soldering. I assume you know this kind of stuff. I won't go into it, unless notable.
Not all tweezers can grab these large chips easy. I have one pair that fits them, and about 3 that don't. Can't have enough tweezers, it seems.
\subsection{Read flash with appropriate tool}
I have a new rule. Every EE should have a toolbox of flash reading / writing equipment. It's necessary.
My weapon of choice for this project was the Beaglebone black with flashrom. A TL866A could also work. Flashrom is compatible with lots of hardware. An RPI can be used. Doesn't matter, but you must set it up. And when you have the chip, you will need:
\begin{itemize}
\item Breakout boards for the IC, as those clips are useless \footnote{I have two of those flash-in-place clips. Pomona used to sell them for \$40 each, then China came in and sells them for less than 12 dollars each now. Some for 5. They can work, but the one I had barely reached to all the pins. It wasn't big enough. Not worth it. Get breakout pcbs unless you do this a lot.}
\item Soldering Iron
\item Hot Air station
\item Lead solder
\item Tweezers
\item Experience to not damage pins during the operation
\item Short wires between breakout and BBB
\item Proper connecting of wires to BBB
\end{itemize}
I got a tote/toolbox of a few pages of documentation on flashing via BBB, and also the pinouts of the P8 and P9 headers of the BBB. Printouts help.
A guide on the BBB flashrom setup is here: %insertlibrebootlink
BBB SRM manual has the P8 and P9 headers.
Since I've used flashrom in the past to flash Libreboot, this was not new territory for me. Experience with this helps. \footnote{Such as, keep wires short, make multiple reads, and compare with md5sum afterwards, don't fry chip.}
\subsection{Patch existing image sysupgrade for Devolo 1700 series.}
This was easy enough (what I tried worked the first time). Based on this link on the forum for tp link devices https://forum.openwrt.org/t/debricking-tl-wr1043nd-v4-hard-way-by-external-flashing-solved/7675/6
So the command was similar.
\begin{verbatim}
sudo dd if=lede-17.01.4-ar71xx-generic-tl-wr1043nd-v4-squashfs-sysupgrade.bin of=dump.bin bs=1 seek=$((0x20000)) conv=notrunc
\end{verbatim}
Except I knew the proper directory was at 0x70000 on my chip, thanks to the partition map at the devolo page, and also the partitions page here which explains all this:
https://openwrt.org/docs/techref/flash.layout
Another interesting, but not required reading:
https://openwrt.org/docs/techref/flash
\subsubsection{The Common IT Company Rant}
Basically, any IT admin who sells / maintains a flash based device, and doesn't have a plan to replace the flash when it fails (which it very likely will at some point) is a hack. It's the number one cause of built in obsolescence. Even Tesla ran into trouble with their cars\footnote{Some early cars had their onboard flash fail. Flash is a problem, and a big one for the long game.}.
I had an argument at work with a 'normal' IT company that advocated that 'Hardware firewalls' were more secure than 'software firewalls'. There's of course, no such thing as a hardware firewall. There are no dedicated ICs for firewalls. There are ARM chips tailored for firewalls (or perhaps just networking equipment), but these are just ARM chips, for the most part. One argument from this IT company was that my x86 PC was less secure than a commercial MIPS or ARM product off the shelf, e.g. Juniper, or Cisco. They considered the Juniper to be a 'hardware firewall'. Bollocks. Those are also software firewalls, just as much as the x86 is. There's a whole page on stack exchange on this. It's not even an argument. It appeals to the uneducated. It's nonsense. It's a nonsensical argument. It's like saying a hardware desktop is better than a software desktop. That makes no sense.
\\
Ref: https://serverfault.com/questions/268542/hardware-firewall-vs-software-firewall-ip-tables-rhel
\\
The second argument they had was that Open Source is less secure than commercial products because ``Any hacker can look at the code''. I could rebut this with the identical hyperbole of ``Any hacker can buy your commercial firewall off of ebay and hack it'', but that's childish. Let's not. Here's what matters: No one with a whit of integrity would say Free and Open source software is worse than Proprietary software. You can't. In 2020, it's 20 years too late for that. The success of Google was proof that FOSS works.\footnote{Additionally, Sophos bases its XG firewalls off of GNU Linux. So much for that argument.}
\\
I read somewhere the following, and it seems right:''Humans write good software, and they write bad software. Most of it is not good. Whether it's proprietary or foss has zero relation on the quality of the software. ``
\\
And if anything, FOSS benefits from the 'many eyes' approach, that will ensure that successful software at least has a lot of people reviewing it. Whether it's good or insane complexity is another matter.
\\
Anyways, my point is: IT companies can be insidious profit chasing vermin. I'm sure they aren't all bad, but the common IT company is about as good as the common hamburger (i.e. fast food). They will sell you everything Windows, and in 5-10 years, they will sell you it again, and again. The idea of updating a server without replacing hardware is almost unheard of. All firewalls are sold, and expected to be landfilled in 5-7 years. It's not sustainable business. Humans need to have a minimal footprint on planet Earth, and they need to reuse as much as possible. It's a sin.
\\
I know this planet appears a joke, but that's not going to stop me from doing what should be done. And a spade will be called a spade.
\subsection{Write flash with new image and Resolder chip to board}
After dd'ing the new image bin, you write it back to the flash chip. This is not dramatic, just don't forget to do so. If you have a solid flashrom and pcb setup, it will just work.
Resoldering the chip to the board is also trivial, assuming you have hot air and lead solder. Not all the pins have to be connected in a 16 pin EEPROM. This board happens to have two footprints. Underneath the 16 pin IC, is... surprise: a 8 pin footprint (same ic). So you can swap in the smaller package if you want.
\subsection{Access board via FTDI / USB-Serial chip}
After that, you will again need to have serial access. FTDI is my goto as I've learned over the years that my cheapo PL2302 usb serial adapters are not reliable.\footnote{Another thing that must go right.}
Finally, you can use the board.
\subsection{Dumb AP is Ideal AP}
I just learned the value of a Dumb AP with this project. What is a dumb ap? It's essentially a Wifi AP with zero configuration. Maybe it can't be logged into, it has no subnet, it doesn't do anything outsde of connect wireless clients to the lan. It's like a wireless switch. It's beautiful.
\\
I know that it isn't 100\% future proof\footnote{WPA issues, or side channel attacks probably. However, unlikely if it's not accessible via LAN}, but the idea that Wireless APs could be as future proof as a network switch is wonderful. No more mesh, no more management console, no busywork interfaces... Just configure the SSID / Password, and plug it in to ethernet. That's it. It's such an obvious solution, I am surprised I didn't understand it before.
\\
Dumb AP is the ideal Wireless AP.\footnote{Technically, you probably still want to update them every so often, given that RF and Encryption (e.g. WPA) adds complexity to the AP, but a Dumb AP is the way Wireless Access Points should be done, if possible. Avoid configuration overhead, and have something that does what its supposed to, and nothing else.}
\subsection{What is required for this to go right}
A lot is required for everything to go smoothly. I've touched on a lot of points, but experience flashing, soldering, soldering with hot air, proto board usage, tearing down enclosures, configuring Openwrt, using USB to Serial adapters, installing the WAP on the wall with a screw driver, and some drywall screws\footnote{This WAP also comes with separate magnetic bars that screw into the wall. The AP attaches via magnets to the bars, and is easily removable for service. Great design.}, and finally understanding this WAP was worth the trouble by reviewing the screenshots and having enough electronics experience to recognize quality when you see it.
Not least of all, you have to decipher all the docs as I did to come to this conclusion that flashing would be viable. It is here. It may not be next time. However, with this tool under my belt I'm better prepared for next time.\footnote{A note about the current support of this device in Openwrt. I've decided to not make a wiki page, as for whatever reason no one else did, and ``When in Rome, do as the Romans do''. I don't think there are a lot of devices out there, so will avoid promoting them. As they'd follow the fate of other devices which have had internet popularity make them unobtainable. However, I felt an article on my unknown git/book wouldn't hurt. When you browse here, you get such articles.}
\end{document}

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Edimax_WAP1750/docs/9.toc View File

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\contentsline {section}{\numberline {1}Edimax WAP1750}{1}%
\contentsline {subsection}{\numberline {1.1}Flashing Openwrt on to the WAP1750}{2}%
\contentsline {subsection}{\numberline {1.2}Teardown Enclosure}{3}%
\contentsline {subsection}{\numberline {1.3}Remove Flash chip by desoldering with hot air}{3}%
\contentsline {subsection}{\numberline {1.4}Read flash with appropriate tool}{3}%
\contentsline {subsection}{\numberline {1.5}Patch existing image sysupgrade for Devolo 1700 series.}{4}%
\contentsline {subsubsection}{\numberline {1.5.1}The Common IT Company Rant}{5}%
\contentsline {subsection}{\numberline {1.6}Write flash with new image and Resolder chip to board}{6}%
\contentsline {subsection}{\numberline {1.7}Access board via FTDI / USB-Serial chip}{7}%
\contentsline {subsection}{\numberline {1.8}Dumb AP is Ideal AP}{7}%
\contentsline {subsection}{\numberline {1.9}What is required for this to go right}{8}%

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